a08b4ed137
This patch exposes new link modes (including 50Gbps per lane), and ext_* fields which describes the new link modes in Port Type and Speed register (PTYS). Access functions, translation functions (speed <-> HW bits) and link max speed function were modified. Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> |
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| .. | ||
| accel.h | ||
| cmd.h | ||
| cq.h | ||
| device.h | ||
| doorbell.h | ||
| driver.h | ||
| eq.h | ||
| eswitch.h | ||
| fs.h | ||
| fs_helpers.h | ||
| mlx5_ifc.h | ||
| mlx5_ifc_fpga.h | ||
| port.h | ||
| qp.h | ||
| transobj.h | ||
| vport.h | ||