linux-uconsole/drivers/pci/controller
Yoshihiro Shimoda 2de11b2e5d PCI: rcar: Fix missing MACCTLR register setting in initialization sequence
[ Upstream commit 7c7e53e1c9 ]

The R-Car Gen2/3 manual - available at:

https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg1m.html#documents

"RZ/G Series User's Manual: Hardware" section

strictly enforces the MACCTLR inizialization value - 39.3.1 - "Initial
Setting of PCI Express":

"Be sure to write the initial value (= H'80FF 0000) to MACCTLR before
enabling PCIETCTLR.CFINIT".

To avoid unexpected behavior and to match the SW initialization sequence
guidelines, this patch programs the MACCTLR with the correct value.

Note that the MACCTLR.SPCHG bit in the MACCTLR register description
reports that "Only writing 1 is valid and writing 0 is invalid" but this
"invalid" has to be interpreted as a write-ignore aka "ignored", not
"prohibited".

Reported-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Fixes: c25da47788 ("PCI: rcar: Add Renesas R-Car PCIe driver")
Fixes: be20bbcb0a ("PCI: rcar: Add the initialization of PCIe link in resume_noirq()")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: <stable@vger.kernel.org> # v5.2+
Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-12-17 20:35:54 +01:00
..
dwc PCI: keystone: Use quirk to limit MRRS for K2G 2019-12-01 09:17:33 +01:00
Kconfig Merge branch 'remotes/lorenzo/pci/mobiveil' 2018-08-15 14:59:14 -05:00
Makefile
pci-aardvark.c Merge branch 'remotes/lorenzo/pci/aardvark' 2018-08-15 14:59:09 -05:00
pci-ftpci100.c
pci-host-common.c
pci-host-generic.c
pci-hyperv.c PCI: hv: Avoid use of hv_pci_dev->pci_slot after freeing it 2019-10-01 08:26:09 +02:00
pci-mvebu.c PCI: mvebu: Fix PCI I/O mapping creation sequence 2018-10-01 15:42:09 -05:00
pci-rcar-gen2.c
pci-tegra.c PCI: tegra: Enable Relaxed Ordering only for Tegra20 & Tegra30 2019-11-12 19:20:52 +01:00
pci-thunder-ecam.c
pci-thunder-pem.c
pci-v3-semi.c
pci-versatile.c
pci-xgene-msi.c
pci-xgene.c
pcie-altera-msi.c
pcie-altera.c
pcie-cadence-ep.c PCI: cadence: Write MSI data with 32bits 2019-12-01 09:16:15 +01:00
pcie-cadence-host.c
pcie-cadence.c PCI: cadence: Correct probe behaviour when failing to get PHY 2018-11-13 11:08:35 -08:00
pcie-cadence.h
pcie-iproc-bcma.c
pcie-iproc-msi.c
pcie-iproc-platform.c
pcie-iproc.c
pcie-iproc.h
pcie-mediatek.c PCI: mediatek: Fixup MSI enablement logic by enabling MSI before clocks 2019-12-01 09:16:30 +01:00
pcie-mobiveil.c PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions 2019-07-31 07:27:06 +02:00
pcie-rcar.c PCI: rcar: Fix missing MACCTLR register setting in initialization sequence 2019-12-17 20:35:54 +01:00
pcie-rockchip-ep.c
pcie-rockchip-host.c PCI: rockchip: Propagate errors for optional regulators 2019-10-07 18:57:12 +02:00
pcie-rockchip.c
pcie-rockchip.h
pcie-tango.c
pcie-xilinx-nwl.c PCI: xilinx-nwl: Fix Multi MSI data programming 2019-07-31 07:27:02 +02:00
pcie-xilinx.c PCI: xilinx: Check for __get_free_pages() failure 2019-06-15 11:54:10 +02:00
vmd.c PCI: vmd: Detach resources after stopping root bus 2019-12-01 09:16:37 +01:00