11ca1d9953
According to the LFPS Tx Low Power/LFPS Rx Detect Threshold [1], the device under test(DUT) must not respond if LFPS below the minimum LFPS Rx Detect Threshold 100mV. Test fail on Rockchip platforms, because the default LFPS detect threshold is set to 65mV. The usbdp phy LFPS detect threshold voltage could be set to 30mV ~ 140mV, and since there could be 10-20% PVT variation, we set LFPS detect threshold voltage to 110mV. [1] https://compliance.usb.org/resources/LFPS_Rx_Tx_Low_Power_Compliance_Update_Rev5.pdf Change-Id: Idf17df242090027b3b8eb731423a1aa536ed8c09 Signed-off-by: William Wu <william.wu@rock-chips.com> |
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| allwinner | ||
| amlogic | ||
| broadcom | ||
| cadence | ||
| freescale | ||
| hisilicon | ||
| ingenic | ||
| intel | ||
| lantiq | ||
| marvell | ||
| mediatek | ||
| microchip | ||
| motorola | ||
| mscc | ||
| qualcomm | ||
| ralink | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| socionext | ||
| st | ||
| sunplus | ||
| tegra | ||
| ti | ||
| xilinx | ||
| Kconfig | ||
| Makefile | ||
| phy-can-transceiver.c | ||
| phy-core-mipi-dphy.c | ||
| phy-core.c | ||
| phy-lgm-usb.c | ||
| phy-lpc18xx-usb-otg.c | ||
| phy-pistachio-usb.c | ||
| phy-xgene.c | ||