Commit graph

46,180 commits

Author SHA1 Message Date
Feifei Xu
f06a32e4d2 drm/amdgpu/sdma4: Update vega12 sdma golden setting.
Update vega12 sdma golden setting.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:49 -05:00
Hawking Zhang
9acdc00c24 drm/amdgpu/sdma4: add sdma4_0_1 support for vega12 (v3)
Add sdma golden setting for vega12.

v2: switch to soc15_program_register_sequence for
golden register programming
v3: squash in unused declaration fix

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
900bad3fe9 drm/amdgpu/sdma4: add clockgating support for vega12
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
607c26a0ea drm/amdgpu/sdma4: Add placeholder for vega12 golden settings
Fill these in when we get them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
2e24ada2fc drm/amdgpu/sdma4: specify vega12 firmware
Declare the firmware and fetch the proper file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
f8d27677e1 drm/amdgpu/mmhub: add clockgating support for vega12
Treat it the same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
273a14cd15 drm/amdgpu/gmc9: add vega12 support (v2)
Same as vega10.

v2: squash in golden regs fix from Feifei

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:46 -05:00
Alex Deucher
dca7b4015c drm/amdgpu: add vega12 to dc support check
DC is used for modesetting on vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:51 -05:00
Jerry (Fangzhi) Zuo
b6a8a2bc83 drm/amd/display: Add bios firmware info version for VG12
VG12 shows minor revision version of 2 which is not handled in
bios_parser_get_firmware_info() routine.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:24:45 -05:00
Alex Deucher
2325ff305e drm/amd/display/dm: add vega12 support
Add support for vega12 to the display manager.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:40 -05:00
Alex Deucher
f79f3fc141 drm/amdgpu/virtual_dce: add vega12 support
Add virtual dce support for vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:35 -05:00
Alex Deucher
9aa52bc487 drm/amdgpu: specify vega12 vce firmware
Declare firmware and add support for the file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:30 -05:00
Alex Deucher
2327e6261a drm/amdgpu: specify vega12 uvd firmware
Declare firmware and add support for the file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:24 -05:00
Feifei Xu
6b9c6e1b15 drm/amdgpu: add vega12 ucode loading method
Same as vega10.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:24:18 -05:00
Evan Quan
eddfa8dfad drm/amdgpu: initilize vega12 psp firmwares
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:24:12 -05:00
Alex Deucher
ff13dc671d drm/amdgpu/psp: initial vega12 support
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:07 -05:00
Hawking Zhang
ad0ad9aa20 drm/amdgpu: vega12 to smu firmware
Add the cgs interface to query the smu firmware for vega12
and declare the firmware.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:24:00 -05:00
Alex Deucher
e48a3cd9cb drm/amdgpu: set asic family and ip blocks for vega12
soc15 just like vega10 and raven.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:23:55 -05:00
Alex Deucher
3f76dcedb3 drm/amdgpu: add gpu_info firmware for vega12
Stores gpu configuration details.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:23:49 -05:00
Feifei Xu
8fab806ad1 drm/amdgpu: add vega12 to asic_type enum
Add vega12 to amd_asic_type enum and amdgpu_asic_name[].

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:23:39 -05:00
Feifei Xu
133f97945f drm/amd/include: Add ip header files for vega12.
Add ip header files for IPs with a delta for vg12:
GC, MMHUB, OSS

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-By: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:23:01 -05:00
Chris Wilson
9153e6b7c8 drm/i915/execlists: Use a locked clear_bit() for synchronisation with interrupt
We were relying on the uncached reads when processing the CSB to provide
ourselves with the serialisation with the interrupt handler (so we could
detect new interrupts in the middle of processing the old one). However,
in commit 767a983ab2 ("drm/i915/execlists: Read the context-status HEAD
from the HWSP") those uncached reads were eliminated (on one path at
least) and along with them our serialisation. The result is that we
would very rarely miss notification of a new interrupt and leave a
context-switch unprocessed, hanging the GPU.

Fixes: 767a983ab2 ("drm/i915/execlists: Read the context-status HEAD from the HWSP")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180321091027.21034-1-chris@chris-wilson.co.uk
2018-03-21 17:08:26 +00:00
Michal Wajdeczko
d871bfd008 drm/i915/guc: Unify parameters of public CT functions
There is no need to mix parameter types in public CT functions
as we can always accept intel_guc_ct.

v2: fix 'Return' doc, s/dev_priv/i915 (Sagar)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320162020.38672-1-michal.wajdeczko@intel.com
2018-03-21 15:11:03 +00:00
Michal Wajdeczko
e9c7e65179 drm/i915/guc: Handle GuC log flush event in dedicated function
We already try to keep all GuC log related code in separate file,
handling flush event should be placed there too. This will also
allow future code reuse.

v2: rebased

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180319125049.48932-1-michal.wajdeczko@intel.com
2018-03-21 15:09:14 +00:00
Michal Wajdeczko
bc598425eb drm/i915/guc: Move enable/disable msg functions to GuC header
While today we are modifying GuC enabled msg mask only in GuC
log, this code should be defined as generic GuC to allow future
code reuse.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320181419.35576-3-michal.wajdeczko@intel.com
2018-03-21 15:07:15 +00:00
Michal Wajdeczko
154374c331 drm/i915/guc: Drop union guc_log_control
Usually we use shift/mask macros for bit field definitions.
Union guc_log_control was not following that pattern.

Additional bonus:

add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-25 (-25)
Function                                     old     new   delta
intel_guc_log_level_set                      388     363     -25

v2: prevent out-of-range verbosity (MichalWi)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: MichaĹ Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320181419.35576-2-michal.wajdeczko@intel.com
2018-03-21 15:07:14 +00:00
Michal Wajdeczko
7beae44d7b drm/i915/guc: Unify naming of private GuC action functions
We should avoid using guc_log prefix for functions that don't
operate on GuC log, but rather request action from the GuC.
Better to use guc_action prefix.

v2: rebase + naming compromise
v3: rebase

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320181419.35576-1-michal.wajdeczko@intel.com
2018-03-21 15:07:13 +00:00
Michal Wajdeczko
fa26527591 drm/i915/huc: Check HuC status in dedicated function
We try to keep all HuC related code in dedicated file.
There is no need to peek HuC register directly during
handling getparam ioctl.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180314200429.40132-1-michal.wajdeczko@intel.com
2018-03-21 15:04:28 +00:00
Chris Wilson
3a088dd1b7 drm/i915: Specify which engines to reset following semaphore/event lockups
If the GPU is stuck waiting for an event or for a semaphore, we need to
reset the GPU in order to recover. We have to tell the reset routine
which engines we want reset, but we were still using the old interface
and declaring it as "not-fatal".

Fixes: 14b730fcb8 ("drm/i915/tdr: Prepare error handler to accept mask of hung engines")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180320100449.1360-1-chris@chris-wilson.co.uk
(cherry picked from commit ca98317b89)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-03-21 07:59:08 -07:00
Sean Paul
1c7095d283 Merge airlied/drm-next into drm-misc-next
Refresh -misc-next

Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-03-21 09:40:55 -04:00
Greg Kroah-Hartman
c50099f856 Update extcon for 4.17
Detailed description for this pull request:
 1. Add exported extcon function in order to support OF graph binding
 - The extcon consumer driver used the "extcon = <&extcon's phandle"
   property in device-tree in order to bind between extcon provider
   and consumer driver. But, OF graph method is better than 'extcon' property.
   So, extcon subsystem adds the following function to support OF graph binding.
   : extcon_find_edev_by_node(struct device_node *node)
 
 - Create the immutable branch ("ib-extcon-drm-dt-v4.17") for both drm-misc
   and device-tree subsystem. This immutable branch contains the use-case of
   OF graph binding for EXTCON_HDMI connector between MHL device driver
   and extcon provider driver.
 
 2. Fix minor issues of extcon device drivers
 - Remove platform_data and covert to fully use GPIO descriptor for extcon-gpio.c
 - Remove workaround code for id pin direction from extcon-inte-int3496.c
   because GPIO ACPI library does support it with generic way.
 - Set direction and drv flags for V5 boost GPIO because of fixing
   the firmware bug.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJasefUAAoJEJzN3yze689TdjAQAIs5QC3qxLqsPVRUAUPBcWrg
 wsx9RSm7UF2RrSSDN1P01lPlVrlEepJds4n+EDbRNmKNjDvx9G3Ws6wktYXu5VES
 +1TPo1I3dmuMtFAcXc4IWxPehWSwGqHbl5UPg73lUz6Nkx2ycSeZCFTmi3yrgeOH
 EDBlAeHd63dKBbP9YQZjMMHxazFocT7xI3QAq4Xblm+jDXUXX4I3JVkeaDwC2QWP
 vmsZg6NRgRLrBxzoT/Z9Dqk7Jy2Xj9jAOYFbo3mIahH+wx1SLcfKCJiWrJgT8G8y
 WoTlP1bsfvw+a4bTDh6PsKcqvSSk4D1iJrS/hsp9yJchQjnvDPFGgnyNjNcylA45
 g8AnqBGelEEavJfQJahjMObB7Kdr9my5e8Y0nDK5LI+u+hm5bYMdmldripZC0qak
 LUTtgxTamShkdZ3Cu9alq3d90yqXu6CJRZP482jFtHUjWnzihKLi0JoHD8QaVMCK
 jIQHNQHQ/Uu0J0DYvArrbyjWlRYyrNNxywuqXMZQoxd/XhzzjW7La9Wv174UPTqD
 6tFQN50HkGQkj/Hj8A1oA3vKSrVbiG3TvrDlWr3gmP57Ni6qqrLsF9nqDZmyyuVN
 lLO8Hqm35W4xtutZwKdSn/d0A99hSDNoqroGprvdFeUvR0NYPCRDEUnZfl1ML15P
 PBlJixTADCekzpy8bGFy
 =gEVD
 -----END PGP SIGNATURE-----

Merge tag 'extcon-next-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next

Chanwoo writes:

Update extcon for 4.17

Detailed description for this pull request:
1. Add exported extcon function in order to support OF graph binding
- The extcon consumer driver used the "extcon = <&extcon's phandle"
  property in device-tree in order to bind between extcon provider
  and consumer driver. But, OF graph method is better than 'extcon' property.
  So, extcon subsystem adds the following function to support OF graph binding.
  : extcon_find_edev_by_node(struct device_node *node)

- Create the immutable branch ("ib-extcon-drm-dt-v4.17") for both drm-misc
  and device-tree subsystem. This immutable branch contains the use-case of
  OF graph binding for EXTCON_HDMI connector between MHL device driver
  and extcon provider driver.

2. Fix minor issues of extcon device drivers
- Remove platform_data and covert to fully use GPIO descriptor for extcon-gpio.c
- Remove workaround code for id pin direction from extcon-inte-int3496.c
  because GPIO ACPI library does support it with generic way.
- Set direction and drv flags for V5 boost GPIO because of fixing
  the firmware bug.
2018-03-21 12:55:04 +01:00
Thomas Hellstrom
73a88250b7 drm/vmwgfx: Fix a destoy-while-held mutex problem.
When validating legacy surfaces, the backup bo might be destroyed at
surface validate time. However, the kms resource validation code may have
the bo reserved, so we will destroy a locked mutex. While there shouldn't
be any other users of that mutex when it is destroyed, it causes a lock
leak and thus throws a lockdep error.

Fix this by having the kms resource validation code hold a reference to
the bo while we have it reserved. We do this by introducing a validation
context which might come in handy when the kms code is extended to validate
multiple resources or buffers.

Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-03-21 10:52:01 +01:00
Thomas Hellstrom
140bcaa23a drm/vmwgfx: Fix black screen and device errors when running without fbdev
When we are running without fbdev, transitioning from the login screen to
X or gnome-shell/wayland will cause a vt switch and the driver will disable
svga mode, losing all modesetting resources. However, the kms atomic state
does not reflect that and may think that a crtc is still turned on, which
will cause device errors when we try to bind an fb to the crtc, and the
screen will remain black.

Fix this by turning off all kms resources before disabling svga mode.

Cc: <stable@vger.kernel.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2018-03-21 10:51:23 +01:00
Daniel Stone
b24791fe00 drm: Reject getfb for multi-plane framebuffers
getfb can only return a single plane, so reject attempts to use it with
multi-plane framebuffers.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reported-by: Daniel van Vugt <daniel.van.vugt@canonical.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Fixes: 308e5bcbdb ("drm: add an fb creation ioctl that takes a pixel format v5")
Cc: stable@vger.kernel.org # v3.3+
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105518
Link: https://patchwork.freedesktop.org/patch/msgid/20180320225839.30905-1-daniels@collabora.com
2018-03-21 09:43:21 +00:00
Kelvin Gardiner
8b5eb5e2b5 drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection
This patch adds support to detect ICL, slice, subslice and EU fuse
settings.

Add addresses for ICL 11 slice, subslice and EU fuses registers.
These register addresses are the same as previous platforms but the
format and / or the meaning of the information is different. Therefore
Gen11 defines for these registers are added.

Bspec: 9731
Bspec: 20643
Bspec: 20673

v2: Update fusing information storage after introducing the new query
    uAPI (Lionel)

v3 (Oscar):
  - The maximum number of slices in ICL 11 is 1
  - The subslice disable fuse can potentially store information in
    all bits
  - GEN_MAX_SUBSLICES has to be increased to 8
  - Don't trust the slice enabled fuse outside the max number of
    expected slices
  - Indentation fix and some reordering and renaming of local
    variables

v4: Use single space after Cc tag

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Kelvin Gardiner <kelvin.gardiner@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1521575121-9577-1-git-send-email-oscar.mateo@intel.com
2018-03-21 10:36:33 +02:00
Santha Meena Ramamoorthy
2793c1d77a drm/qxl: Replace drm_gem_object_reference/unreference() with _get/put()
Replace drm_gem_object_reference/unreference function with *_get/put()
suffixes, because it is shorter and consistent with the kernel
kref_get/put() functions. The following Coccinelle script was used:

@@
expression e;
@@

(
-drm_gem_object_reference(e);
+drm_gem_object_get(e);
|
-drm_gem_object_unreference(e);
+drm_gem_object_put(e);
|
-drm_gem_object_unreference_unlocked(e);
+drm_gem_object_put_unlocked(e);
)

Signed-off-by: Santha Meena Ramamoorthy <santhameena13@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1521570567-22519-1-git-send-email-santhameena13@gmail.com
2018-03-21 09:19:56 +01:00
Harry Wentland
731a373698 drm/amd/display: Add one to EDID's audio channel count when passing to DC
DC takes channel count to mean the actual count. cea_sad's channels
represent it as number of channels - 1.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-03-21 00:24:47 -05:00
Harry Wentland
509648fcf0 drm/amd/display: We shouldn't set format_default on plane as atomic driver
This is still a leftover from early atomic brinup days.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-03-21 00:23:51 -05:00
Mikita Lipski
4407a29bad drm/amd/display: Fix FMT truncation programming
Switch the order of parameters being set for depth
and mode of truncation, as it previously was not correct

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 00:22:35 -05:00
Mikita Lipski
8bfac12f88 drm/amd/display: Allow truncation to 10 bits
The truncation isn't being programmed if the truncation
depth is set to 2, it causes an issue with dce11.2 asic
using 6bit eDP panel. It required to truncate 12:10 in order to
perform spatial dither 10:6.

This change will allow 12:10 truncation to be enabled.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 00:22:08 -05:00
Chanwoo Choi
eb7768e774 Merge branch 'ib-extcon-drm-dt-v4.17' into extcon-next 2018-03-21 13:58:23 +09:00
Rex Zhu
46b27ee925 drm/amd/pp: Fix unable to handle kernel paging request
when set pp table

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:45:10 -05:00
Rex Zhu
d3472266fb drm/amd/pp: Fix gfx ring test failed on Fiji without hw avfs support
caused by
'commit ca82cec868d1 ("drm/amd/pp: Simplified the avfs btc state on smu7")'

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:45:01 -05:00
Rex Zhu
eb4900aa4c drm/amdgpu: Fix kernel NULL pointer dereference in dpm functions
caused by
'commit 83e3c4615872 ("drm/amdgpu: Remove wrapper layer of smu ip functions")'

BUG: unable to handle kernel NULL pointer dereference at 00000000000005d8
[  313.241459] IP: ci_dpm_read_sensor+0x37/0xf0 [amdgpu]

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:50 -05:00
Rex Zhu
81ce8bea03 drm/amdgpu: Fix kernel NULL pointer dereference when amdgpu fini
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:21 -05:00
Mikita Lipski
e5b03032e3 drm/amdgpu - Disable all irqs before disabling all CRTCs
By moving amdgpu_irq_disable_all earlier in the sequence
fixes an issue with disabling pflip interrupts:

*ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source

Earlier patch fixed a memory corruption and revealed irq
warnings.This way it seems to be there no obvious issues
with unloading the module.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:12 -05:00
Mikita Lipski
088e7c1617 drm/amdgpu: Disable irq on device before destroying it
Disable irq on devices before destroying them. That prevents
use-after-free memory access when unloading the driver.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:03 -05:00
Mikita Lipski
ff97cba8c1 drm/amdgpu: Use atomic function to disable crtcs with dc enabled
This change fixes the deadlock when unloading the driver with displays
connected.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:42 -05:00
Tom St Denis
864917a3b8 drm/amd/amdgpu: fix offset into page with amdgpu_iomem debugfs file
The offset inside the page wasn't included in the copy call meaning
the start of the page was being read/written instead.

Reported-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:34 -05:00
Hawking Zhang
bd08a8d9e8 drm/amdgpu/nbio6: Correct PCIE_INDEX/DATA pair used for smn register accessing
PCIE_INDEX2/DATA2 pair will be used for smn register accessing since from vega.
PCIE_INDEX/DATA pair should be reserved for smu

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:25 -05:00