From ffbfbb30d8bae1557677d1142dff6135401548bd Mon Sep 17 00:00:00 2001
From: Jianqun Xu <jay.xu@rock-chips.com>
Date: Fri, 20 Nov 2020 17:25:34 +0800
Subject: [PATCH] pinctrl: rockchip: rk3568 GPIO0_D3/4/5/6 pull up value 2b'11

For GPIO0_D3/4/5/6 in RK3568 SoCs, the pull setting special:
2'b00: Z(Normal operation);
2'b01: Z(Normal operation);
2'b10: Weak 0(pull-down);
2'b11: Weak 1(pull-up);

Change-Id: I7216063aa393104495d39436a84b9ccd1eedf466
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
---
 drivers/pinctrl/pinctrl-rockchip.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 2aa71477f95d..06171bf80aaa 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3020,6 +3020,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 			}
 		}
 
+		if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
+			if (ret == 1)
+				ret = 3;
+		}
+
 		if (ret < 0) {
 			dev_err(info->dev, "unsupported pull setting %d\n",
 				pull);