ssb: fix init regression with SoCs
commit329456d1ffupstream. This fixes a Data bus error on some SoCs. The first fix for this problem did not solve it on all devices. commit6ae8ec2786Author: Rafał Miłecki <zajec5@gmail.com> Date: Tue Jul 5 17:25:32 2011 +0200 ssb: fix init regression of hostmode PCI core In ssb_pcicore_fix_sprom_core_index() the sprom on the PCI core is accessed, but the sprom only exists when the ssb bus is connected over a PCI bus to the rest of the system and not when the SSB Bus is the main system bus. SoCs sometimes have a PCI host controller and there this code will not be executed, but there are some old SoCs with an PCI controller in client mode around and ssb_pcicore_fix_sprom_core_index() should not be called on these devices too. The PCI controller on these devices are unused, but without this fix it results in an Data bus error when it gets initialized. Cc: Michael Buesch <m@bues.ch> Cc: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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1 changed files with 6 additions and 2 deletions
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@ -516,10 +516,14 @@ static void ssb_pcicore_pcie_setup_workarounds(struct ssb_pcicore *pc)
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static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
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{
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ssb_pcicore_fix_sprom_core_index(pc);
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struct ssb_device *pdev = pc->dev;
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struct ssb_bus *bus = pdev->bus;
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if (bus->bustype == SSB_BUSTYPE_PCI)
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ssb_pcicore_fix_sprom_core_index(pc);
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/* Disable PCI interrupts. */
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ssb_write32(pc->dev, SSB_INTVEC, 0);
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ssb_write32(pdev, SSB_INTVEC, 0);
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/* Additional PCIe always once-executed workarounds */
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if (pc->dev->id.coreid == SSB_DEV_PCIE) {
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