From ed28e4ee25dc04fa98b05293bc31b7333f02df6b Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 15 Jan 2018 17:07:52 +0800
Subject: [PATCH] ARM: dts: rockchip: rk322x: Add rkvdec and vpu qos node

The rkvdec and vpu qos registers need to save and restore when reset.

Change-Id: I2c335a0df922463d2ecf37fe1ee250aadc3b7c54
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 73b002735cf2..259e81f6a633 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -312,6 +312,7 @@
 			pd_vpu@RK3228_PD_VPU {
 				reg = <RK3228_PD_VPU>;
 				clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
 			};
 
 			pd_rkvdec@RK3228_PD_RKVDEC {
@@ -320,6 +321,7 @@
 					 <&cru HCLK_RKVDEC>,
 					 <&cru SCLK_VDEC_CABAC>,
 					 <&cru SCLK_VDEC_CORE>;
+				pm_qos = <&qos_rkvdec_r>, <&qos_rkvdec_w>;
 			};
 		};
 	};
@@ -946,6 +948,21 @@
 		status = "disabled";
 	};
 
+	qos_vpu: qos@31040000 {
+		compatible = "syscon";
+		reg = <0x0 0x31040000 0x0 0x20>;
+	};
+
+	qos_rkvdec_r: qos@31070000 {
+		compatible = "syscon";
+		reg = <0x0 0x31070000 0x0 0x20>;
+	};
+
+	qos_rkvdec_w: qos@31070080 {
+		compatible = "syscon";
+		reg = <0x0 0x31070080 0x0 0x20>;
+	};
+
 	gic: interrupt-controller@32010000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;