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drm/rockchip: vop: remove output uv swap config

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the rb swap at crtc_atomic_enable can instead of uv swap, if RGB format
do rb swap and uv swap, the output data is still RGB, enable one of the
two function, the output data is BGR.

Change-Id: I6e929c2b9316e7ab691f159ba4dd792274a1dad5
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang 2020-11-23 14:35:33 +08:00 • committed by Tao Huang
commit ec8bbf235c
5 changed files with 2 additions and 14 deletions
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4
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View file

@ -2910,7 +2910,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
int act_end;
bool interlaced = !!(adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE);
int for_ddr_freq = 0;
bool dclk_inv, yc_swap = false, uv_swap = false;
bool dclk_inv, yc_swap = false;
rockchip_set_system_status(sys_status);
vop_lock(vop);
@ -2960,9 +2960,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
if (s->output_if & VOP_OUTPUT_IF_BT1120) {
VOP_CTRL_SET(vop, bt1120_en, 1);
yc_swap = is_yc_swap(s->bus_format);
uv_swap = is_uv_swap(s->bus_format, s->output_mode);
VOP_CTRL_SET(vop, bt1120_yc_swap, yc_swap);
VOP_CTRL_SET(vop, bt1120_uv_swap, uv_swap);
}
break;
case DRM_MODE_CONNECTOR_eDP:

3
drivers/gpu/drm/rockchip/rockchip_drm_vop.h
View file

@ -258,7 +258,6 @@ struct vop_ctrl {
struct vop_reg mcu_rw_bypass_port;
/* bt1120 */
struct vop_reg bt1120_uv_swap;
struct vop_reg bt1120_yc_swap;
struct vop_reg bt1120_en;
@ -739,9 +738,7 @@ struct vop2_ctrl {
struct vop_reg dst_alpha_ctrl;
struct vop_reg bt1120_yc_swap;
struct vop_reg bt1120_uv_swap;
struct vop_reg bt656_yc_swap;
struct vop_reg bt656_uv_swap;
struct vop_reg reg_done_frm;
struct vop_reg cfg_done;

6
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View file

@ -2658,7 +2658,7 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
int sys_status = SYS_STATUS_LCDC0;
uint8_t out_mode;
int for_ddr_freq = 0;
bool dclk_inv, yc_swap = false, uv_swap = false;
bool dclk_inv, yc_swap = false;
int act_end;
uint32_t val;
@ -2694,9 +2694,7 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
VOP_CTRL_SET(vop2, rgb_mux, vp_data->id);
VOP_GRF_SET(vop2, grf_bt1120_clk_inv, !dclk_inv);
yc_swap = vop2_output_yc_swap(vcstate->bus_format);
uv_swap = vop2_output_uv_swap(vcstate->bus_format, vcstate->output_mode);
VOP_CTRL_SET(vop2, bt1120_yc_swap, yc_swap);
VOP_CTRL_SET(vop2, bt1120_uv_swap, uv_swap);
}
if (vcstate->output_if & VOP_OUTPUT_IF_BT656) {
@ -2704,9 +2702,7 @@ static void vop2_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state
VOP_CTRL_SET(vop2, rgb_mux, vp_data->id);
VOP_GRF_SET(vop2, grf_bt656_clk_inv, !dclk_inv);
yc_swap = vop2_output_yc_swap(vcstate->bus_format);
uv_swap = vop2_output_uv_swap(vcstate->bus_format, vcstate->output_mode);
VOP_CTRL_SET(vop2, bt656_yc_swap, yc_swap);
VOP_CTRL_SET(vop2, bt656_uv_swap, uv_swap);
}
if (vcstate->output_if & VOP_OUTPUT_IF_LVDS0) {

2
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
View file

@ -972,9 +972,7 @@ static const struct vop2_ctrl rk3568_vop_ctrl = {
.lvds_dual_en = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 0),
.lvds_dual_mode = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 1),
.lvds_dual_channel_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 2),
.bt656_uv_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 4),
.bt656_yc_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 5),
.bt1120_uv_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 8),
.bt1120_yc_swap = VOP_REG(RK3568_DSP_IF_CTRL, 0x1, 9),
.lvds_pin_pol = VOP_REG(RK3568_DSP_IF_POL, 0x7, 0),
.lvds_dclk_pol = VOP_REG(RK3568_DSP_IF_POL, 0x1, 3),

1
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
View file

@ -1735,7 +1735,6 @@ static const struct vop_ctrl rv1126_ctrl_data = {
.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
0xffffffff, 0),
.bt1120_uv_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11),
.bt1120_yc_swap = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 30),
.bt1120_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 31),
};