staging: comedi: addi_apci_3120: introduce apci3120_timer_set_mode()
Introduce a helper function to set the operation mode of a timer. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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parent
2016c534dd
commit
e6da4c6a2d
2 changed files with 24 additions and 39 deletions
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@ -101,8 +101,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY
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#define APCI3120_10_GAIN 0x30
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#define APCI3120_SEQ_RAM_ADDRESS 0x06
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#define APCI3120_RESET_FIFO 0x0c
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#define APCI3120_TIMER_0_MODE_2 0x01
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#define APCI3120_TIMER_0_MODE_4 0x2
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#define APCI3120_ENABLE_TIMER0 0x1000
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#define APCI3120_CLEAR_PR 0xf0ff
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#define APCI3120_CLEAR_PA 0xfff0
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@ -140,14 +138,6 @@ This program is distributed in the hope that it will be useful, but WITHOUT ANY
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#define APCI3120_ENABLE_TIMER_INT 0x04
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#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
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#define APCI3120_WRITE_MODE_SELECT 0x0e
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#define APCI3120_TIMER_1_MODE_2 0x4
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/* $$ BIT FOR MODE IN nCsTimerCtr1 */
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#define APCI3120_TIMER_2_MODE_0 0x0
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#define APCI3120_TIMER_2_MODE_2 0x10
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#define APCI3120_TIMER_2_MODE_5 0x30
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#define APCI3120_TIMER_CRT1 0x0c
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#define APCI3120_TIMER_STATUS_REGISTER 0x0d
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#define APCI3120_RD_STATUS 0x02
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@ -224,6 +214,16 @@ static unsigned int apci3120_timer_read(struct comedi_device *dev,
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return val;
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}
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static void apci3120_timer_set_mode(struct comedi_device *dev,
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unsigned int timer, unsigned int mode)
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{
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struct apci3120_private *devpriv = dev->private;
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(timer);
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devpriv->timer_mode |= APCI3120_TIMER_MODE(timer, mode);
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_MODE_REG);
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}
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static int apci3120_ai_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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@ -373,10 +373,7 @@ static int apci3120_ai_insn_read(struct comedi_device *dev,
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return -EINVAL;
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/* Initialize Timer 0 mode 4 */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(0);
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devpriv->timer_mode |= APCI3120_TIMER_0_MODE_4;
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outb(devpriv->timer_mode,
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dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 0, APCI3120_TIMER_MODE4);
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/* Reset the scan bit and Disables the EOS, DMA, EOC interrupt */
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devpriv->b_ModeSelectRegister =
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@ -456,10 +453,7 @@ static int apci3120_ai_insn_read(struct comedi_device *dev,
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return -EINVAL;
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/* Initialize Timer 0 mode 2 */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(0);
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devpriv->timer_mode |= APCI3120_TIMER_0_MODE_2;
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outb(devpriv->timer_mode,
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dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 0, APCI3120_TIMER_MODE2);
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/* Set the conversion time */
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apci3120_timer_write(dev, 0, divisor);
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@ -755,9 +749,7 @@ static int apci3120_cyclic_ai(int mode,
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switch (mode) {
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case 1:
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/* init timer0 in mode 2 */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(0);
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devpriv->timer_mode |= APCI3120_TIMER_0_MODE_2;
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 0, APCI3120_TIMER_MODE2);
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/* Set the conversion time */
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apci3120_timer_write(dev, 0, divisor0);
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@ -765,17 +757,13 @@ static int apci3120_cyclic_ai(int mode,
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case 2:
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/* init timer1 in mode 2 */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(1);
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devpriv->timer_mode |= APCI3120_TIMER_1_MODE_2;
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 1, APCI3120_TIMER_MODE2);
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/* Set the scan begin time */
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apci3120_timer_write(dev, 1, divisor1);
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/* init timer0 in mode 2 */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(0);
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devpriv->timer_mode |= APCI3120_TIMER_0_MODE_2;
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 0, APCI3120_TIMER_MODE2);
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/* Set the conversion time */
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apci3120_timer_write(dev, 0, divisor0);
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@ -824,10 +812,7 @@ static int apci3120_cyclic_ai(int mode,
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dev->iobase + APCI3120_WRITE_MODE_SELECT);
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/* (1) Init timer 2 in mode 0 and write timer value */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(2);
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devpriv->timer_mode |= APCI3120_TIMER_2_MODE_0;
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outb(devpriv->timer_mode,
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dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 2, APCI3120_TIMER_MODE0);
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/* Set the scan stop count (not sure about the -2) */
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apci3120_timer_write(dev, 2, cmd->stop_arg - 2);
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@ -1422,22 +1407,16 @@ static int apci3120_config_insn_timer(struct comedi_device *dev,
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dev->iobase + APCI3120_WRITE_MODE_SELECT);
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if (data[0] == APCI3120_TIMER) { /* initialize timer */
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/* Set the Timer 2 in mode 2(Timer) */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(2);
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devpriv->timer_mode |= APCI3120_TIMER_2_MODE_2;
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 2, APCI3120_TIMER_MODE2);
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/* Set timer 2 delay */
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apci3120_timer_write(dev, 2, divisor);
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/* timer2 in Timer mode enabled */
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devpriv->b_Timer2Mode = APCI3120_TIMER;
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} else { /* Initialize Watch dog */
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/* Set the Timer 2 in mode 5(Watchdog) */
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devpriv->timer_mode &= ~APCI3120_TIMER_MODE_MASK(2);
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devpriv->timer_mode |= APCI3120_TIMER_2_MODE_5;
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outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_CRT1);
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apci3120_timer_set_mode(dev, 2, APCI3120_TIMER_MODE5);
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/* Set timer 2 delay */
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apci3120_timer_write(dev, 2, divisor);
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@ -20,6 +20,12 @@
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#define APCI3120_AO_REG(x) (0x08 + (((x) / 4) * 2))
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#define APCI3120_AO_MUX(x) (((x) & 0x3) << 14)
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#define APCI3120_AO_DATA(x) ((x) << 0)
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#define APCI3120_TIMER_MODE_REG 0x0c
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#define APCI3120_TIMER_MODE(_t, _m) ((_m) << ((_t) * 2))
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#define APCI3120_TIMER_MODE0 0 /* I8254_MODE0 */
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#define APCI3120_TIMER_MODE2 1 /* I8254_MODE2 */
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#define APCI3120_TIMER_MODE4 2 /* I8254_MODE4 */
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#define APCI3120_TIMER_MODE5 3 /* I8254_MODE5 */
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#define APCI3120_TIMER_MODE_MASK(_t) (3 << ((_t) * 2))
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#define APCI3120_CTR0_REG 0x0d
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#define APCI3120_CTR0_DO_BITS(x) ((x) << 4)
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