media: rockchip: isp: support 8k for isp32 lite
Change-Id: I2ebd5bff4be4b646564a874ce801cc8c9bf261e1 Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This commit is contained in:
parent
6c66737840
commit
e0a6d5fa86
29 changed files with 753 additions and 629 deletions
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@ -669,6 +669,19 @@ static int rkisp_set_fmt(struct rkisp_stream *stream,
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return -EINVAL;
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}
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if ((dev->unite_div == ISP_UNITE_DIV4 ||
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(dev->isp_ver == ISP_V32_L &&
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stream->id == RKISP_STREAM_SP &&
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dev->unite_div == ISP_UNITE_DIV2)) &&
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(pixm->width != dev->isp_sdev.out_crop.width ||
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pixm->height != dev->isp_sdev.out_crop.height)) {
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pixm->width = dev->isp_sdev.out_crop.width;
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pixm->height = dev->isp_sdev.out_crop.height;
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v4l2_warn(&dev->v4l2_dev,
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"%s no support scale force to %dx%d\n",
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__func__, pixm->width, pixm->height);
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}
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/* do checks on resolution */
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restrict_rsz_resolution(stream, config, &max_rsz);
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if (stream->id == RKISP_STREAM_MP ||
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@ -1471,8 +1484,7 @@ static struct v4l2_rect *rkisp_update_crop(struct rkisp_stream *stream,
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const struct v4l2_rect *in)
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{
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struct rkisp_device *dev = stream->ispdev;
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bool is_unite = !!dev->hw_dev->unite;
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u32 align = is_unite ? 4 : 2;
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u32 align = (dev->unite_div > ISP_UNITE_DIV1) ? 4 : 2;
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/* Not crop for MP bayer raw data and dmatx path */
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if ((stream->id == RKISP_STREAM_MP &&
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@ -1492,6 +1504,7 @@ static struct v4l2_rect *rkisp_update_crop(struct rkisp_stream *stream,
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sel->left = ALIGN(sel->left, 2);
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sel->width = ALIGN(sel->width, align);
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sel->height = ALIGN(sel->height, align);
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sel->left = clamp_t(u32, sel->left, 0,
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in->width - STREAM_MIN_MP_SP_INPUT_WIDTH);
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sel->top = clamp_t(u32, sel->top, 0,
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@ -1500,11 +1513,19 @@ static struct v4l2_rect *rkisp_update_crop(struct rkisp_stream *stream,
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in->width - sel->left);
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sel->height = clamp_t(u32, sel->height, STREAM_MIN_MP_SP_INPUT_HEIGHT,
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in->height - sel->top);
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if (is_unite && (sel->width + 2 * sel->left) != in->width) {
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if (dev->unite_div > ISP_UNITE_DIV1 &&
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(sel->width + 2 * sel->left) != in->width) {
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sel->left = ALIGN_DOWN((in->width - sel->width) / 2, 2);
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v4l2_warn(&dev->v4l2_dev,
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"try horizontal center crop(%d,%d)/%dx%d for dual isp\n",
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sel->left, sel->top, sel->width, sel->height);
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"try horizontal center left:%d width:%d for unite mode\n",
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sel->left, sel->width);
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}
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if (dev->unite_div == ISP_UNITE_DIV4 &&
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(sel->height + 2 * sel->top) != in->height) {
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sel->top = ALIGN_DOWN((in->height - sel->height) / 2, 2);
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v4l2_warn(&dev->v4l2_dev,
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"try vertical center top:%d height:%d for unite mode\n",
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sel->top, sel->height);
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}
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stream->is_crop_upd = true;
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return sel;
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@ -1764,11 +1785,15 @@ int rkisp_register_stream_vdevs(struct rkisp_device *dev)
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CIF_ISP_INPUT_H_MAX_V32_UNITE : CIF_ISP_INPUT_H_MAX_V32;
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ret = rkisp_register_stream_v32(dev);
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} else if (dev->isp_ver == ISP_V32_L) {
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st_cfg->max_rsz_width = CIF_ISP_INPUT_W_MAX_V32_L;
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st_cfg->max_rsz_height = CIF_ISP_INPUT_H_MAX_V32_L;
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st_cfg->max_rsz_width = dev->hw_dev->unite ?
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CIF_ISP_INPUT_W_MAX_V32_L_UNITE : CIF_ISP_INPUT_W_MAX_V32_L;
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st_cfg->max_rsz_height = dev->hw_dev->unite ?
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CIF_ISP_INPUT_H_MAX_V32_L_UNITE : CIF_ISP_INPUT_H_MAX_V32_L;
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st_cfg = &rkisp_sp_stream_config;
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st_cfg->max_rsz_width = CIF_ISP_INPUT_W_MAX_V32_L;
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st_cfg->max_rsz_height = CIF_ISP_INPUT_H_MAX_V32_L;
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st_cfg->max_rsz_width = dev->hw_dev->unite ?
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CIF_ISP_INPUT_W_MAX_V32_L_UNITE : CIF_ISP_INPUT_W_MAX_V32_L;
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st_cfg->max_rsz_height = dev->hw_dev->unite ?
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CIF_ISP_INPUT_H_MAX_V32_L_UNITE : CIF_ISP_INPUT_H_MAX_V32_L;
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ret = rkisp_register_stream_v32(dev);
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}
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@ -635,7 +635,8 @@ static int fbc_config_mi(struct rkisp_stream *stream)
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u32 left_w = (stream->out_fmt.width / 2) & ~0xf;
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offs += left_w * mult;
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rkisp_next_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET, offs, false);
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rkisp_idx_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET,
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offs, ISP_UNITE_RIGHT, false);
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}
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rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, 0,
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CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN, false);
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@ -784,18 +785,18 @@ static void update_mi(struct rkisp_stream *stream)
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reg = stream->config->mi.y_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
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val += ((stream->out_fmt.width / div) & ~0xf);
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rkisp_next_write(dev, reg, val, false);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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reg = stream->config->mi.cb_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
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val += ((stream->out_fmt.width / div) & ~0xf) * mult;
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rkisp_next_write(dev, reg, val, false);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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if (stream->id != RKISP_STREAM_FBC && stream->id != RKISP_STREAM_BP) {
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reg = stream->config->mi.cr_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
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val += ((stream->out_fmt.width / div) & ~0xf);
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rkisp_next_write(dev, reg, val, false);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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}
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}
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@ -836,9 +837,12 @@ static void update_mi(struct rkisp_stream *stream)
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v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
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"%s stream:%d Y:0x%x CB:0x%x | Y_SHD:0x%x, right\n",
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__func__, stream->id,
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rkisp_next_read(dev, stream->config->mi.y_base_ad_init, false),
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rkisp_next_read(dev, stream->config->mi.cb_base_ad_init, false),
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rkisp_next_read(dev, stream->config->mi.y_base_ad_shd, true));
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rkisp_idx_read(dev, stream->config->mi.y_base_ad_init,
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ISP_UNITE_RIGHT, false),
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rkisp_idx_read(dev, stream->config->mi.cb_base_ad_init,
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ISP_UNITE_RIGHT, false),
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rkisp_idx_read(dev, stream->config->mi.y_base_ad_shd,
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ISP_UNITE_RIGHT, true));
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}
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static struct streams_ops rkisp_mp_streams_ops = {
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@ -1025,6 +1025,8 @@ static void update_mi(struct rkisp_stream *stream)
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{
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struct rkisp_device *dev = stream->ispdev;
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struct rkisp_dummy_buffer *dummy_buf = &stream->dummy_buf;
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struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
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u32 div = stream->out_isp_fmt.fourcc == V4L2_PIX_FMT_UYVY ? 1 : 2;
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u32 val, reg;
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bool is_cr_cfg = false;
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@ -1048,22 +1050,63 @@ static void update_mi(struct rkisp_stream *stream)
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rkisp_write(dev, reg, val, false);
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}
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if (dev->hw_dev->unite) {
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if (dev->unite_div > ISP_UNITE_DIV1) {
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/* right of image, or right top of image */
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reg = stream->config->mi.y_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
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val += ((stream->out_fmt.width / 2) & ~0xf);
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rkisp_next_write(dev, reg, val, false);
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val += ((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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reg = stream->config->mi.cb_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
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val += ((stream->out_fmt.width / 2) & ~0xf);
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rkisp_next_write(dev, reg, val, false);
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val += ((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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if (is_cr_cfg) {
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reg = stream->config->mi.cr_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
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val += ((stream->out_fmt.width / 2) & ~0xf);
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rkisp_next_write(dev, reg, val, false);
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val += ((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
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}
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}
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if (dev->unite_div == ISP_UNITE_DIV4) {
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/* left bottom of image */
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reg = stream->config->mi.y_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
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val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false);
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reg = stream->config->mi.cb_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
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val += (out_fmt->plane_fmt[1].sizeimage / 2);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false);
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if (is_cr_cfg) {
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reg = stream->config->mi.cr_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
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val += (out_fmt->plane_fmt[2].sizeimage / 2);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_LEFT_B, false);
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}
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/* right bottom of image */
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reg = stream->config->mi.y_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
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val += (out_fmt->plane_fmt[0].bytesperline * out_fmt->height / 2) +
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((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false);
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reg = stream->config->mi.cb_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
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val += (out_fmt->plane_fmt[1].sizeimage / 2) +
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((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false);
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if (is_cr_cfg) {
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reg = stream->config->mi.cr_base_ad_init;
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val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
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val += (out_fmt->plane_fmt[2].sizeimage / 2) +
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((out_fmt->width / div) & ~0xf);
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rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT_B, false);
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}
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}
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@ -1111,15 +1154,15 @@ static void update_mi(struct rkisp_stream *stream)
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} else if (dummy_buf->mem_priv) {
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val = dummy_buf->dma_addr;
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reg = stream->config->mi.y_base_ad_init;
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rkisp_write(dev, reg, val, false);
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rkisp_unite_write(dev, reg, val, false);
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/* wrap buf ENC */
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if (dev->isp_ver == ISP_V32)
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val += stream->out_fmt.plane_fmt[0].bytesperline * dev->cap_dev.wrap_line;
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reg = stream->config->mi.cb_base_ad_init;
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rkisp_write(dev, reg, val, false);
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rkisp_unite_write(dev, reg, val, false);
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if (is_cr_cfg) {
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reg = stream->config->mi.cr_base_ad_init;
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rkisp_write(dev, reg, val, false);
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rkisp_unite_write(dev, reg, val, false);
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}
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} else if (stream->is_using_resmem) {
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/* resmem for fast stream NV12 output */
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@ -1138,7 +1181,7 @@ static void update_mi(struct rkisp_stream *stream)
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/* no next buf to preclose mi */
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stream->ops->disable_mi(stream);
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/* no buf, force to close mi */
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if (!stream->curr_buf)
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if (!stream->curr_buf && dev->hw_dev->is_single)
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stream_self_update(stream);
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}
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@ -2304,8 +2347,8 @@ void rkisp_mi_v32_isr(u32 mis_val, struct rkisp_device *dev)
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v4l2_dbg(3, rkisp_debug, &dev->v4l2_dev,
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"mi isr:0x%x\n", mis_val);
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if (dev->hw_dev->unite == ISP_UNITE_ONE &&
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dev->unite_index == ISP_UNITE_LEFT) {
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if ((dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index != ISP_UNITE_RIGHT) ||
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(dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index != ISP_UNITE_RIGHT_B)) {
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rkisp_write(dev, ISP3X_MI_ICR, mis_val, true);
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goto end;
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}
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@ -27,19 +27,31 @@ void rkisp_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct)
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}
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}
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void rkisp_next_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct)
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void rkisp_idx_write(struct rkisp_device *dev, u32 reg, u32 val, int idx, bool is_direct)
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{
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u32 offset = RKISP_ISP_SW_MAX_SIZE + reg;
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u32 *mem = dev->sw_base_addr + offset;
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u32 *flag = dev->sw_base_addr + offset + RKISP_ISP_SW_REG_SIZE;
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struct rkisp_hw_dev *hw = dev->hw_dev;
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void __iomem *base_addr = hw->base_addr;
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u32 *mem, *flag, offset = idx * RKISP_ISP_SW_MAX_SIZE;
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if (!hw->unite)
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offset = 0;
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/* right for isp1 hardware */
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if (hw->unite == ISP_UNITE_TWO && (idx & 0x1))
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base_addr = hw->base_next_addr;
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mem = dev->sw_base_addr + reg + offset;
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flag = dev->sw_base_addr + reg + RKISP_ISP_SW_REG_SIZE + offset;
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*mem = val;
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*flag = SW_REG_CACHE;
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if (dev->hw_dev->is_single || is_direct) {
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*flag = SW_REG_CACHE_SYNC;
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if (dev->hw_dev->unite == ISP_UNITE_ONE)
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return;
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writel(val, dev->hw_dev->base_next_addr + reg);
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if (dev->isp_ver == ISP_V32 && reg <= 0x200)
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rv1106_sdmmc_get_lock();
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if (idx == ISP_UNITE_LEFT ||
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(hw->unite == ISP_UNITE_TWO && idx == ISP_UNITE_RIGHT))
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writel(val, base_addr + reg);
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if (dev->isp_ver == ISP_V32 && reg <= 0x200)
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rv1106_sdmmc_put_lock();
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}
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}
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@ -54,14 +66,22 @@ u32 rkisp_read(struct rkisp_device *dev, u32 reg, bool is_direct)
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return val;
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}
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u32 rkisp_next_read(struct rkisp_device *dev, u32 reg, bool is_direct)
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u32 rkisp_idx_read(struct rkisp_device *dev, u32 reg, int idx, bool is_direct)
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{
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u32 val;
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struct rkisp_hw_dev *hw = dev->hw_dev;
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void __iomem *base_addr = hw->base_addr;
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u32 val, offset = idx * RKISP_ISP_SW_MAX_SIZE;
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if (dev->hw_dev->is_single || is_direct)
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val = readl(dev->hw_dev->base_next_addr + reg);
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if (!hw->unite)
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offset = 0;
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/* right for isp1 hardware */
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if (hw->unite == ISP_UNITE_TWO && (idx & 0x1))
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base_addr = hw->base_next_addr;
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if (hw->is_single || is_direct)
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val = readl(base_addr + reg);
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else
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val = *(u32 *)(dev->sw_base_addr + RKISP_ISP_SW_MAX_SIZE + reg);
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val = *(u32 *)(dev->sw_base_addr + reg + offset);
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return val;
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}
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@ -72,11 +92,11 @@ void rkisp_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool i
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rkisp_write(dev, reg, val | tmp, is_direct);
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}
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void rkisp_next_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct)
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void rkisp_idx_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, int idx, bool is_direct)
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{
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u32 tmp = rkisp_next_read(dev, reg, is_direct) & ~mask;
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u32 tmp = rkisp_idx_read(dev, reg, idx, is_direct) & ~mask;
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rkisp_next_write(dev, reg, val | tmp, is_direct);
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rkisp_idx_write(dev, reg, val | tmp, idx, is_direct);
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}
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void rkisp_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct)
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@ -86,11 +106,11 @@ void rkisp_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direc
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rkisp_write(dev, reg, tmp & ~mask, is_direct);
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}
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|
||||
void rkisp_next_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct)
|
||||
void rkisp_idx_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, int idx, bool is_direct)
|
||||
{
|
||||
u32 tmp = rkisp_next_read(dev, reg, is_direct);
|
||||
u32 tmp = rkisp_idx_read(dev, reg, idx, is_direct);
|
||||
|
||||
rkisp_next_write(dev, reg, tmp & ~mask, is_direct);
|
||||
rkisp_idx_write(dev, reg, tmp & ~mask, idx, is_direct);
|
||||
}
|
||||
|
||||
void rkisp_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val)
|
||||
|
|
@ -100,11 +120,14 @@ void rkisp_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val)
|
|||
*mem = val;
|
||||
}
|
||||
|
||||
void rkisp_next_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val)
|
||||
void rkisp_idx_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val, int idx)
|
||||
{
|
||||
u32 offset = RKISP_ISP_SW_MAX_SIZE + reg;
|
||||
u32 *mem = dev->sw_base_addr + offset;
|
||||
u32 offset = idx * RKISP_ISP_SW_MAX_SIZE;
|
||||
u32 *mem;
|
||||
|
||||
if (!dev->hw_dev->unite)
|
||||
offset = 0;
|
||||
mem = dev->sw_base_addr + reg + offset;
|
||||
*mem = val;
|
||||
}
|
||||
|
||||
|
|
@ -113,9 +136,13 @@ u32 rkisp_read_reg_cache(struct rkisp_device *dev, u32 reg)
|
|||
return *(u32 *)(dev->sw_base_addr + reg);
|
||||
}
|
||||
|
||||
u32 rkisp_next_read_reg_cache(struct rkisp_device *dev, u32 reg)
|
||||
u32 rkisp_idx_read_reg_cache(struct rkisp_device *dev, u32 reg, int idx)
|
||||
{
|
||||
return *(u32 *)(dev->sw_base_addr + RKISP_ISP_SW_MAX_SIZE + reg);
|
||||
u32 offset = idx * RKISP_ISP_SW_MAX_SIZE;
|
||||
|
||||
if (!dev->hw_dev->unite)
|
||||
offset = 0;
|
||||
return *(u32 *)(dev->sw_base_addr + reg + offset);
|
||||
}
|
||||
|
||||
void rkisp_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val)
|
||||
|
|
@ -125,11 +152,11 @@ void rkisp_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 v
|
|||
rkisp_write_reg_cache(dev, reg, val | tmp);
|
||||
}
|
||||
|
||||
void rkisp_next_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val)
|
||||
void rkisp_idx_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, int idx)
|
||||
{
|
||||
u32 tmp = rkisp_next_read_reg_cache(dev, reg) & ~mask;
|
||||
u32 tmp = rkisp_idx_read_reg_cache(dev, reg, idx) & ~mask;
|
||||
|
||||
rkisp_next_write_reg_cache(dev, reg, val | tmp);
|
||||
rkisp_idx_write_reg_cache(dev, reg, val | tmp, idx);
|
||||
}
|
||||
|
||||
void rkisp_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask)
|
||||
|
|
@ -139,11 +166,11 @@ void rkisp_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask)
|
|||
rkisp_write_reg_cache(dev, reg, tmp & ~mask);
|
||||
}
|
||||
|
||||
void rkisp_next_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask)
|
||||
void rkisp_idx_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, int idx)
|
||||
{
|
||||
u32 tmp = rkisp_next_read_reg_cache(dev, reg);
|
||||
u32 tmp = rkisp_idx_read_reg_cache(dev, reg, idx);
|
||||
|
||||
rkisp_next_write_reg_cache(dev, reg, tmp & ~mask);
|
||||
rkisp_idx_write_reg_cache(dev, reg, tmp & ~mask, idx);
|
||||
}
|
||||
|
||||
void rkisp_update_regs(struct rkisp_device *dev, u32 start, u32 end)
|
||||
|
|
@ -169,9 +196,9 @@ void rkisp_update_regs(struct rkisp_device *dev, u32 start, u32 end)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (hw->unite == ISP_UNITE_ONE && dev->unite_index == ISP_UNITE_RIGHT) {
|
||||
val = dev->sw_base_addr + i + RKISP_ISP_SW_MAX_SIZE;
|
||||
flag = dev->sw_base_addr + i + RKISP_ISP_SW_MAX_SIZE + RKISP_ISP_SW_REG_SIZE;
|
||||
if (hw->unite == ISP_UNITE_ONE && dev->unite_index > ISP_UNITE_LEFT) {
|
||||
val += (RKISP_ISP_SW_MAX_SIZE * dev->unite_index / 4);
|
||||
flag += (RKISP_ISP_SW_MAX_SIZE * dev->unite_index / 4);
|
||||
}
|
||||
|
||||
if (*flag == SW_REG_CACHE) {
|
||||
|
|
|
|||
|
|
@ -174,16 +174,16 @@ u32 rkisp_read_reg_cache(struct rkisp_device *dev, u32 reg);
|
|||
void rkisp_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val);
|
||||
void rkisp_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask);
|
||||
|
||||
/* for dual isp, config for next isp reg */
|
||||
void rkisp_next_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct);
|
||||
u32 rkisp_next_read(struct rkisp_device *dev, u32 reg, bool is_direct);
|
||||
void rkisp_next_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct);
|
||||
void rkisp_next_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct);
|
||||
/* for unite mode, config for diff isp reg */
|
||||
void rkisp_idx_write(struct rkisp_device *dev, u32 reg, u32 val, int idx, bool is_direct);
|
||||
u32 rkisp_idx_read(struct rkisp_device *dev, u32 reg, int idx, bool is_direct);
|
||||
void rkisp_idx_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, int idx, bool is_direct);
|
||||
void rkisp_idx_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, int idx, bool is_direct);
|
||||
|
||||
void rkisp_next_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val);
|
||||
u32 rkisp_next_read_reg_cache(struct rkisp_device *dev, u32 reg);
|
||||
void rkisp_next_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val);
|
||||
void rkisp_next_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask);
|
||||
void rkisp_idx_write_reg_cache(struct rkisp_device *dev, u32 reg, u32 val, int idx);
|
||||
u32 rkisp_idx_read_reg_cache(struct rkisp_device *dev, u32 reg, int idx);
|
||||
void rkisp_idx_set_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, int idx);
|
||||
void rkisp_idx_clear_reg_cache_bits(struct rkisp_device *dev, u32 reg, u32 mask, int idx);
|
||||
|
||||
void rkisp_update_regs(struct rkisp_device *dev, u32 start, u32 end);
|
||||
|
||||
|
|
|
|||
|
|
@ -183,7 +183,7 @@ static int __isp_pipeline_s_isp_clk(struct rkisp_pipeline *p)
|
|||
struct v4l2_subdev *sd;
|
||||
struct v4l2_ctrl *ctrl;
|
||||
u64 data_rate = 0;
|
||||
int i, fps;
|
||||
int i, fps, size;
|
||||
|
||||
hw_dev->isp_size[dev->dev_id].is_on = true;
|
||||
if (hw_dev->is_runing) {
|
||||
|
|
@ -200,14 +200,16 @@ static int __isp_pipeline_s_isp_clk(struct rkisp_pipeline *p)
|
|||
fps = hw_dev->isp_size[i].fps;
|
||||
if (!fps)
|
||||
fps = 30;
|
||||
data_rate += (fps * hw_dev->isp_size[i].size);
|
||||
size = hw_dev->isp_size[i].size * hw_dev->isp[i]->unite_div;
|
||||
data_rate += (fps * size);
|
||||
}
|
||||
} else {
|
||||
i = dev->dev_id;
|
||||
fps = hw_dev->isp_size[i].fps;
|
||||
if (!fps)
|
||||
fps = 30;
|
||||
data_rate = fps * hw_dev->isp_size[i].size;
|
||||
size = hw_dev->isp_size[i].size * dev->unite_div;
|
||||
data_rate = fps * size;
|
||||
}
|
||||
goto end;
|
||||
}
|
||||
|
|
@ -870,7 +872,7 @@ static int rkisp_plat_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
|
||||
if (isp_dev->hw_dev->unite)
|
||||
mult = 2;
|
||||
mult = ISP_UNITE_MAX;
|
||||
isp_dev->sw_base_addr = devm_kzalloc(dev, RKISP_ISP_SW_MAX_SIZE * mult, GFP_KERNEL);
|
||||
if (!isp_dev->sw_base_addr)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -114,13 +114,24 @@ enum {
|
|||
ISP_UNITE_ONE = 2,
|
||||
};
|
||||
|
||||
/* left and right index
|
||||
* ISP_UNITE_LEFT: left of image to isp process
|
||||
* ISP_UNITE_RIGHT: right of image to isp process
|
||||
/* image segmentation index
|
||||
* ISP_UNITE_LEFT: left of image, or left top of image
|
||||
* ISP_UNITE_RIGHT: right of image, or right top of image
|
||||
* ISP_UNITE_LEFT_B: left bottom of image
|
||||
* ISP_UNITE_RIGHT_B: right bottom of image
|
||||
*/
|
||||
enum {
|
||||
ISP_UNITE_LEFT = 0,
|
||||
ISP_UNITE_RIGHT = 1,
|
||||
ISP_UNITE_RIGHT,
|
||||
ISP_UNITE_LEFT_B,
|
||||
ISP_UNITE_RIGHT_B,
|
||||
ISP_UNITE_MAX,
|
||||
};
|
||||
|
||||
enum {
|
||||
ISP_UNITE_DIV1 = 1,
|
||||
ISP_UNITE_DIV2 = 2,
|
||||
ISP_UNITE_DIV4 = 4,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -286,32 +297,36 @@ struct rkisp_device {
|
|||
u8 multi_index;
|
||||
u8 rawaf_irq_cnt;
|
||||
u8 unite_index;
|
||||
u8 unite_div;
|
||||
};
|
||||
|
||||
static inline void
|
||||
rkisp_unite_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct)
|
||||
{
|
||||
rkisp_write(dev, reg, val, is_direct);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_write(dev, reg, val, is_direct);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dev->unite_div; i++)
|
||||
rkisp_idx_write(dev, reg, val, i, is_direct);
|
||||
}
|
||||
|
||||
static inline void
|
||||
rkisp_unite_set_bits(struct rkisp_device *dev, u32 reg, u32 mask,
|
||||
u32 val, bool is_direct)
|
||||
{
|
||||
rkisp_set_bits(dev, reg, mask, val, is_direct);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_set_bits(dev, reg, mask, val, is_direct);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dev->unite_div; i++)
|
||||
rkisp_idx_set_bits(dev, reg, mask, val, i, is_direct);
|
||||
}
|
||||
|
||||
static inline void
|
||||
rkisp_unite_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask,
|
||||
bool is_direct)
|
||||
{
|
||||
rkisp_clear_bits(dev, reg, mask, is_direct);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_clear_bits(dev, reg, mask, is_direct);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dev->unite_div; i++)
|
||||
rkisp_idx_clear_bits(dev, reg, mask, i, is_direct);
|
||||
}
|
||||
|
||||
static inline bool rkisp_link_sensor(u32 isp_inp)
|
||||
|
|
|
|||
|
|
@ -365,6 +365,7 @@ static void update_rawrd(struct rkisp_stream *stream)
|
|||
struct rkisp_device *dev = stream->ispdev;
|
||||
void __iomem *base = dev->base_addr;
|
||||
struct capture_fmt *fmt = &stream->out_isp_fmt;
|
||||
u32 offs, offs_h = stream->out_fmt.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
u32 val = 0;
|
||||
|
||||
if (stream->curr_buf) {
|
||||
|
|
@ -375,15 +376,22 @@ static void update_rawrd(struct rkisp_stream *stream)
|
|||
}
|
||||
val += stream->curr_buf->buff_addr[RKISP_PLANE_Y];
|
||||
rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false);
|
||||
if (dev->hw_dev->unite) {
|
||||
u32 offs = stream->out_fmt.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
if (stream->memory)
|
||||
offs *= DIV_ROUND_UP(fmt->bpp[0], 8);
|
||||
else
|
||||
offs = offs * fmt->bpp[0] / 8;
|
||||
val += offs;
|
||||
rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false);
|
||||
if (stream->memory)
|
||||
offs_h *= DIV_ROUND_UP(fmt->bpp[0], 8);
|
||||
else
|
||||
offs_h = offs_h * fmt->bpp[0] / 8;
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
rkisp_idx_write(dev, stream->config->mi.y_base_ad_init,
|
||||
val + offs_h, ISP_UNITE_RIGHT, false);
|
||||
if (dev->unite_div == ISP_UNITE_DIV4) {
|
||||
offs = stream->out_fmt.plane_fmt[0].bytesperline *
|
||||
(stream->out_fmt.height / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL);
|
||||
rkisp_idx_write(dev, stream->config->mi.y_base_ad_init,
|
||||
val + offs, ISP_UNITE_LEFT_B, false);
|
||||
offs += offs_h;
|
||||
rkisp_idx_write(dev, stream->config->mi.y_base_ad_init,
|
||||
val + offs, ISP_UNITE_RIGHT_B, false);
|
||||
}
|
||||
stream->frame_end = false;
|
||||
if (stream->id == RKISP_STREAM_RAWRD2 && stream->out_isp_fmt.fmt_type == FMT_YUV) {
|
||||
|
|
@ -1131,21 +1139,27 @@ void rkisp_rawrd_set_pic_size(struct rkisp_device *dev,
|
|||
{
|
||||
struct rkisp_isp_subdev *sdev = &dev->isp_sdev;
|
||||
u8 mult = sdev->in_fmt.fmt_type == FMT_YUV ? 2 : 1;
|
||||
bool is_unite = !!dev->hw_dev->unite;
|
||||
u32 w = !is_unite ? width : width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
u32 w, h;
|
||||
|
||||
/* rx height should equal to isp height + offset for read back mode */
|
||||
height = sdev->in_crop.top + sdev->in_crop.height;
|
||||
|
||||
w = width;
|
||||
h = height;
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
w = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
h = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
/* isp20 extend line for normal read back mode to fix internal bug */
|
||||
if (dev->isp_ver == ISP_V20 &&
|
||||
sdev->in_fmt.fmt_type == FMT_BAYER &&
|
||||
sdev->out_fmt.fmt_type != FMT_BAYER &&
|
||||
dev->rd_mode == HDR_RDBK_FRAME1)
|
||||
height += RKMODULE_EXTEND_LINE;
|
||||
h += RKMODULE_EXTEND_LINE;
|
||||
|
||||
w *= mult;
|
||||
rkisp_unite_write(dev, CSI2RX_RAW_RD_PIC_SIZE, height << 16 | w, false);
|
||||
rkisp_unite_write(dev, CSI2RX_RAW_RD_PIC_SIZE, h << 16 | w, false);
|
||||
}
|
||||
|
||||
void rkisp_dmarx_get_frame(struct rkisp_device *dev, u32 *id,
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ static void default_sw_reg_flag(struct rkisp_device *dev)
|
|||
ISP3X_RAWHIST_BIG1_BASE, ISP3X_RAWHIST_BIG2_BASE, ISP3X_RAWHIST_BIG3_BASE,
|
||||
ISP3X_RAWAF_CTRL, ISP3X_RAWAWB_CTRL,
|
||||
};
|
||||
u32 i, *flag, *reg, size;
|
||||
u32 i, j, *flag, *reg, size;
|
||||
|
||||
switch (dev->isp_ver) {
|
||||
case ISP_V20:
|
||||
|
|
@ -138,7 +138,7 @@ static void default_sw_reg_flag(struct rkisp_device *dev)
|
|||
for (i = 0; i < size; i++) {
|
||||
flag = dev->sw_base_addr + reg[i] + RKISP_ISP_SW_REG_SIZE;
|
||||
*flag = SW_REG_CACHE;
|
||||
if (dev->hw_dev->unite) {
|
||||
for (j = 1; j < ISP_UNITE_MAX && dev->hw_dev->unite; j++) {
|
||||
flag += RKISP_ISP_SW_MAX_SIZE / 4;
|
||||
*flag = SW_REG_CACHE;
|
||||
}
|
||||
|
|
@ -1311,8 +1311,10 @@ void rkisp_hw_enum_isp_size(struct rkisp_hw_dev *hw_dev)
|
|||
hw_dev->is_single = false;
|
||||
w = isp->isp_sdev.in_crop.width;
|
||||
h = isp->isp_sdev.in_crop.height;
|
||||
if (hw_dev->unite)
|
||||
if (isp->unite_div > ISP_UNITE_DIV1)
|
||||
w = w / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (isp->unite_div == ISP_UNITE_DIV4)
|
||||
h = h / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
hw_dev->isp_size[i].w = w;
|
||||
hw_dev->isp_size[i].h = h;
|
||||
hw_dev->isp_size[i].size = w * h;
|
||||
|
|
@ -1339,7 +1341,7 @@ static int __maybe_unused rkisp_runtime_resume(struct device *dev)
|
|||
void __iomem *base = hw_dev->base_addr;
|
||||
struct rkisp_device *isp;
|
||||
int mult = hw_dev->unite ? 2 : 1;
|
||||
int ret, i;
|
||||
int ret, i, j;
|
||||
void *buf;
|
||||
|
||||
ret = pinctrl_pm_select_default_state(dev);
|
||||
|
|
@ -1362,7 +1364,7 @@ static int __maybe_unused rkisp_runtime_resume(struct device *dev)
|
|||
buf = isp->sw_base_addr;
|
||||
memset(buf, 0, RKISP_ISP_SW_MAX_SIZE * mult);
|
||||
memcpy_fromio(buf, base, RKISP_ISP_SW_REG_SIZE);
|
||||
if (hw_dev->unite) {
|
||||
for (j = 1; j < ISP_UNITE_MAX && hw_dev->unite; j++) {
|
||||
buf += RKISP_ISP_SW_MAX_SIZE;
|
||||
base = hw_dev->base_next_addr;
|
||||
memcpy_fromio(buf, base, RKISP_ISP_SW_REG_SIZE);
|
||||
|
|
|
|||
|
|
@ -46,8 +46,7 @@ static int rkisp_params_g_fmt_meta_out(struct file *file, void *fh,
|
|||
|
||||
memset(meta, 0, sizeof(*meta));
|
||||
meta->dataformat = params_vdev->vdev_fmt.fmt.meta.dataformat;
|
||||
meta->buffersize = params_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
|
||||
params_vdev->ops->get_param_size(params_vdev, &meta->buffersize);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -349,11 +348,7 @@ static int rkisp_init_params_vdev(struct rkisp_isp_params_vdev *params_vdev)
|
|||
else
|
||||
ret = rkisp_init_params_vdev_v32(params_vdev);
|
||||
|
||||
params_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_PARAMS;
|
||||
if (params_vdev->ops && params_vdev->ops->get_param_size)
|
||||
params_vdev->ops->get_param_size(params_vdev,
|
||||
¶ms_vdev->vdev_fmt.fmt.meta.buffersize);
|
||||
params_vdev->vdev_fmt.fmt.meta.dataformat = V4L2_META_FMT_RK_ISP1_PARAMS;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2239,6 +2239,7 @@ static void
|
|||
rkisp1_get_param_size_v1x(struct rkisp_isp_params_vdev *params_vdev, unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct rkisp1_isp_params_cfg);
|
||||
params_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
/* Not called when the camera active, thus not isr protection. */
|
||||
|
|
|
|||
|
|
@ -4105,6 +4105,7 @@ rkisp_get_param_size_v2x(struct rkisp_isp_params_vdev *params_vdev,
|
|||
unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct isp2x_isp_params_cfg);
|
||||
params_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -4350,13 +4351,16 @@ int rkisp_init_params_vdev_v21(struct rkisp_isp_params_vdev *params_vdev)
|
|||
{
|
||||
struct device *dev = params_vdev->dev->dev;
|
||||
struct rkisp_isp_params_val_v21 *priv_val;
|
||||
int i, ret;
|
||||
int i, ret, size;
|
||||
|
||||
priv_val = kzalloc(sizeof(*priv_val), GFP_KERNEL);
|
||||
if (!priv_val)
|
||||
return -ENOMEM;
|
||||
|
||||
params_vdev->isp21_params = vmalloc(sizeof(*params_vdev->isp21_params));
|
||||
size = sizeof(struct isp21_isp_params_cfg);
|
||||
if (params_vdev->dev->hw_dev->unite)
|
||||
size *= ISP_UNITE_MAX;
|
||||
params_vdev->isp21_params = vmalloc(size);
|
||||
if (!params_vdev->isp21_params) {
|
||||
kfree(priv_val);
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -4196,6 +4196,7 @@ rkisp_get_param_size_v2x(struct rkisp_isp_params_vdev *params_vdev,
|
|||
unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct isp2x_isp_params_cfg);
|
||||
params_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
|||
|
|
@ -49,10 +49,7 @@ static inline void
|
|||
isp3_param_write(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 value, u32 addr, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_write(params_vdev->dev, addr, value, false);
|
||||
else
|
||||
rkisp_next_write(params_vdev->dev, addr, value, false);
|
||||
rkisp_idx_write(params_vdev->dev, addr, value, id, false);
|
||||
}
|
||||
|
||||
static inline u32
|
||||
|
|
@ -64,45 +61,27 @@ isp3_param_read_direct(struct rkisp_isp_params_vdev *params_vdev, u32 addr)
|
|||
static inline u32
|
||||
isp3_param_read(struct rkisp_isp_params_vdev *params_vdev, u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read(params_vdev->dev, addr, false);
|
||||
else
|
||||
val = rkisp_next_read(params_vdev->dev, addr, false);
|
||||
return val;
|
||||
return rkisp_idx_read(params_vdev->dev, addr, id, false);
|
||||
}
|
||||
|
||||
static inline u32
|
||||
isp3_param_read_cache(struct rkisp_isp_params_vdev *params_vdev, u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read_reg_cache(params_vdev->dev, addr);
|
||||
else
|
||||
val = rkisp_next_read_reg_cache(params_vdev->dev, addr);
|
||||
return val;
|
||||
return rkisp_idx_read_reg_cache(params_vdev->dev, addr, id);
|
||||
}
|
||||
|
||||
static inline void
|
||||
isp3_param_set_bits(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 reg, u32 bit_mask, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_set_bits(params_vdev->dev, reg, 0, bit_mask, false);
|
||||
else
|
||||
rkisp_next_set_bits(params_vdev->dev, reg, 0, bit_mask, false);
|
||||
rkisp_idx_set_bits(params_vdev->dev, reg, 0, bit_mask, id, false);
|
||||
}
|
||||
|
||||
static inline void
|
||||
isp3_param_clear_bits(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 reg, u32 bit_mask, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_clear_bits(params_vdev->dev, reg, bit_mask, false);
|
||||
else
|
||||
rkisp_next_clear_bits(params_vdev->dev, reg, bit_mask, false);
|
||||
rkisp_idx_clear_bits(params_vdev->dev, reg, bit_mask, id, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -1107,8 +1086,10 @@ isp_rawaf_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
arg->num_afm_win);
|
||||
struct isp2x_window win_ae;
|
||||
|
||||
if (dev->hw_dev->unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
for (i = 0; i < num_of_win; i++) {
|
||||
h_size = arg->win[i].h_size;
|
||||
|
|
@ -1367,8 +1348,11 @@ isp_rawaelite_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
ISP_PACK_2SHORT(h_offs, v_offs),
|
||||
ISP3X_RAWAE_LITE_OFFSET, id);
|
||||
|
||||
if (ispdev->hw_dev->unite)
|
||||
if (ispdev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (ispdev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
h_size = arg->win.h_size;
|
||||
v_size = arg->win.v_size;
|
||||
if (!h_size || h_size + h_offs + 1 > width)
|
||||
|
|
@ -1462,8 +1446,10 @@ isp_rawaebig_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
ISP_PACK_2SHORT(h_offs, v_offs),
|
||||
addr + ISP3X_RAWAE_BIG_OFFSET, id);
|
||||
|
||||
if (ispdev->hw_dev->unite)
|
||||
if (ispdev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (ispdev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
h_size = arg->win.h_size;
|
||||
v_size = arg->win.v_size;
|
||||
if (!h_size || h_size + h_offs + 1 > width)
|
||||
|
|
@ -1655,15 +1641,17 @@ isp_rawawb_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
value |= !!arg->ds16x8_mode_en << 7;
|
||||
isp3_param_write(params_vdev, value, ISP3X_RAWAWB_BLK_CTRL, id);
|
||||
|
||||
|
||||
h_offs = arg->h_offs & ~0x1;
|
||||
v_offs = arg->v_offs & ~0x1;
|
||||
isp3_param_write(params_vdev,
|
||||
ISP_PACK_2SHORT(h_offs, v_offs),
|
||||
ISP3X_RAWAWB_WIN_OFFS, id);
|
||||
|
||||
if (dev->hw_dev->unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
h_size = arg->h_size;
|
||||
v_size = arg->v_size;
|
||||
if (!h_size || h_size + h_offs > width)
|
||||
|
|
@ -2344,8 +2332,11 @@ isp_rawhstlite_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
ISP_PACK_2SHORT(h_offs, v_offs),
|
||||
ISP3X_RAWHIST_LITE_OFFS, id);
|
||||
|
||||
if (ispdev->hw_dev->unite)
|
||||
if (ispdev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (ispdev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
h_size = arg->win.h_size;
|
||||
v_size = arg->win.v_size;
|
||||
if (!h_size || h_size + h_offs + 1 > width)
|
||||
|
|
@ -2499,8 +2490,11 @@ isp_rawhstbig_config(struct rkisp_isp_params_vdev *params_vdev,
|
|||
ISP_PACK_2SHORT(h_offs, v_offs),
|
||||
addr + ISP3X_RAWHIST_BIG_OFFS, id);
|
||||
|
||||
if (dev->hw_dev->unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
h_size = arg->win.h_size;
|
||||
v_size = arg->win.v_size;
|
||||
if (!h_size || h_size + h_offs + 1 > width)
|
||||
|
|
@ -4411,7 +4405,7 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
module_en_update = new_params->module_en_update;
|
||||
module_ens = new_params->module_ens;
|
||||
|
||||
for (id = 0; id <= !!dev->hw_dev->unite; id++) {
|
||||
for (id = 0; id < dev->unite_div; id++) {
|
||||
priv_val->buf_3dlut_idx[id] = 0;
|
||||
for (i = 0; i < ISP32_3DLUT_BUF_NUM; i++) {
|
||||
if (priv_val->buf_3dlut[id][i].mem_priv)
|
||||
|
|
@ -4438,8 +4432,10 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
u32 val, wrap_line, wsize, div;
|
||||
bool is_alloc;
|
||||
|
||||
if (dev->hw_dev->unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
w = ALIGN(isp_sdev->in_crop.width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL, 16);
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
h = ALIGN(isp_sdev->in_crop.height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL, 16);
|
||||
|
||||
priv_val->is_lo8x8 = (!new_params->others.bay3d_cfg.lo4x8_en &&
|
||||
!new_params->others.bay3d_cfg.lo4x4_en);
|
||||
|
|
@ -4459,8 +4455,8 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
div = is_bwopt_dis ? 1 : 2;
|
||||
val = ALIGN(wsize * h / div, 16);
|
||||
priv_val->bay3d_iir_size = val;
|
||||
if (dev->hw_dev->unite)
|
||||
val *= 2;
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
val *= dev->unite_div;
|
||||
is_alloc = true;
|
||||
if (priv_val->buf_3dnr_iir.mem_priv) {
|
||||
if (val > priv_val->buf_3dnr_iir.size)
|
||||
|
|
@ -4482,8 +4478,8 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
/* pixel to Byte and align */
|
||||
val = ALIGN(val * 2, 16);
|
||||
priv_val->bay3d_ds_size = val;
|
||||
if (dev->hw_dev->unite)
|
||||
val *= 2;
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
val *= dev->unite_div;
|
||||
is_alloc = true;
|
||||
if (priv_val->buf_3dnr_ds.mem_priv) {
|
||||
if (val > priv_val->buf_3dnr_ds.size)
|
||||
|
|
@ -4542,8 +4538,7 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
if (dev->isp_ver == ISP_V32_L) {
|
||||
if (dev->hw_dev->is_frm_buf && !priv_val->buf_frm.mem_priv) {
|
||||
priv_val->buf_frm.size = ISP32_LITE_FRM_BUF_SIZE;
|
||||
if (dev->hw_dev->unite)
|
||||
priv_val->buf_frm.size *= 2;
|
||||
priv_val->buf_frm.size *= dev->unite_div;
|
||||
ret = rkisp_alloc_buffer(dev, &priv_val->buf_frm);
|
||||
if (ret) {
|
||||
dev_err(dev->dev, "alloc frm buf fail:%d\n", ret);
|
||||
|
|
@ -4573,7 +4568,7 @@ free_3dnr:
|
|||
rkisp_free_buffer(dev, &priv_val->buf_3dnr_iir);
|
||||
rkisp_free_buffer(dev, &priv_val->buf_3dnr_ds);
|
||||
err_3dnr:
|
||||
id = dev->hw_dev->unite ? 1 : 0;
|
||||
id = dev->unite_div - 1;
|
||||
i = ISP32_3DLUT_BUF_NUM;
|
||||
err_3dlut:
|
||||
for (; id >= 0; id--) {
|
||||
|
|
@ -4598,6 +4593,8 @@ rkisp_params_check_bigmode_v32_lite(struct rkisp_isp_params_vdev *params_vdev)
|
|||
int i = 0, j = 0;
|
||||
bool is_bigmode = false;
|
||||
|
||||
if (hw->unite == ISP_UNITE_ONE)
|
||||
hw->is_frm_buf = true;
|
||||
using_frm_buf:
|
||||
if (hw->is_frm_buf) {
|
||||
ispdev->multi_index = 0;
|
||||
|
|
@ -4941,15 +4938,14 @@ static void
|
|||
rkisp_params_first_cfg_v32(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
struct rkisp_device *dev = params_vdev->dev;
|
||||
struct rkisp_hw_dev *hw = dev->hw_dev;
|
||||
struct rkisp_isp_params_val_v32 *priv_val =
|
||||
(struct rkisp_isp_params_val_v32 *)params_vdev->priv_val;
|
||||
struct rkisp_isp_params_val_v32 *priv_val = params_vdev->priv_val;
|
||||
struct isp32_isp_params_cfg *params = params_vdev->isp32_params;
|
||||
int i;
|
||||
|
||||
rkisp_params_check_bigmode_v32(params_vdev);
|
||||
spin_lock(¶ms_vdev->config_lock);
|
||||
/* override the default things */
|
||||
if (!params_vdev->isp32_params->module_cfg_update &&
|
||||
!params_vdev->isp32_params->module_en_update)
|
||||
if (!params->module_cfg_update && !params->module_en_update)
|
||||
dev_warn(dev->dev, "can not get first iq setting in stream on\n");
|
||||
|
||||
priv_val->bay3d_en = 0;
|
||||
|
|
@ -4958,39 +4954,28 @@ rkisp_params_first_cfg_v32(struct rkisp_isp_params_vdev *params_vdev)
|
|||
priv_val->lsc_en = 0;
|
||||
priv_val->mge_en = 0;
|
||||
priv_val->lut3d_en = 0;
|
||||
if (hw->unite) {
|
||||
if (dev->is_bigmode)
|
||||
rkisp_next_set_bits(dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
__isp_isr_meas_config(params_vdev, params_vdev->isp32_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_config(params_vdev, params_vdev->isp32_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp32_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp32_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
}
|
||||
if (dev->is_bigmode)
|
||||
rkisp_set_bits(dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
|
||||
__isp_isr_meas_config(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_config(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
|
||||
rkisp_unite_set_bits(dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
for (i = 0; i < dev->unite_div; i++) {
|
||||
__isp_isr_meas_config(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_config(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_en(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_meas_en(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
}
|
||||
spin_unlock(¶ms_vdev->config_lock);
|
||||
|
||||
if (dev->hw_dev->is_frm_buf && priv_val->buf_frm.mem_priv) {
|
||||
u32 size = priv_val->buf_frm.size;
|
||||
u32 addr = priv_val->buf_frm.dma_addr;
|
||||
|
||||
if (hw->unite) {
|
||||
size /= 2;
|
||||
isp3_param_write(params_vdev, size, ISP32L_FRM_BUF_WR_SIZE, 1);
|
||||
isp3_param_write(params_vdev, addr + size, ISP32L_FRM_BUF_WR_BASE, 1);
|
||||
isp3_param_write(params_vdev, addr + size, ISP32L_FRM_BUF_RD_BASE, 1);
|
||||
if (dev->unite_div)
|
||||
size /= dev->unite_div;
|
||||
for (i = 0; i < dev->unite_div; i++) {
|
||||
isp3_param_write(params_vdev, size, ISP32L_FRM_BUF_WR_SIZE, i);
|
||||
isp3_param_write(params_vdev, addr + size * i, ISP32L_FRM_BUF_WR_BASE, i);
|
||||
isp3_param_write(params_vdev, addr + size * i, ISP32L_FRM_BUF_RD_BASE, i);
|
||||
}
|
||||
isp3_param_write(params_vdev, size, ISP32L_FRM_BUF_WR_SIZE, 0);
|
||||
isp3_param_write(params_vdev, addr, ISP32L_FRM_BUF_WR_BASE, 0);
|
||||
isp3_param_write(params_vdev, addr, ISP32L_FRM_BUF_RD_BASE, 0);
|
||||
}
|
||||
if (dev->hw_dev->is_single && (dev->isp_state & ISP_START))
|
||||
rkisp_set_bits(dev, ISP3X_ISP_CTRL0, 0, CIF_ISP_CTRL_ISP_CFG_UPD, true);
|
||||
|
|
@ -5004,10 +4989,9 @@ static void rkisp_save_first_param_v32(struct rkisp_isp_params_vdev *params_vdev
|
|||
|
||||
static void rkisp_clear_first_param_v32(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
u32 size = sizeof(struct isp32_isp_params_cfg);
|
||||
u32 mult = params_vdev->dev->hw_dev->unite ? ISP_UNITE_MAX : 1;
|
||||
u32 size = sizeof(struct isp32_isp_params_cfg) * mult;
|
||||
|
||||
if (params_vdev->dev->hw_dev->unite)
|
||||
size *= 2;
|
||||
memset(params_vdev->isp32_params, 0, size);
|
||||
}
|
||||
|
||||
|
|
@ -5117,9 +5101,10 @@ static void
|
|||
rkisp_get_param_size_v32(struct rkisp_isp_params_vdev *params_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
u32 mult = params_vdev->dev->hw_dev->unite ? 2 : 1;
|
||||
u32 mult = params_vdev->dev->unite_div;
|
||||
|
||||
sizes[0] = sizeof(struct isp32_isp_params_cfg) * mult;
|
||||
params_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -5173,7 +5158,7 @@ rkisp_params_free_meshbuf_v32(struct rkisp_isp_params_vdev *params_vdev,
|
|||
{
|
||||
int id;
|
||||
|
||||
for (id = 0; id <= !!params_vdev->dev->hw_dev->unite; id++)
|
||||
for (id = 0; id < params_vdev->dev->unite_div; id++)
|
||||
rkisp_deinit_mesh_buf(params_vdev, module_id, id);
|
||||
}
|
||||
|
||||
|
|
@ -5332,7 +5317,7 @@ rkisp_params_stream_stop_v32(struct rkisp_isp_params_vdev *params_vdev)
|
|||
rkisp_free_buffer(ispdev, &priv_val->buf_lsclut[i]);
|
||||
for (i = 0; i < RKISP_STATS_DDR_BUF_NUM; i++)
|
||||
rkisp_free_buffer(ispdev, &ispdev->stats_vdev.stats_buf[i]);
|
||||
for (id = 0; id <= !!ispdev->hw_dev->unite; id++) {
|
||||
for (id = 0; id < ispdev->unite_div; id++) {
|
||||
for (i = 0; i < ISP32_3DLUT_BUF_NUM; i++)
|
||||
rkisp_free_buffer(ispdev, &priv_val->buf_3dlut[id][i]);
|
||||
}
|
||||
|
|
@ -5348,7 +5333,7 @@ rkisp_params_fop_release_v32(struct rkisp_isp_params_vdev *params_vdev)
|
|||
{
|
||||
int id;
|
||||
|
||||
for (id = 0; id <= !!params_vdev->dev->hw_dev->unite; id++) {
|
||||
for (id = 0; id < params_vdev->dev->unite_div; id++) {
|
||||
rkisp_deinit_mesh_buf(params_vdev, ISP32_MODULE_LDCH, id);
|
||||
rkisp_deinit_mesh_buf(params_vdev, ISP32_MODULE_CAC, id);
|
||||
}
|
||||
|
|
@ -5358,14 +5343,14 @@ rkisp_params_fop_release_v32(struct rkisp_isp_params_vdev *params_vdev)
|
|||
static void
|
||||
rkisp_params_disable_isp_v32(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
int i;
|
||||
|
||||
params_vdev->isp32_params->module_ens = 0;
|
||||
params_vdev->isp32_params->module_en_update = 0x7ffffffffff;
|
||||
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 0);
|
||||
if (params_vdev->dev->hw_dev->unite) {
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, 1);
|
||||
for (i = 0; i < params_vdev->dev->unite_div; i++) {
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp32_params, RKISP_PARAMS_ALL, i);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -5409,9 +5394,10 @@ static void
|
|||
rkisp_params_cfg_v32(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 frame_id, enum rkisp_params_type type)
|
||||
{
|
||||
struct rkisp_hw_dev *hw = params_vdev->dev->hw_dev;
|
||||
struct rkisp_device *dev = params_vdev->dev;
|
||||
struct isp32_isp_params_cfg *new_params = NULL;
|
||||
struct rkisp_buffer *cur_buf = params_vdev->cur_buf;
|
||||
int i;
|
||||
|
||||
spin_lock(¶ms_vdev->config_lock);
|
||||
if (!params_vdev->streamon)
|
||||
|
|
@ -5427,30 +5413,24 @@ rkisp_params_cfg_v32(struct rkisp_isp_params_vdev *params_vdev,
|
|||
list_del(&cur_buf->queue);
|
||||
if (list_empty(¶ms_vdev->params))
|
||||
break;
|
||||
else if (new_params->module_en_update ||
|
||||
(new_params->module_cfg_update & ISP32_MODULE_FORCE)) {
|
||||
for (i = 0; i < dev->unite_div; i++) {
|
||||
/* update en immediately */
|
||||
__isp_isr_meas_config(params_vdev, new_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_config(params_vdev, new_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_en(params_vdev, new_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_meas_en(params_vdev, new_params, RKISP_PARAMS_ALL, 0);
|
||||
new_params->module_cfg_update = 0;
|
||||
if (hw->unite) {
|
||||
struct isp32_isp_params_cfg *params = new_params + 1;
|
||||
|
||||
__isp_isr_meas_config(params_vdev, params, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_config(params_vdev, params, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_en(params_vdev, params, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_meas_en(params_vdev, params, RKISP_PARAMS_ALL, 1);
|
||||
params->module_cfg_update = 0;
|
||||
if (new_params->module_en_update ||
|
||||
(new_params->module_cfg_update & ISP32_MODULE_FORCE)) {
|
||||
__isp_isr_meas_config(params_vdev,
|
||||
new_params, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_config(params_vdev,
|
||||
new_params, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_en(params_vdev,
|
||||
new_params, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_meas_en(params_vdev,
|
||||
new_params, RKISP_PARAMS_ALL, i);
|
||||
new_params->module_cfg_update = 0;
|
||||
}
|
||||
}
|
||||
if (new_params->module_cfg_update &
|
||||
(ISP32_MODULE_LDCH | ISP32_MODULE_CAC)) {
|
||||
module_data_abandon(params_vdev, new_params, 0);
|
||||
if (hw->unite)
|
||||
module_data_abandon(params_vdev, new_params, 1);
|
||||
|
||||
if (new_params->module_cfg_update &
|
||||
(ISP32_MODULE_LDCH | ISP32_MODULE_CAC))
|
||||
module_data_abandon(params_vdev, new_params, i);
|
||||
new_params++;
|
||||
}
|
||||
vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
|
||||
cur_buf = NULL;
|
||||
|
|
@ -5467,21 +5447,16 @@ rkisp_params_cfg_v32(struct rkisp_isp_params_vdev *params_vdev,
|
|||
goto unlock;
|
||||
|
||||
new_params = (struct isp32_isp_params_cfg *)(cur_buf->vaddr[0]);
|
||||
if (hw->unite) {
|
||||
__isp_isr_meas_config(params_vdev, new_params + 1, type, 1);
|
||||
__isp_isr_other_config(params_vdev, new_params + 1, type, 1);
|
||||
__isp_isr_other_en(params_vdev, new_params + 1, type, 1);
|
||||
__isp_isr_meas_en(params_vdev, new_params + 1, type, 1);
|
||||
for (i = 0; i < dev->unite_div; i++) {
|
||||
__isp_isr_meas_config(params_vdev, new_params, type, i);
|
||||
__isp_isr_other_config(params_vdev, new_params, type, i);
|
||||
__isp_isr_other_en(params_vdev, new_params, type, i);
|
||||
__isp_isr_meas_en(params_vdev, new_params, type, i);
|
||||
if (type != RKISP_PARAMS_IMD)
|
||||
new_params->module_cfg_update = 0;
|
||||
new_params++;
|
||||
}
|
||||
__isp_isr_meas_config(params_vdev, new_params, type, 0);
|
||||
__isp_isr_other_config(params_vdev, new_params, type, 0);
|
||||
__isp_isr_other_en(params_vdev, new_params, type, 0);
|
||||
__isp_isr_meas_en(params_vdev, new_params, type, 0);
|
||||
|
||||
if (type != RKISP_PARAMS_IMD) {
|
||||
new_params->module_cfg_update = 0;
|
||||
if (hw->unite)
|
||||
(new_params++)->module_cfg_update = 0;
|
||||
vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
|
||||
cur_buf = NULL;
|
||||
}
|
||||
|
|
@ -5495,15 +5470,13 @@ static void
|
|||
rkisp_params_clear_fstflg(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
u32 value = isp3_param_read(params_vdev, ISP3X_ISP_CTRL1, 0);
|
||||
int i;
|
||||
|
||||
value &= (ISP3X_YNR_FST_FRAME | ISP3X_ADRC_FST_FRAME |
|
||||
ISP3X_DHAZ_FST_FRAME | ISP3X_CNR_FST_FRAME |
|
||||
ISP3X_RAW3D_FST_FRAME | ISP32_SHP_FST_FRAME);
|
||||
if (value) {
|
||||
isp3_param_clear_bits(params_vdev, ISP3X_ISP_CTRL1, value, 0);
|
||||
if (params_vdev->dev->hw_dev->unite)
|
||||
isp3_param_clear_bits(params_vdev, ISP3X_ISP_CTRL1, value, 1);
|
||||
}
|
||||
for (i = 0; i < params_vdev->dev->unite_div && value; i++)
|
||||
isp3_param_clear_bits(params_vdev, ISP3X_ISP_CTRL1, value, i);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -5563,7 +5536,7 @@ int rkisp_init_params_vdev_v32(struct rkisp_isp_params_vdev *params_vdev)
|
|||
|
||||
size = sizeof(struct isp32_isp_params_cfg);
|
||||
if (params_vdev->dev->hw_dev->unite)
|
||||
size *= 2;
|
||||
size *= ISP_UNITE_MAX;
|
||||
params_vdev->isp32_params = vmalloc(size);
|
||||
if (!params_vdev->isp32_params) {
|
||||
kfree(priv_val);
|
||||
|
|
|
|||
|
|
@ -175,14 +175,14 @@ struct rkisp_isp_params_ops_v32 {
|
|||
struct rkisp_isp_params_val_v32 {
|
||||
struct tasklet_struct lsc_tasklet;
|
||||
|
||||
struct rkisp_dummy_buffer buf_3dlut[ISP3_UNITE_MAX][ISP32_3DLUT_BUF_NUM];
|
||||
u32 buf_3dlut_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_3dlut[ISP_UNITE_MAX][ISP32_3DLUT_BUF_NUM];
|
||||
u32 buf_3dlut_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_ldch[ISP3_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_ldch_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_ldch[ISP_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_ldch_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_cac[ISP3_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_cac_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_cac[ISP_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_cac_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_lsclut[ISP32_LSC_LUT_BUF_NUM];
|
||||
u32 buf_lsclut_idx;
|
||||
|
|
|
|||
|
|
@ -28,79 +28,49 @@ static inline void
|
|||
isp3_param_write_direct(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 value, u32 addr, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_write(params_vdev->dev, addr, value, true);
|
||||
else
|
||||
rkisp_next_write(params_vdev->dev, addr, value, true);
|
||||
rkisp_idx_write(params_vdev->dev, addr, value, id, true);
|
||||
}
|
||||
|
||||
static inline void
|
||||
isp3_param_write(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 value, u32 addr, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_write(params_vdev->dev, addr, value, false);
|
||||
else
|
||||
rkisp_next_write(params_vdev->dev, addr, value, false);
|
||||
rkisp_idx_write(params_vdev->dev, addr, value, id, false);
|
||||
}
|
||||
|
||||
static inline u32
|
||||
isp3_param_read_direct(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read(params_vdev->dev, addr, true);
|
||||
else
|
||||
val = rkisp_next_read(params_vdev->dev, addr, true);
|
||||
return val;
|
||||
return rkisp_idx_read(params_vdev->dev, addr, id, true);
|
||||
}
|
||||
|
||||
static inline u32
|
||||
isp3_param_read(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read(params_vdev->dev, addr, false);
|
||||
else
|
||||
val = rkisp_next_read(params_vdev->dev, addr, false);
|
||||
return val;
|
||||
return rkisp_idx_read(params_vdev->dev, addr, id, false);
|
||||
}
|
||||
|
||||
static inline u32
|
||||
isp3_param_read_cache(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read_reg_cache(params_vdev->dev, addr);
|
||||
else
|
||||
val = rkisp_next_read_reg_cache(params_vdev->dev, addr);
|
||||
return val;
|
||||
return rkisp_idx_read_reg_cache(params_vdev->dev, addr, id);
|
||||
}
|
||||
|
||||
static inline void
|
||||
isp3_param_set_bits(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 reg, u32 bit_mask, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_set_bits(params_vdev->dev, reg, 0, bit_mask, false);
|
||||
else
|
||||
rkisp_next_set_bits(params_vdev->dev, reg, 0, bit_mask, false);
|
||||
rkisp_idx_set_bits(params_vdev->dev, reg, 0, bit_mask, id, false);
|
||||
}
|
||||
|
||||
static inline void
|
||||
isp3_param_clear_bits(struct rkisp_isp_params_vdev *params_vdev,
|
||||
u32 reg, u32 bit_mask, u32 id)
|
||||
{
|
||||
if (id == ISP3_LEFT)
|
||||
rkisp_clear_bits(params_vdev->dev, reg, bit_mask, false);
|
||||
else
|
||||
rkisp_next_clear_bits(params_vdev->dev, reg, bit_mask, false);
|
||||
rkisp_idx_clear_bits(params_vdev->dev, reg, bit_mask, id, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -3531,19 +3501,19 @@ isp_bay3d_enable(struct rkisp_isp_params_vdev *params_vdev, bool en, u32 id)
|
|||
return;
|
||||
}
|
||||
|
||||
value = priv_val->buf_3dnr_iir.size;
|
||||
value = priv_val->bay3d_iir_size;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_WR_SIZE, id);
|
||||
value = priv_val->buf_3dnr_iir.dma_addr + value * id;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_WR_BASE, id);
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_IIR_RD_BASE, id);
|
||||
|
||||
value = priv_val->buf_3dnr_cur.size;
|
||||
value = priv_val->bay3d_iir_size;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_CUR_WR_SIZE, id);
|
||||
value = priv_val->buf_3dnr_cur.dma_addr + value * id;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_CUR_WR_BASE, id);
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_CUR_RD_BASE, id);
|
||||
|
||||
value = priv_val->buf_3dnr_ds.size;
|
||||
value = priv_val->bay3d_ds_size;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_DS_WR_SIZE, id);
|
||||
value = priv_val->buf_3dnr_ds.dma_addr + value * id;
|
||||
isp3_param_write(params_vdev, value, ISP3X_MI_BAY3D_DS_WR_BASE, id);
|
||||
|
|
@ -4166,6 +4136,7 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
|
||||
size = ALIGN((w + w / 8) * h * 2, 16);
|
||||
|
||||
priv_val->bay3d_iir_size = size;
|
||||
if (ispdev->hw_dev->unite)
|
||||
size *= 2;
|
||||
priv_val->buf_3dnr_iir.size = size;
|
||||
|
|
@ -4183,6 +4154,7 @@ rkisp_alloc_internal_buf(struct rkisp_isp_params_vdev *params_vdev,
|
|||
}
|
||||
|
||||
size = 2 * ALIGN(w * h / 64, 16);
|
||||
priv_val->bay3d_ds_size = size;
|
||||
if (ispdev->hw_dev->unite)
|
||||
size *= 2;
|
||||
priv_val->buf_3dnr_ds.size = size;
|
||||
|
|
@ -4423,15 +4395,14 @@ static void
|
|||
rkisp_params_first_cfg_v3x(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
struct rkisp_device *dev = params_vdev->dev;
|
||||
struct rkisp_isp_params_val_v3x *priv_val =
|
||||
(struct rkisp_isp_params_val_v3x *)params_vdev->priv_val;
|
||||
struct rkisp_hw_dev *hw = params_vdev->dev->hw_dev;
|
||||
struct rkisp_isp_params_val_v3x *priv_val = params_vdev->priv_val;
|
||||
struct isp3x_isp_params_cfg *params = params_vdev->isp3x_params;
|
||||
int i;
|
||||
|
||||
dev->is_bigmode = rkisp_params_check_bigmode_v3x(params_vdev);
|
||||
spin_lock(¶ms_vdev->config_lock);
|
||||
/* override the default things */
|
||||
if (!params_vdev->isp3x_params->module_cfg_update &&
|
||||
!params_vdev->isp3x_params->module_en_update)
|
||||
if (!params->module_cfg_update && !params->module_en_update)
|
||||
dev_warn(dev->dev, "can not get first iq setting in stream on\n");
|
||||
|
||||
priv_val->bay3d_en = 0;
|
||||
|
|
@ -4440,22 +4411,15 @@ rkisp_params_first_cfg_v3x(struct rkisp_isp_params_vdev *params_vdev)
|
|||
priv_val->lsc_en = 0;
|
||||
priv_val->mge_en = 0;
|
||||
priv_val->lut3d_en = 0;
|
||||
if (hw->unite) {
|
||||
if (dev->is_bigmode)
|
||||
rkisp_next_set_bits(params_vdev->dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
__isp_isr_meas_config(params_vdev, params_vdev->isp3x_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_config(params_vdev, params_vdev->isp3x_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp3x_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp3x_params + 1, RKISP_PARAMS_ALL, 1);
|
||||
}
|
||||
if (dev->is_bigmode)
|
||||
rkisp_set_bits(params_vdev->dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
__isp_isr_meas_config(params_vdev, params_vdev->isp3x_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_config(params_vdev, params_vdev->isp3x_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_other_en(params_vdev, params_vdev->isp3x_params, RKISP_PARAMS_ALL, 0);
|
||||
__isp_isr_meas_en(params_vdev, params_vdev->isp3x_params, RKISP_PARAMS_ALL, 0);
|
||||
rkisp_unite_set_bits(dev, ISP3X_ISP_CTRL1, 0,
|
||||
ISP3X_BIGMODE_MANUAL | ISP3X_BIGMODE_FORCE_EN, false);
|
||||
for (i = 0; i < dev->unite_div; i++) {
|
||||
__isp_isr_meas_config(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_config(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_other_en(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
__isp_isr_meas_en(params_vdev, params + i, RKISP_PARAMS_ALL, i);
|
||||
}
|
||||
spin_unlock(¶ms_vdev->config_lock);
|
||||
}
|
||||
|
||||
|
|
@ -4471,7 +4435,7 @@ static void rkisp_save_first_param_v3x(struct rkisp_isp_params_vdev *params_vdev
|
|||
|
||||
static void rkisp_clear_first_param_v3x(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
u32 mult = params_vdev->dev->hw_dev->unite ? ISP3_UNITE_MAX : 1;
|
||||
u32 mult = params_vdev->dev->hw_dev->unite ? ISP_UNITE_MAX : 1;
|
||||
u32 size = sizeof(struct isp3x_isp_params_cfg) * mult;
|
||||
|
||||
memset(params_vdev->isp3x_params, 0, size);
|
||||
|
|
@ -4570,9 +4534,10 @@ static void
|
|||
rkisp_get_param_size_v3x(struct rkisp_isp_params_vdev *params_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
u32 mult = params_vdev->dev->hw_dev->unite ? ISP3_UNITE_MAX : 1;
|
||||
u32 mult = params_vdev->dev->unite_div;
|
||||
|
||||
sizes[0] = sizeof(struct isp3x_isp_params_cfg) * mult;
|
||||
params_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -4803,43 +4768,14 @@ static void
|
|||
rkisp_params_clear_fstflg(struct rkisp_isp_params_vdev *params_vdev)
|
||||
{
|
||||
struct rkisp_device *dev = params_vdev->dev;
|
||||
struct rkisp_hw_dev *hw_dev = dev->hw_dev;
|
||||
u32 value;
|
||||
u32 value, i;
|
||||
|
||||
value = rkisp_read(dev, ISP3X_ISP_CTRL1, false);
|
||||
if (value & ISP3X_YNR_FST_FRAME)
|
||||
rkisp_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_YNR_FST_FRAME, false);
|
||||
if (value & ISP3X_ADRC_FST_FRAME)
|
||||
rkisp_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_ADRC_FST_FRAME, false);
|
||||
if (value & ISP3X_DHAZ_FST_FRAME)
|
||||
rkisp_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_DHAZ_FST_FRAME, false);
|
||||
if (value & ISP3X_CNR_FST_FRAME)
|
||||
rkisp_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_CNR_FST_FRAME, false);
|
||||
if (value & ISP3X_RAW3D_FST_FRAME)
|
||||
rkisp_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_RAW3D_FST_FRAME, false);
|
||||
if (hw_dev->unite) {
|
||||
value = rkisp_next_read(dev, ISP3X_ISP_CTRL1, false);
|
||||
if (value & ISP3X_YNR_FST_FRAME)
|
||||
rkisp_next_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_YNR_FST_FRAME, false);
|
||||
if (value & ISP3X_ADRC_FST_FRAME)
|
||||
rkisp_next_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_ADRC_FST_FRAME, false);
|
||||
if (value & ISP3X_DHAZ_FST_FRAME)
|
||||
rkisp_next_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_DHAZ_FST_FRAME, false);
|
||||
if (value & ISP3X_CNR_FST_FRAME)
|
||||
rkisp_next_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_CNR_FST_FRAME, false);
|
||||
if (value & ISP3X_RAW3D_FST_FRAME)
|
||||
rkisp_next_clear_bits(params_vdev->dev, ISP3X_ISP_CTRL1,
|
||||
ISP3X_RAW3D_FST_FRAME, false);
|
||||
}
|
||||
value &= ISP3X_YNR_FST_FRAME | ISP3X_ADRC_FST_FRAME |
|
||||
ISP3X_DHAZ_FST_FRAME | ISP3X_CNR_FST_FRAME |
|
||||
ISP3X_RAW3D_FST_FRAME;
|
||||
for (i = 0; i < dev->unite_div && value; i++)
|
||||
rkisp_idx_clear_bits(dev, ISP3X_ISP_CTRL1, value, i, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -4899,7 +4835,7 @@ int rkisp_init_params_vdev_v3x(struct rkisp_isp_params_vdev *params_vdev)
|
|||
|
||||
size = sizeof(struct isp3x_isp_params_cfg);
|
||||
if (ispdev->hw_dev->unite)
|
||||
size *= 2;
|
||||
size *= ISP_UNITE_MAX;
|
||||
params_vdev->isp3x_params = vmalloc(size);
|
||||
if (!params_vdev->isp3x_params) {
|
||||
kfree(priv_val);
|
||||
|
|
|
|||
|
|
@ -171,21 +171,23 @@ struct rkisp_isp_params_ops_v3x {
|
|||
struct rkisp_isp_params_val_v3x {
|
||||
struct tasklet_struct lsc_tasklet;
|
||||
|
||||
struct rkisp_dummy_buffer buf_3dlut[ISP3_UNITE_MAX][ISP3X_3DLUT_BUF_NUM];
|
||||
u32 buf_3dlut_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_3dlut[ISP_UNITE_MAX][ISP3X_3DLUT_BUF_NUM];
|
||||
u32 buf_3dlut_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_ldch[ISP3_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_ldch_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_ldch[ISP_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_ldch_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_lsclut[ISP3_UNITE_MAX][ISP3X_LSC_LUT_BUF_NUM];
|
||||
u32 buf_lsclut_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_lsclut[ISP_UNITE_MAX][ISP3X_LSC_LUT_BUF_NUM];
|
||||
u32 buf_lsclut_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_cac[ISP3_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_cac_idx[ISP3_UNITE_MAX];
|
||||
struct rkisp_dummy_buffer buf_cac[ISP_UNITE_MAX][ISP3X_MESH_BUF_NUM];
|
||||
u32 buf_cac_idx[ISP_UNITE_MAX];
|
||||
|
||||
struct rkisp_dummy_buffer buf_3dnr_iir;
|
||||
struct rkisp_dummy_buffer buf_3dnr_cur;
|
||||
struct rkisp_dummy_buffer buf_3dnr_ds;
|
||||
u32 bay3d_ds_size;
|
||||
u32 bay3d_iir_size;
|
||||
|
||||
bool dhaz_en;
|
||||
bool drc_en;
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ static int rkisp_stats_g_fmt_meta_cap(struct file *file, void *priv,
|
|||
|
||||
memset(meta, 0, sizeof(*meta));
|
||||
meta->dataformat = stats_vdev->vdev_fmt.fmt.meta.dataformat;
|
||||
meta->buffersize = stats_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
stats_vdev->ops->get_stat_size(stats_vdev, &meta->buffersize);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -132,8 +132,7 @@ static int rkisp_stats_vb2_queue_setup(struct vb2_queue *vq,
|
|||
|
||||
*num_buffers = clamp_t(u32, *num_buffers, RKISP_ISP_STATS_REQ_BUFS_MIN,
|
||||
RKISP_ISP_STATS_REQ_BUFS_MAX);
|
||||
|
||||
sizes[0] = stats_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
stats_vdev->ops->get_stat_size(stats_vdev, sizes);
|
||||
INIT_LIST_HEAD(&stats_vdev->stat);
|
||||
|
||||
return 0;
|
||||
|
|
@ -166,9 +165,9 @@ static void rkisp_stats_vb2_buf_queue(struct vb2_buffer *vb)
|
|||
dev_info(dev->dev,
|
||||
"tb stat seq:%d meas_type:0x%x\n",
|
||||
buf->frame_id, buf->meas_type);
|
||||
memcpy(stats_buf->vaddr[0], buf, sizeof(struct rkisp32_isp_stat_buffer));
|
||||
memcpy(stats_buf->vaddr[0], buf, size);
|
||||
buf->meas_type = 0;
|
||||
vb2_set_plane_payload(vb, 0, sizeof(struct rkisp32_isp_stat_buffer));
|
||||
vb2_set_plane_payload(vb, 0, size);
|
||||
vbuf->sequence = buf->frame_id;
|
||||
spin_unlock_irqrestore(&stats_dev->rd_lock, flags);
|
||||
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
|
||||
|
|
@ -286,6 +285,7 @@ static void rkisp_init_stats_vdev(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
stats_vdev->rd_buf_idx = 0;
|
||||
stats_vdev->wr_buf_idx = 0;
|
||||
memset(stats_vdev->stats_buf, 0, sizeof(stats_vdev->stats_buf));
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat = V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
|
||||
if (stats_vdev->dev->isp_ver <= ISP_V13)
|
||||
rkisp_init_stats_vdev_v1x(stats_vdev);
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ struct rkisp_isp_stats_ops {
|
|||
void (*send_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp_readout_work *meas_work);
|
||||
void (*rdbk_enable)(struct rkisp_isp_stats_vdev *stats_vdev, bool en);
|
||||
void (*get_stat_size)(struct rkisp_isp_stats_vdev *stats_vdev, unsigned int sizes[]);
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -390,19 +390,23 @@ rkisp_stats_rdbk_enable_v1x(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
|||
{
|
||||
}
|
||||
|
||||
static void
|
||||
rkisp_get_stat_size_v1x(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct rkisp1_stat_buffer);
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = {
|
||||
.isr_hdl = rkisp1_stats_isr_v1x,
|
||||
.send_meas = rkisp1_stats_send_meas_v1x,
|
||||
.rdbk_enable = rkisp_stats_rdbk_enable_v1x,
|
||||
.get_stat_size = rkisp_get_stat_size_v1x,
|
||||
};
|
||||
|
||||
void rkisp_init_stats_vdev_v1x(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize =
|
||||
sizeof(struct rkisp1_stat_buffer);
|
||||
|
||||
stats_vdev->ops = &rkisp_isp_stats_ops_tbl;
|
||||
if (stats_vdev->dev->isp_ver == ISP_V12 ||
|
||||
stats_vdev->dev->isp_ver == ISP_V13) {
|
||||
|
|
|
|||
|
|
@ -1120,10 +1120,19 @@ rkisp_stats_rdbk_enable_v21(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
|||
stats_vdev->rdbk_mode = en;
|
||||
}
|
||||
|
||||
static void
|
||||
rkisp_get_stat_size_v21(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct rkisp_isp2x_stat_buffer);
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = {
|
||||
.isr_hdl = rkisp_stats_isr_v21,
|
||||
.send_meas = rkisp_stats_send_meas_v21,
|
||||
.rdbk_enable = rkisp_stats_rdbk_enable_v21,
|
||||
.get_stat_size = rkisp_get_stat_size_v21,
|
||||
};
|
||||
|
||||
void rkisp_stats_first_ddr_config_v21(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
|
|
@ -1149,20 +1158,16 @@ void rkisp_stats_first_ddr_config_v21(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
|
||||
void rkisp_init_stats_vdev_v21(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
int mult = stats_vdev->dev->hw_dev->unite ? ISP_UNITE_MAX : 1;
|
||||
int i;
|
||||
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize =
|
||||
sizeof(struct rkisp_isp2x_stat_buffer);
|
||||
|
||||
stats_vdev->ops = &rkisp_isp_stats_ops_tbl;
|
||||
stats_vdev->priv_ops = &rkisp_stats_reg_ops_v21;
|
||||
stats_vdev->rd_stats_from_ddr = false;
|
||||
|
||||
for (i = 0; i < RKISP_STATS_DDR_BUF_NUM; i++) {
|
||||
stats_vdev->stats_buf[i].is_need_vaddr = true;
|
||||
stats_vdev->stats_buf[i].size = RKISP_RD_STATS_BUF_SIZE;
|
||||
stats_vdev->stats_buf[i].size = RKISP_RD_STATS_BUF_SIZE * mult;
|
||||
rkisp_alloc_buffer(stats_vdev->dev, &stats_vdev->stats_buf[i]);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1458,10 +1458,19 @@ rkisp_stats_rdbk_enable_v2x(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
|||
stats_vdev->rdbk_mode = en;
|
||||
}
|
||||
|
||||
static void
|
||||
rkisp_get_stat_size_v2x(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
sizes[0] = sizeof(struct rkisp_isp2x_stat_buffer);
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = {
|
||||
.isr_hdl = rkisp_stats_isr_v2x,
|
||||
.send_meas = rkisp_stats_send_meas_v2x,
|
||||
.rdbk_enable = rkisp_stats_rdbk_enable_v2x,
|
||||
.get_stat_size = rkisp_get_stat_size_v2x,
|
||||
};
|
||||
|
||||
void rkisp_stats_first_ddr_config_v2x(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
|
|
@ -1491,11 +1500,6 @@ void rkisp_stats_first_ddr_config_v2x(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
|
||||
void rkisp_init_stats_vdev_v2x(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize =
|
||||
sizeof(struct rkisp_isp2x_stat_buffer);
|
||||
|
||||
stats_vdev->ops = &rkisp_isp_stats_ops_tbl;
|
||||
stats_vdev->priv_ops = &rkisp_stats_reg_ops_v2x;
|
||||
|
||||
|
|
|
|||
|
|
@ -430,6 +430,7 @@ rkisp_stats_update_buf(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
unsigned long flags;
|
||||
u32 size = stats_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
u32 val = 0;
|
||||
int i;
|
||||
|
||||
spin_lock_irqsave(&stats_vdev->rd_lock, flags);
|
||||
if (!stats_vdev->nxt_buf && !list_empty(&stats_vdev->stat)) {
|
||||
|
|
@ -454,11 +455,9 @@ rkisp_stats_update_buf(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
val = stats_vdev->stats_buf[0].dma_addr;
|
||||
}
|
||||
|
||||
if (val) {
|
||||
rkisp_write(dev, ISP3X_MI_3A_WR_BASE, val, false);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_write(dev, ISP3X_MI_3A_WR_BASE, val + size / 2, false);
|
||||
}
|
||||
for (i = 0; i < dev->unite_div && val; i++)
|
||||
rkisp_idx_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
val + i * size / dev->unite_div, i, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -920,21 +919,30 @@ rkisp_stats_send_meas_lite(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
struct rkisp_isp_readout_work *meas_work)
|
||||
{
|
||||
struct rkisp_device *dev = stats_vdev->dev;
|
||||
struct rkisp_hw_dev *hw = dev->hw_dev;
|
||||
struct rkisp_isp_params_vdev *params_vdev = &dev->params_vdev;
|
||||
unsigned int cur_frame_id = meas_work->frame_id;
|
||||
struct rkisp_buffer *cur_buf = NULL;
|
||||
struct rkisp_buffer *cur_buf = stats_vdev->cur_buf;
|
||||
struct rkisp32_lite_stat_buffer *cur_stat_buf = NULL;
|
||||
u32 size = sizeof(struct rkisp32_lite_stat_buffer);
|
||||
u32 size = stats_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
|
||||
spin_lock(&stats_vdev->rd_lock);
|
||||
if (!list_empty(&stats_vdev->stat)) {
|
||||
cur_buf = list_first_entry(&stats_vdev->stat, struct rkisp_buffer, queue);
|
||||
list_del(&cur_buf->queue);
|
||||
if (hw->unite != ISP_UNITE_ONE || dev->unite_index == ISP_UNITE_LEFT) {
|
||||
spin_lock(&stats_vdev->rd_lock);
|
||||
if (!list_empty(&stats_vdev->stat)) {
|
||||
cur_buf = list_first_entry(&stats_vdev->stat, struct rkisp_buffer, queue);
|
||||
list_del(&cur_buf->queue);
|
||||
stats_vdev->cur_buf = cur_buf;
|
||||
}
|
||||
spin_unlock(&stats_vdev->rd_lock);
|
||||
}
|
||||
spin_unlock(&stats_vdev->rd_lock);
|
||||
|
||||
if (cur_buf) {
|
||||
cur_stat_buf = (struct rkisp32_lite_stat_buffer *)(cur_buf->vaddr[0]);
|
||||
cur_stat_buf = cur_buf->vaddr[0];
|
||||
if (dev->unite_index > ISP_UNITE_LEFT)
|
||||
cur_stat_buf += dev->unite_index;
|
||||
if ((dev->unite_div == ISP_UNITE_DIV2 && dev->unite_index != ISP_UNITE_RIGHT) ||
|
||||
(dev->unite_div == ISP_UNITE_DIV4 && dev->unite_index != ISP_UNITE_RIGHT_B))
|
||||
cur_buf = NULL;
|
||||
cur_stat_buf->frame_id = cur_frame_id;
|
||||
cur_stat_buf->params_id = params_vdev->cur_frame_id;
|
||||
cur_stat_buf->params.info2ddr.buf_fd = -1;
|
||||
|
|
@ -972,6 +980,7 @@ rkisp_stats_send_meas_lite(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
cur_buf->vb.sequence = cur_frame_id;
|
||||
cur_buf->vb.vb2_buf.timestamp = meas_work->timestamp;
|
||||
vb2_buffer_done(&cur_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
|
||||
stats_vdev->cur_buf = NULL;
|
||||
}
|
||||
v4l2_dbg(4, rkisp_debug, &dev->v4l2_dev,
|
||||
"%s seq:%d params_id:%d ris:0x%x buf:%p meas_type:0x%x\n",
|
||||
|
|
@ -1064,21 +1073,36 @@ rkisp_stats_rdbk_enable_v32(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
|||
stats_vdev->rdbk_mode = en;
|
||||
}
|
||||
|
||||
static void
|
||||
rkisp_get_stat_size_v32(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
int mult = stats_vdev->dev->unite_div;
|
||||
|
||||
if (stats_vdev->dev->isp_ver == ISP_V32)
|
||||
sizes[0] = ALIGN(sizeof(struct rkisp32_isp_stat_buffer), 16);
|
||||
else
|
||||
sizes[0] = sizeof(struct rkisp32_lite_stat_buffer);
|
||||
sizes[0] *= mult;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = {
|
||||
.isr_hdl = rkisp_stats_isr_v32,
|
||||
.send_meas = rkisp_stats_send_meas_v32,
|
||||
.rdbk_enable = rkisp_stats_rdbk_enable_v32,
|
||||
.get_stat_size = rkisp_get_stat_size_v32,
|
||||
};
|
||||
|
||||
void rkisp_stats_first_ddr_config_v32(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
struct rkisp_device *dev = stats_vdev->dev;
|
||||
u32 size = stats_vdev->vdev_fmt.fmt.meta.buffersize;
|
||||
u32 div = dev->hw_dev->unite ? 2 : 1;
|
||||
u32 size = 0, div = dev->unite_div;
|
||||
|
||||
if (dev->isp_sdev.in_fmt.fmt_type == FMT_YUV)
|
||||
return;
|
||||
|
||||
rkisp_get_stat_size_v32(stats_vdev, &size);
|
||||
stats_vdev->stats_buf[0].is_need_vaddr = true;
|
||||
stats_vdev->stats_buf[0].size = size;
|
||||
if (rkisp_alloc_buffer(dev, &stats_vdev->stats_buf[0]))
|
||||
|
|
@ -1107,21 +1131,13 @@ void rkisp_stats_next_ddr_config_v32(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
|
||||
void rkisp_init_stats_vdev_v32(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
int mult = stats_vdev->dev->hw_dev->unite ? 2 : 1;
|
||||
u32 size;
|
||||
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
if (stats_vdev->dev->isp_ver == ISP_V32) {
|
||||
stats_vdev->priv_ops = &stats_ddr_ops_v32;
|
||||
stats_vdev->rd_stats_from_ddr = true;
|
||||
size = ALIGN(sizeof(struct rkisp32_isp_stat_buffer), 16);
|
||||
} else {
|
||||
stats_vdev->priv_ops = NULL;
|
||||
stats_vdev->rd_stats_from_ddr = false;
|
||||
size = sizeof(struct rkisp32_lite_stat_buffer);
|
||||
}
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = size * mult;
|
||||
stats_vdev->ops = &rkisp_isp_stats_ops_tbl;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ static void isp3_module_done(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
{
|
||||
void __iomem *base;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
if (id == ISP_UNITE_LEFT || id == ISP_UNITE_LEFT_B)
|
||||
base = stats_vdev->dev->hw_dev->base_addr;
|
||||
else
|
||||
base = stats_vdev->dev->hw_dev->base_next_addr;
|
||||
|
|
@ -44,13 +44,7 @@ static void isp3_module_done(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
static u32 isp3_stats_read(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
u32 addr, u32 id)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
if (id == ISP3_LEFT)
|
||||
val = rkisp_read(stats_vdev->dev, addr, true);
|
||||
else
|
||||
val = rkisp_next_read(stats_vdev->dev, addr, true);
|
||||
return val;
|
||||
return rkisp_idx_read(stats_vdev->dev, addr, id, true);
|
||||
}
|
||||
|
||||
static int
|
||||
|
|
@ -1092,7 +1086,7 @@ rkisp_stats_isr_v3x(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
u32 iq_isr_mask = ISP3X_SIAWB_DONE | ISP3X_SIAF_FIN |
|
||||
ISP3X_EXP_END | ISP3X_SIHST_RDY | ISP3X_AFM_SUM_OF | ISP3X_AFM_LUM_OF;
|
||||
u32 cur_frame_id, isp_mis_tmp = 0, iq_3a_mask = 0;
|
||||
u32 wr_buf_idx, temp_isp_ris, temp_isp3a_ris;
|
||||
u32 i, wr_buf_idx, temp_isp_ris, temp_isp3a_ris;
|
||||
|
||||
rkisp_dmarx_get_frame(stats_vdev->dev, &cur_frame_id, NULL, NULL, true);
|
||||
|
||||
|
|
@ -1136,12 +1130,10 @@ rkisp_stats_isr_v3x(struct rkisp_isp_stats_vdev *stats_vdev,
|
|||
stats_vdev->wr_buf_idx = wr_buf_idx;
|
||||
rkisp_finish_buffer(dev, &stats_vdev->stats_buf[wr_buf_idx]);
|
||||
|
||||
rkisp_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[wr_buf_idx].dma_addr, false);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[wr_buf_idx].dma_addr +
|
||||
ISP3X_RD_STATS_BUF_SIZE, false);
|
||||
for (i = 0; i < dev->unite_div; i++)
|
||||
rkisp_idx_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[wr_buf_idx].dma_addr +
|
||||
i * ISP3X_RD_STATS_BUF_SIZE, i, false);
|
||||
}
|
||||
|
||||
if (isp_ris & ISP3X_FRAME) {
|
||||
|
|
@ -1169,16 +1161,27 @@ rkisp_stats_rdbk_enable_v3x(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
|||
stats_vdev->rdbk_mode = en;
|
||||
}
|
||||
|
||||
static void
|
||||
rkisp_get_stat_size_v3x(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
unsigned int sizes[])
|
||||
{
|
||||
int mult = stats_vdev->dev->unite_div;
|
||||
|
||||
sizes[0] = sizeof(struct rkisp3x_isp_stat_buffer) * mult;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize = sizes[0];
|
||||
}
|
||||
|
||||
static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = {
|
||||
.isr_hdl = rkisp_stats_isr_v3x,
|
||||
.send_meas = rkisp_stats_send_meas_v3x,
|
||||
.rdbk_enable = rkisp_stats_rdbk_enable_v3x,
|
||||
.get_stat_size = rkisp_get_stat_size_v3x,
|
||||
};
|
||||
|
||||
void rkisp_stats_first_ddr_config_v3x(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
struct rkisp_device *dev = stats_vdev->dev;
|
||||
int i, mult = dev->hw_dev->unite ? 2 : 1;
|
||||
int i, mult = dev->unite_div;
|
||||
|
||||
if (dev->isp_sdev.in_fmt.fmt_type == FMT_YUV)
|
||||
return;
|
||||
|
|
@ -1202,12 +1205,10 @@ void rkisp_stats_first_ddr_config_v3x(struct rkisp_isp_stats_vdev *stats_vdev)
|
|||
ISP3X_RD_STATS_BUF_SIZE, false);
|
||||
rkisp_unite_set_bits(dev, ISP3X_SWS_CFG, 0,
|
||||
ISP3X_3A_DDR_WRITE_EN, false);
|
||||
rkisp_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[0].dma_addr, false);
|
||||
if (dev->hw_dev->unite)
|
||||
rkisp_next_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[0].dma_addr +
|
||||
ISP3X_RD_STATS_BUF_SIZE, false);
|
||||
for (i = 0; i < dev->unite_div; i++)
|
||||
rkisp_idx_write(dev, ISP3X_MI_3A_WR_BASE,
|
||||
stats_vdev->stats_buf[0].dma_addr +
|
||||
i * ISP3X_RD_STATS_BUF_SIZE, i, false);
|
||||
|
||||
return;
|
||||
err:
|
||||
|
|
@ -1218,13 +1219,6 @@ err:
|
|||
|
||||
void rkisp_init_stats_vdev_v3x(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
int mult = stats_vdev->dev->hw_dev->unite ? 2 : 1;
|
||||
|
||||
stats_vdev->vdev_fmt.fmt.meta.dataformat =
|
||||
V4L2_META_FMT_RK_ISP1_STAT_3A;
|
||||
stats_vdev->vdev_fmt.fmt.meta.buffersize =
|
||||
mult * sizeof(struct rkisp3x_isp_stat_buffer);
|
||||
|
||||
stats_vdev->ops = &rkisp_isp_stats_ops_tbl;
|
||||
stats_vdev->priv_ops = &stats_reg_ops_v3x;
|
||||
stats_vdev->rd_stats_from_ddr = false;
|
||||
|
|
|
|||
|
|
@ -380,242 +380,242 @@ static void isp30_unite_show(struct rkisp_device *dev, struct seq_file *p)
|
|||
};
|
||||
u32 v0, v1;
|
||||
|
||||
v0 = rkisp_read(dev, ISP3X_CMSK_CTRL0, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_CMSK_CTRL0, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_CMSK_CTRL0, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_CMSK_CTRL0, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CMSK",
|
||||
(v0 & 1) ? "ON" : "OFF",
|
||||
v0, (v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_DPCC0_MODE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DPCC0_MODE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DPCC0_MODE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DPCC0_MODE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"DPCC0",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_DPCC1_MODE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DPCC1_MODE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DPCC1_MODE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DPCC1_MODE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"DPCC1",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_DPCC2_MODE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DPCC2_MODE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DPCC2_MODE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DPCC2_MODE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"DPCC2",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_BLS_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_BLS_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_BLS_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_BLS_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"BLS",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"SDG",
|
||||
(v0 & BIT(6)) ? "ON" : "OFF", v0,
|
||||
(v1 & BIT(6)) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_LSC_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_LSC_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_LSC_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_LSC_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"LSC",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x) gain:0x%08x 0x%08x, Right %s(0x%x) gain:0x%08x 0x%08x\n",
|
||||
"AWBGAIN",
|
||||
(v0 & BIT(7)) ? "ON" : "OFF", v0,
|
||||
rkisp_read(dev, ISP3X_ISP_AWB_GAIN0_G, false),
|
||||
rkisp_read(dev, ISP3X_ISP_AWB_GAIN0_RB, false),
|
||||
rkisp_idx_read(dev, ISP3X_ISP_AWB_GAIN0_G, ISP_UNITE_LEFT, false),
|
||||
rkisp_idx_read(dev, ISP3X_ISP_AWB_GAIN0_RB, ISP_UNITE_LEFT, false),
|
||||
(v1 & BIT(7)) ? "ON" : "OFF", v1,
|
||||
rkisp_next_read(dev, ISP3X_ISP_AWB_GAIN0_G, false),
|
||||
rkisp_next_read(dev, ISP3X_ISP_AWB_GAIN0_RB, false));
|
||||
v0 = rkisp_read(dev, ISP3X_DEBAYER_CONTROL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DEBAYER_CONTROL, false);
|
||||
rkisp_idx_read(dev, ISP3X_ISP_AWB_GAIN0_G, ISP_UNITE_RIGHT, false),
|
||||
rkisp_idx_read(dev, ISP3X_ISP_AWB_GAIN0_RB, ISP_UNITE_RIGHT, false));
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DEBAYER_CONTROL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DEBAYER_CONTROL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"DEBAYER",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_CCM_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_CCM_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_CCM_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_CCM_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CCM",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_GAMMA_OUT_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_GAMMA_OUT_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_GAMMA_OUT_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_GAMMA_OUT_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"GAMMA_OUT",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_CPROC_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_CPROC_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_CPROC_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_CPROC_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CPROC",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_IMG_EFF_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_IMG_EFF_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_IMG_EFF_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_IMG_EFF_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x) effect:%s, Right %s(0x%x) effect:%s\n",
|
||||
"IE",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
effect[(v0 & CIF_IMG_EFF_CTRL_MODE_MASK) >> 1],
|
||||
(v1 & 1) ? "ON" : "OFF", v1,
|
||||
effect[(v1 & CIF_IMG_EFF_CTRL_MODE_MASK) >> 1]);
|
||||
v0 = rkisp_read(dev, ISP3X_DRC_CTRL0, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DRC_CTRL0, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DRC_CTRL0, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DRC_CTRL0, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"HDRDRC",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_HDRMGE_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_HDRMGE_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_HDRMGE_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_HDRMGE_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"HDRMGE",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_BAYNR_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_BAYNR_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_BAYNR_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_BAYNR_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"BAYNR",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_BAY3D_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_BAY3D_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_BAY3D_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_BAY3D_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"BAY3D",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_YNR_GLOBAL_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_YNR_GLOBAL_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_YNR_GLOBAL_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_YNR_GLOBAL_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"YNR",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_CNR_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_CNR_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_CNR_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_CNR_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CNR",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_SHARP_EN, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_SHARP_EN, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_SHARP_EN, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_SHARP_EN, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"SHARP",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_GIC_CONTROL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_GIC_CONTROL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_GIC_CONTROL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_GIC_CONTROL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"GIC",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_DHAZ_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_DHAZ_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_DHAZ_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_DHAZ_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"DHAZ",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_3DLUT_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_3DLUT_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_3DLUT_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_3DLUT_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"3DLUT",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_LDCH_STS, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_LDCH_STS, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_LDCH_STS, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_LDCH_STS, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"LDCH",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_CTRL0, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_CTRL0, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CSM",
|
||||
(v0 & full_range_flg) ? "FULL" : "LIMIT", v0,
|
||||
(v1 & full_range_flg) ? "FULL" : "LIMIT", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_CAC_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_CAC_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_CAC_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_CAC_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"CAC",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_GAIN_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_GAIN_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_GAIN_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_GAIN_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"GAIN",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAF_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAF_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAF_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAF_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAF",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAWB_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAWB_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAWB_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAWB_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAWB",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAE_LITE_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAE_LITE_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAE_LITE_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAE_LITE_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAE0",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAE_BIG2_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAE_BIG2_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG2_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG2_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAE1",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAE_BIG3_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAE_BIG3_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG3_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG3_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAE2",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWAE_BIG1_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWAE_BIG1_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG1_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWAE_BIG1_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWAE3",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWHIST_LITE_CTRL, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWHIST_LITE_CTRL, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWHIST_LITE_CTRL, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWHIST_LITE_CTRL, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWHIST0",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWHIST_BIG2_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWHIST_BIG2_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG2_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG2_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWHIST1",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWHIST_BIG3_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWHIST_BIG3_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG3_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG3_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWHIST2",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_RAWHIST_BIG1_BASE, false);
|
||||
v1 = rkisp_next_read(dev, ISP3X_RAWHIST_BIG1_BASE, false);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG1_BASE, ISP_UNITE_LEFT, false);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_RAWHIST_BIG1_BASE, ISP_UNITE_RIGHT, false);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"RAWHIST3",
|
||||
(v0 & 1) ? "ON" : "OFF", v0,
|
||||
(v1 & 1) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_CTRL1, true);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_CTRL1, true);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_CTRL1, ISP_UNITE_LEFT, true);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_CTRL1, ISP_UNITE_RIGHT, true);
|
||||
seq_printf(p, "%-10s Left %s(0x%x), Right %s(0x%x)\n",
|
||||
"BigMode",
|
||||
v0 & BIT(28) ? "ON" : "OFF", v0,
|
||||
v1 & BIT(28) ? "ON" : "OFF", v1);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_DEBUG1, true);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_DEBUG1, true);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG1, ISP_UNITE_LEFT, true);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG1, ISP_UNITE_RIGHT, true);
|
||||
seq_printf(p, "%-10s space full status group. Left:0x%x Right:0x%x\n"
|
||||
"\t ibuf2(L:0x%x R:0x%x) ibuf1(L:0x%x R:0x%x)\n"
|
||||
"\t ibuf0(L:0x%x R:0x%x) mpfbc_infifo(L:0x%x R:0x%x)\n"
|
||||
|
|
@ -626,8 +626,8 @@ static void isp30_unite_show(struct rkisp_device *dev, struct seq_file *p)
|
|||
(v0 >> 20) & 0xf, (v1 >> 20) & 0xf, (v0 >> 16) & 0xf, (v1 >> 16) & 0xf,
|
||||
(v0 >> 12) & 0xf, (v1 >> 12) & 0xf, (v0 >> 8) & 0xf, (v1 >> 8) & 0xf,
|
||||
(v0 >> 4) & 0xf, (v1 >> 4) & 0xf, v0 & 0xf, v1 & 0xf);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_DEBUG2, true);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_DEBUG2, true);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG2, ISP_UNITE_LEFT, true);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG2, ISP_UNITE_RIGHT, true);
|
||||
seq_printf(p, "%-10s Left:0x%x Right:0x%x\n"
|
||||
"\t bay3d_fifo_full iir(L:%d R:%d) cur(L:%d R:%d)\n"
|
||||
"\t module outform vertical counter(L:%d R:%d), out frame counter:(L:%d R:%d)\n"
|
||||
|
|
@ -636,8 +636,8 @@ static void isp30_unite_show(struct rkisp_device *dev, struct seq_file *p)
|
|||
!!(v0 & BIT(31)), !!(v1 & BIT(31)), !!(v0 & BIT(30)), !!(v1 & BIT(30)),
|
||||
(v0 >> 16) & 0x3fff, (v1 >> 16) & 0x3fff, (v0 >> 14) & 0x3, (v1 >> 14) & 0x3,
|
||||
v0 & 0x3fff, v1 & 0x3fff);
|
||||
v0 = rkisp_read(dev, ISP3X_ISP_DEBUG3, true);
|
||||
v1 = rkisp_next_read(dev, ISP3X_ISP_DEBUG3, true);
|
||||
v0 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG3, ISP_UNITE_LEFT, true);
|
||||
v1 = rkisp_idx_read(dev, ISP3X_ISP_DEBUG3, ISP_UNITE_RIGHT, true);
|
||||
seq_printf(p, "%-10s isp pipeline group Left:0x%x Right:0x%x\n"
|
||||
"\t mge(L:%d %d R:%d %d) rawnr(L:%d %d R:%d %d)\n"
|
||||
"\t bay3d(L:%d %d R:%d %d) tmo(L:%d %d R:%d %d)\n"
|
||||
|
|
@ -976,14 +976,14 @@ static int isp_show(struct seq_file *p, void *v)
|
|||
rkisp_read(dev, i + 12, true));
|
||||
} else {
|
||||
seq_printf(p, "%04x: %08x %08x %08x %08x | %08x %08x %08x %08x\n", i,
|
||||
rkisp_read(dev, i, true),
|
||||
rkisp_read(dev, i + 4, true),
|
||||
rkisp_read(dev, i + 8, true),
|
||||
rkisp_read(dev, i + 12, true),
|
||||
rkisp_next_read(dev, i, true),
|
||||
rkisp_next_read(dev, i + 4, true),
|
||||
rkisp_next_read(dev, i + 8, true),
|
||||
rkisp_next_read(dev, i + 12, true));
|
||||
rkisp_idx_read(dev, i, ISP_UNITE_LEFT, true),
|
||||
rkisp_idx_read(dev, i + 4, ISP_UNITE_LEFT, true),
|
||||
rkisp_idx_read(dev, i + 8, ISP_UNITE_LEFT, true),
|
||||
rkisp_idx_read(dev, i + 12, ISP_UNITE_LEFT, true),
|
||||
rkisp_idx_read(dev, i, ISP_UNITE_RIGHT, true),
|
||||
rkisp_idx_read(dev, i + 4, ISP_UNITE_RIGHT, true),
|
||||
rkisp_idx_read(dev, i + 8, ISP_UNITE_RIGHT, true),
|
||||
rkisp_idx_read(dev, i + 12, ISP_UNITE_RIGHT, true));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,11 +53,10 @@ void rkisp_config_dcrop(struct rkisp_stream *stream,
|
|||
{
|
||||
struct rkisp_device *dev = stream->ispdev;
|
||||
u32 val = stream->config->dual_crop.yuvmode_mask;
|
||||
bool is_unite = !!dev->hw_dev->unite;
|
||||
struct v4l2_rect tmp = *rect;
|
||||
u32 reg;
|
||||
|
||||
if (is_unite) {
|
||||
if (dev->unite_div > ISP_UNITE_DIV1) {
|
||||
tmp.width /= 2;
|
||||
if (stream->id == RKISP_STREAM_FBC)
|
||||
tmp.width &= ~0xf;
|
||||
|
|
@ -67,6 +66,8 @@ void rkisp_config_dcrop(struct rkisp_stream *stream,
|
|||
reg = stream->config->dual_crop.h_size;
|
||||
rkisp_write(dev, reg, tmp.width, false);
|
||||
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
tmp.height /= 2;
|
||||
reg = stream->config->dual_crop.v_offset;
|
||||
rkisp_unite_write(dev, reg, tmp.top, false);
|
||||
reg = stream->config->dual_crop.v_size;
|
||||
|
|
@ -76,21 +77,23 @@ void rkisp_config_dcrop(struct rkisp_stream *stream,
|
|||
val |= CIF_DUAL_CROP_GEN_CFG_UPD;
|
||||
else
|
||||
val |= CIF_DUAL_CROP_CFG_UPD;
|
||||
if (is_unite) {
|
||||
|
||||
if (dev->unite_div > ISP_UNITE_DIV1) {
|
||||
u32 right_w, left_w = tmp.width;
|
||||
|
||||
reg = stream->config->dual_crop.h_offset;
|
||||
rkisp_next_write(dev, reg, RKMOUDLE_UNITE_EXTEND_PIXEL, false);
|
||||
rkisp_idx_write(dev, reg, RKMOUDLE_UNITE_EXTEND_PIXEL, ISP_UNITE_RIGHT, false);
|
||||
reg = stream->config->dual_crop.h_size;
|
||||
right_w = rect->width - left_w;
|
||||
rkisp_next_write(dev, reg, right_w, false);
|
||||
rkisp_idx_write(dev, reg, right_w, ISP_UNITE_RIGHT, false);
|
||||
|
||||
reg = stream->config->dual_crop.ctrl;
|
||||
rkisp_next_set_bits(dev, reg, 0, val, false);
|
||||
rkisp_idx_set_bits(dev, reg, 0, val, ISP_UNITE_RIGHT, false);
|
||||
/* output with scale */
|
||||
if (stream->out_fmt.width < rect->width) {
|
||||
left_w += RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
reg = stream->config->dual_crop.h_size;
|
||||
rkisp_write(dev, reg, left_w, false);
|
||||
rkisp_idx_write(dev, reg, left_w, ISP_UNITE_LEFT, false);
|
||||
}
|
||||
v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
|
||||
"left dcrop (%d, %d) %dx%d\n",
|
||||
|
|
@ -99,6 +102,23 @@ void rkisp_config_dcrop(struct rkisp_stream *stream,
|
|||
"right dcrop (%d, %d) %dx%d\n",
|
||||
RKMOUDLE_UNITE_EXTEND_PIXEL, tmp.top, right_w, tmp.height);
|
||||
}
|
||||
if (dev->unite_div == ISP_UNITE_DIV4) {
|
||||
reg = stream->config->dual_crop.h_offset;
|
||||
rkisp_idx_write(dev, reg, tmp.left, ISP_UNITE_LEFT_B, false);
|
||||
rkisp_idx_write(dev, reg, RKMOUDLE_UNITE_EXTEND_PIXEL, ISP_UNITE_RIGHT_B, false);
|
||||
|
||||
reg = stream->config->dual_crop.h_size;
|
||||
rkisp_idx_write(dev, reg, tmp.width, ISP_UNITE_LEFT_B, false);
|
||||
rkisp_idx_write(dev, reg, tmp.width, ISP_UNITE_RIGHT_B, false);
|
||||
|
||||
reg = stream->config->dual_crop.v_offset;
|
||||
rkisp_idx_write(dev, reg, RKMOUDLE_UNITE_EXTEND_PIXEL, ISP_UNITE_LEFT_B, false);
|
||||
rkisp_idx_write(dev, reg, RKMOUDLE_UNITE_EXTEND_PIXEL, ISP_UNITE_RIGHT_B, false);
|
||||
|
||||
reg = stream->config->dual_crop.ctrl;
|
||||
rkisp_idx_set_bits(dev, reg, 0, val, ISP_UNITE_LEFT_B, false);
|
||||
rkisp_idx_set_bits(dev, reg, 0, val, ISP_UNITE_RIGHT_B, false);
|
||||
}
|
||||
if (val) {
|
||||
reg = stream->config->dual_crop.ctrl;
|
||||
rkisp_set_bits(dev, reg, 0, val, false);
|
||||
|
|
@ -218,7 +238,7 @@ static void set_scale(struct rkisp_stream *stream, struct v4l2_rect *in_y,
|
|||
rkisp_write(dev, scale_vc_addr, scale_vc, false);
|
||||
}
|
||||
|
||||
if (dev->hw_dev->unite) {
|
||||
if (dev->unite_div > ISP_UNITE_DIV1) {
|
||||
u32 hy_size_reg, hc_size_reg, hy_offs_mi_reg, hc_offs_mi_reg, in_crop_offs_reg;
|
||||
u32 isp_in_w = in_y->width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
u32 scl_w = out_y->width / 2;
|
||||
|
|
@ -271,11 +291,13 @@ static void set_scale(struct rkisp_stream *stream, struct v4l2_rect *in_y,
|
|||
|
||||
extend = right_crop_y & ~0x1;
|
||||
reg = stream->config->dual_crop.h_offset;
|
||||
rkisp_next_write(dev, reg, extend, false);
|
||||
rkisp_idx_write(dev, reg, extend, ISP_UNITE_RIGHT, false);
|
||||
reg = stream->config->dual_crop.h_size;
|
||||
rkisp_next_write(dev, reg, isp_in_w - extend, false);
|
||||
rkisp_idx_write(dev, reg, isp_in_w - extend, ISP_UNITE_RIGHT, false);
|
||||
reg = stream->config->dual_crop.ctrl;
|
||||
rkisp_next_write(dev, reg, rkisp_next_read_reg_cache(dev, reg), false);
|
||||
rkisp_idx_write(dev, reg,
|
||||
rkisp_idx_read_reg_cache(dev, reg, ISP_UNITE_RIGHT),
|
||||
ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
right_scl_in_y = right_crop_y - extend;
|
||||
right_scl_in_c = right_crop_c - extend;
|
||||
|
|
@ -288,25 +310,26 @@ static void set_scale(struct rkisp_stream *stream, struct v4l2_rect *in_y,
|
|||
rkisp_write(dev, in_crop_offs_reg, 0, false);
|
||||
|
||||
/* right isp */
|
||||
rkisp_next_write(dev, hy_size_reg, scl_w, false);
|
||||
rkisp_next_write(dev, hc_size_reg, scl_w, false);
|
||||
rkisp_next_write(dev, scale_hy_addr, scale_hy, false);
|
||||
rkisp_next_write(dev, scale_hcb_addr, scale_hc, false);
|
||||
rkisp_next_write(dev, scale_hcr_addr, scale_hc, false);
|
||||
rkisp_next_write(dev, scale_vy_addr, scale_vy, false);
|
||||
rkisp_next_write(dev, scale_vc_addr, scale_vc, false);
|
||||
rkisp_next_write(dev, stream->config->rsz.phase_hy, phase_left_y, false);
|
||||
rkisp_next_write(dev, stream->config->rsz.phase_hc, phase_left_c, false);
|
||||
rkisp_next_write(dev, stream->config->rsz.phase_vy, 0, false);
|
||||
rkisp_next_write(dev, stream->config->rsz.phase_vc, 0, false);
|
||||
rkisp_next_write(dev, hy_offs_mi_reg, scl_w & 15, false);
|
||||
rkisp_next_write(dev, hc_offs_mi_reg, scl_w & 15, false);
|
||||
rkisp_next_write(dev, in_crop_offs_reg,
|
||||
right_scl_in_c << 4 | right_scl_in_y, false);
|
||||
rkisp_idx_write(dev, hy_size_reg, scl_w, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, hc_size_reg, scl_w, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, scale_hy_addr, scale_hy, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, scale_hcb_addr, scale_hc, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, scale_hcr_addr, scale_hc, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, scale_vy_addr, scale_vy, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, scale_vc_addr, scale_vc, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, stream->config->rsz.phase_hy, phase_left_y, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, stream->config->rsz.phase_hc, phase_left_c, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, stream->config->rsz.phase_vy, 0, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, stream->config->rsz.phase_vc, 0, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, hy_offs_mi_reg, scl_w & 15, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, hc_offs_mi_reg, scl_w & 15, ISP_UNITE_RIGHT, false);
|
||||
rkisp_idx_write(dev, in_crop_offs_reg,
|
||||
right_scl_in_c << 4 | right_scl_in_y, ISP_UNITE_RIGHT, false);
|
||||
|
||||
rsz_ctrl |= ISP3X_SCL_CLIP_EN;
|
||||
rkisp_next_write(dev, rsz_ctrl_addr,
|
||||
rsz_ctrl | ISP3X_SCL_HPHASE_EN | ISP3X_SCL_IN_CLIP_EN, false);
|
||||
rkisp_idx_write(dev, rsz_ctrl_addr,
|
||||
rsz_ctrl | ISP3X_SCL_HPHASE_EN | ISP3X_SCL_IN_CLIP_EN,
|
||||
ISP_UNITE_RIGHT, false);
|
||||
v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
|
||||
"scl:%dx%d, scl factor[hy:%d hc:%d vy:%d vc:%d]\n",
|
||||
scl_w, out_y->height, scale_hy, scale_hc, scale_vy, scale_vc);
|
||||
|
|
@ -328,12 +351,12 @@ static void set_bilinear_scale(struct rkisp_stream *stream, struct v4l2_rect *in
|
|||
u32 rsz_ctrl = 0, val, hy, hc;
|
||||
bool is_avg = false;
|
||||
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_HY_OFFS, 0, true);
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_HC_OFFS, 0, true);
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_PHASE_HY, 0, true);
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_PHASE_HC, 0, true);
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_PHASE_VY, 0, true);
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_PHASE_VC, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_HY_OFFS, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_HC_OFFS, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_PHASE_HY, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_PHASE_HC, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_PHASE_VY, 0, true);
|
||||
rkisp_unite_write(dev, ISP32_SELF_SCALE_PHASE_VC, 0, true);
|
||||
|
||||
val = in_y->width | in_y->height << 16;
|
||||
rkisp_write(dev, ISP32_SELF_SCALE_SRC_SIZE, val, false);
|
||||
|
|
@ -386,10 +409,10 @@ void rkisp_config_rsz(struct rkisp_stream *stream, struct v4l2_rect *in_y,
|
|||
}
|
||||
|
||||
/* No phase offset */
|
||||
rkisp_write(dev, stream->config->rsz.phase_hy, 0, true);
|
||||
rkisp_write(dev, stream->config->rsz.phase_hc, 0, true);
|
||||
rkisp_write(dev, stream->config->rsz.phase_vy, 0, true);
|
||||
rkisp_write(dev, stream->config->rsz.phase_vc, 0, true);
|
||||
rkisp_unite_write(dev, stream->config->rsz.phase_hy, 0, true);
|
||||
rkisp_unite_write(dev, stream->config->rsz.phase_hc, 0, true);
|
||||
rkisp_unite_write(dev, stream->config->rsz.phase_vy, 0, true);
|
||||
rkisp_unite_write(dev, stream->config->rsz.phase_vc, 0, true);
|
||||
|
||||
/* Linear interpolation */
|
||||
for (i = 0; i < 64; i++) {
|
||||
|
|
|
|||
|
|
@ -2696,15 +2696,10 @@ static inline void mi_raw_length(struct rkisp_stream *stream)
|
|||
stream->config->mi.length == MI_RAW1_RD_LENGTH ||
|
||||
stream->config->mi.length == MI_RAW2_RD_LENGTH)
|
||||
is_direct = false;
|
||||
rkisp_write(stream->ispdev, stream->config->mi.length,
|
||||
stream->out_fmt.plane_fmt[0].bytesperline, is_direct);
|
||||
rkisp_unite_write(stream->ispdev, stream->config->mi.length,
|
||||
stream->out_fmt.plane_fmt[0].bytesperline, is_direct);
|
||||
if (stream->ispdev->isp_ver == ISP_V21 || stream->ispdev->isp_ver == ISP_V30)
|
||||
rkisp_set_bits(stream->ispdev, MI_RD_CTRL2, 0, BIT(30), false);
|
||||
if (stream->ispdev->hw_dev->unite) {
|
||||
rkisp_next_write(stream->ispdev, stream->config->mi.length,
|
||||
stream->out_fmt.plane_fmt[0].bytesperline, is_direct);
|
||||
rkisp_next_set_bits(stream->ispdev, MI_RD_CTRL2, 0, BIT(30), false);
|
||||
}
|
||||
rkisp_unite_set_bits(stream->ispdev, MI_RD_CTRL2, 0, BIT(30), false);
|
||||
}
|
||||
|
||||
static inline void rx_force_upd(void __iomem *base)
|
||||
|
|
|
|||
|
|
@ -219,8 +219,10 @@ int rkisp_align_sensor_resolution(struct rkisp_device *dev,
|
|||
CIF_ISP_INPUT_H_MAX_V32_UNITE : CIF_ISP_INPUT_H_MAX_V32;
|
||||
break;
|
||||
case ISP_V32_L:
|
||||
max_w = CIF_ISP_INPUT_W_MAX_V32_L;
|
||||
max_h = CIF_ISP_INPUT_H_MAX_V32_L;
|
||||
max_w = dev->hw_dev->unite ?
|
||||
CIF_ISP_INPUT_W_MAX_V32_L_UNITE : CIF_ISP_INPUT_W_MAX_V32_L;
|
||||
max_h = dev->hw_dev->unite ?
|
||||
CIF_ISP_INPUT_H_MAX_V32_L_UNITE : CIF_ISP_INPUT_H_MAX_V32_L;
|
||||
break;
|
||||
default:
|
||||
max_w = CIF_ISP_INPUT_W_MAX;
|
||||
|
|
@ -494,7 +496,7 @@ static void rkisp_dvfs(struct rkisp_device *dev)
|
|||
{
|
||||
struct rkisp_hw_dev *hw = dev->hw_dev;
|
||||
u64 data_rate = 0;
|
||||
int i, fps, num = 0;
|
||||
int i, fps, size, num = 0;
|
||||
|
||||
if (!hw->is_dvfs)
|
||||
return;
|
||||
|
|
@ -505,7 +507,8 @@ static void rkisp_dvfs(struct rkisp_device *dev)
|
|||
fps = hw->isp_size[i].fps;
|
||||
if (!fps)
|
||||
fps = 30;
|
||||
data_rate += (fps * hw->isp_size[i].size);
|
||||
size = hw->isp_size[i].size * hw->isp[i]->unite_div;
|
||||
data_rate += (fps * size);
|
||||
num++;
|
||||
}
|
||||
do_div(data_rate, 1000 * 1000);
|
||||
|
|
@ -937,8 +940,10 @@ static void rkisp_rdbk_trigger_handle(struct rkisp_device *dev, u32 cmd)
|
|||
is_try = true;
|
||||
times = 0;
|
||||
if (hw->unite == ISP_UNITE_ONE) {
|
||||
if (dev->sw_rd_cnt < 2)
|
||||
if (hw->is_multi_overflow && dev->sw_rd_cnt < 2)
|
||||
isp->unite_index = ISP_UNITE_RIGHT;
|
||||
else if (hw->is_frm_buf)
|
||||
isp->unite_index++;
|
||||
if (!hw->is_multi_overflow || (dev->sw_rd_cnt & 0x1))
|
||||
is_try = false;
|
||||
}
|
||||
|
|
@ -998,24 +1003,27 @@ static void rkisp_rdbk_trigger_handle(struct rkisp_device *dev, u32 cmd)
|
|||
hw->is_idle = false;
|
||||
/* this frame will read count by isp */
|
||||
isp->sw_rd_cnt = 0;
|
||||
/* frame double for multi camera resolution out of hardware limit
|
||||
* first for HW save this camera information, and second to output image
|
||||
*/
|
||||
isp->is_frame_double = false;
|
||||
if (hw->is_multi_overflow &&
|
||||
(hw->unite == ISP_UNITE_ONE ||
|
||||
(hw->pre_dev_id != -1 && hw->pre_dev_id != id))) {
|
||||
isp->is_frame_double = true;
|
||||
isp->sw_rd_cnt = 1;
|
||||
times = 0;
|
||||
}
|
||||
/* resolution out of hardware limit
|
||||
* frame is vertically divided into left and right
|
||||
*/
|
||||
isp->unite_index = ISP_UNITE_LEFT;
|
||||
if (hw->unite == ISP_UNITE_ONE) {
|
||||
isp->sw_rd_cnt *= 2;
|
||||
isp->sw_rd_cnt += 1;
|
||||
if (hw->is_multi_overflow) {
|
||||
/* frame double for multi camera resolution out of hardware limit
|
||||
* first for HW save this camera information, and second to output image
|
||||
*/
|
||||
if ((hw->unite == ISP_UNITE_ONE ||
|
||||
(hw->pre_dev_id != -1 && hw->pre_dev_id != id))) {
|
||||
isp->is_frame_double = true;
|
||||
isp->sw_rd_cnt = 1;
|
||||
times = 0;
|
||||
}
|
||||
/* resolution out of hardware limit
|
||||
* frame is vertically divided into left and right
|
||||
*/
|
||||
if (hw->unite == ISP_UNITE_ONE) {
|
||||
isp->sw_rd_cnt *= 2;
|
||||
isp->sw_rd_cnt += 1;
|
||||
}
|
||||
} else if (hw->is_frm_buf) {
|
||||
isp->sw_rd_cnt += (isp->unite_div - 1);
|
||||
}
|
||||
/* first frame handle twice for thunderboot
|
||||
* first output stats to AIQ and wait new params to run second
|
||||
|
|
@ -1180,15 +1188,17 @@ static void rkisp_config_ism(struct rkisp_device *dev)
|
|||
{
|
||||
struct v4l2_rect *out_crop = &dev->isp_sdev.out_crop;
|
||||
u32 width = out_crop->width, mult = 1;
|
||||
u32 unite = dev->hw_dev->unite;
|
||||
u32 height = out_crop->height;
|
||||
|
||||
/* isp2.0 no ism */
|
||||
if (dev->isp_ver == ISP_V20 || dev->isp_ver == ISP_V21 ||
|
||||
dev->isp_ver == ISP_V32_L)
|
||||
return;
|
||||
|
||||
if (unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
rkisp_unite_write(dev, CIF_ISP_IS_RECENTER, 0, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_IS_MAX_DX, 0, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_IS_MAX_DY, 0, false);
|
||||
|
|
@ -1198,7 +1208,7 @@ static void rkisp_config_ism(struct rkisp_device *dev)
|
|||
rkisp_unite_write(dev, CIF_ISP_IS_H_SIZE, width, false);
|
||||
if (dev->cap_dev.stream[RKISP_STREAM_SP].interlaced)
|
||||
mult = 2;
|
||||
rkisp_unite_write(dev, CIF_ISP_IS_V_SIZE, out_crop->height / mult, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_IS_V_SIZE, height / mult, false);
|
||||
|
||||
if (dev->isp_ver == ISP_V30 || dev->isp_ver == ISP_V32)
|
||||
return;
|
||||
|
|
@ -1533,18 +1543,17 @@ static void rkisp_config_cmsk_dual(struct rkisp_device *dev,
|
|||
val = ISP3X_SW_CMSK_YUV(left.win[i].cover_color_y,
|
||||
left.win[i].cover_color_u,
|
||||
left.win[i].cover_color_v);
|
||||
rkisp_write(dev, ISP3X_CMSK_YUV0 + i * 4, val, false);
|
||||
rkisp_next_write(dev, ISP3X_CMSK_YUV0 + i * 4, val, false);
|
||||
rkisp_unite_write(dev, ISP3X_CMSK_YUV0 + i * 4, val, false);
|
||||
|
||||
val = ISP_PACK_2SHORT(left.win[i].h_offs, left.win[i].v_offs);
|
||||
rkisp_write(dev, ISP3X_CMSK_OFFS0 + i * 8, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_OFFS0 + i * 8, val, ISP_UNITE_LEFT, false);
|
||||
val = ISP_PACK_2SHORT(left.win[i].h_size, left.win[i].v_size);
|
||||
rkisp_write(dev, ISP3X_CMSK_SIZE0 + i * 8, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_SIZE0 + i * 8, val, ISP_UNITE_LEFT, false);
|
||||
|
||||
val = ISP_PACK_2SHORT(right.win[i].h_offs, right.win[i].v_offs);
|
||||
rkisp_next_write(dev, ISP3X_CMSK_OFFS0 + i * 8, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_OFFS0 + i * 8, val, ISP_UNITE_RIGHT, false);
|
||||
val = ISP_PACK_2SHORT(right.win[i].h_size, right.win[i].v_size);
|
||||
rkisp_next_write(dev, ISP3X_CMSK_SIZE0 + i * 8, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_SIZE0 + i * 8, val, ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
|
||||
w += RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
|
@ -1577,33 +1586,34 @@ static void rkisp_config_cmsk_dual(struct rkisp_device *dev,
|
|||
ctrl = 0;
|
||||
if (right.win[0].win_en) {
|
||||
ctrl |= ISP3X_SW_CMSK_EN_MP;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL1, right.win[0].win_en, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL1, right.win[0].win_en, ISP_UNITE_RIGHT, false);
|
||||
val = right.win[0].mode;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL4, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL4, val, ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
if (right.win[1].win_en) {
|
||||
ctrl |= ISP3X_SW_CMSK_EN_SP;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL2, right.win[1].win_en, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL2, right.win[1].win_en, ISP_UNITE_RIGHT, false);
|
||||
val = right.win[1].mode;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL5, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL5, val, ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
if (right.win[2].win_en) {
|
||||
ctrl |= ISP3X_SW_CMSK_EN_BP;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL3, right.win[2].win_en, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL3, right.win[2].win_en, ISP_UNITE_RIGHT, false);
|
||||
val = right.win[2].mode;
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL6, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL6, val, ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
if (ctrl) {
|
||||
val = ISP_PACK_2SHORT(w, height);
|
||||
rkisp_next_write(dev, ISP3X_CMSK_PIC_SIZE, val, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_PIC_SIZE, val, ISP_UNITE_RIGHT, false);
|
||||
ctrl |= ISP3X_SW_CMSK_EN | ISP3X_SW_CMSK_ORDER_MODE;
|
||||
}
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL0, ctrl, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL0, ctrl, ISP_UNITE_RIGHT, false);
|
||||
|
||||
val = rkisp_next_read(dev, ISP3X_CMSK_CTRL0, true);
|
||||
val = rkisp_idx_read(dev, ISP3X_CMSK_CTRL0, ISP_UNITE_RIGHT, true);
|
||||
if (dev->hw_dev->is_single &&
|
||||
((val & ISP32_SW_CMSK_EN_PATH) != (val & ISP32_SW_CMSK_EN_PATH_SHD)))
|
||||
rkisp_next_write(dev, ISP3X_CMSK_CTRL0, val | ISP3X_SW_CMSK_FORCE_UPD, false);
|
||||
rkisp_idx_write(dev, ISP3X_CMSK_CTRL0, val | ISP3X_SW_CMSK_FORCE_UPD,
|
||||
ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
|
||||
static void rkisp_config_cmsk(struct rkisp_device *dev)
|
||||
|
|
@ -1638,20 +1648,20 @@ static int rkisp_config_isp(struct rkisp_device *dev)
|
|||
struct ispsd_out_fmt *out_fmt;
|
||||
struct v4l2_rect *in_crop;
|
||||
struct rkisp_sensor_info *sensor;
|
||||
bool is_unite = !!dev->hw_dev->unite;
|
||||
u32 isp_ctrl = 0;
|
||||
u32 irq_mask = 0;
|
||||
u32 signal = 0;
|
||||
u32 acq_mult = 0;
|
||||
u32 acq_prop = 0;
|
||||
u32 extend_line = 0;
|
||||
u32 width;
|
||||
u32 width, height;
|
||||
|
||||
sensor = dev->active_sensor;
|
||||
in_fmt = &dev->isp_sdev.in_fmt;
|
||||
out_fmt = &dev->isp_sdev.out_fmt;
|
||||
in_crop = &dev->isp_sdev.in_crop;
|
||||
width = in_crop->width;
|
||||
height = in_crop->height;
|
||||
|
||||
if (in_fmt->fmt_type == FMT_BAYER) {
|
||||
acq_mult = 1;
|
||||
|
|
@ -1741,8 +1751,10 @@ static int rkisp_config_isp(struct rkisp_device *dev)
|
|||
rkisp_unite_write(dev, CIF_ISP_ACQ_PROP, acq_prop, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_NR_FRAMES, 0, true);
|
||||
|
||||
if (is_unite)
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
width = width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
height = height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
/* Acquisition Size */
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_H_OFFS, acq_mult * in_crop->left, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_V_OFFS, in_crop->top, false);
|
||||
|
|
@ -1754,11 +1766,11 @@ static int rkisp_config_isp(struct rkisp_device *dev)
|
|||
rkisp_unite_write(dev, CIF_ISP_OUT_H_SIZE, width, false);
|
||||
|
||||
if (dev->cap_dev.stream[RKISP_STREAM_SP].interlaced) {
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_V_SIZE, in_crop->height / 2, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_OUT_V_SIZE, in_crop->height / 2, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_V_SIZE, height / 2, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_OUT_V_SIZE, height / 2, false);
|
||||
} else {
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_V_SIZE, in_crop->height + extend_line, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_OUT_V_SIZE, in_crop->height + extend_line, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_ACQ_V_SIZE, height + extend_line, false);
|
||||
rkisp_unite_write(dev, CIF_ISP_OUT_V_SIZE, height + extend_line, false);
|
||||
}
|
||||
|
||||
/* interrupt mask */
|
||||
|
|
@ -2076,16 +2088,13 @@ static int rkisp_isp_stop(struct rkisp_device *dev)
|
|||
/* stop ISP */
|
||||
val = rkisp_read(dev, CIF_ISP_CTRL, true);
|
||||
val &= ~(CIF_ISP_CTRL_ISP_INFORM_ENABLE | CIF_ISP_CTRL_ISP_ENABLE);
|
||||
rkisp_write(dev, CIF_ISP_CTRL, val, true);
|
||||
rkisp_unite_write(dev, CIF_ISP_CTRL, val, true);
|
||||
|
||||
val = rkisp_read(dev, CIF_ISP_CTRL, true);
|
||||
val |= CIF_ISP_CTRL_ISP_CFG_UPD;
|
||||
rkisp_write(dev, CIF_ISP_CTRL, val, true);
|
||||
rkisp_unite_write(dev, CIF_ISP_CTRL, val, true);
|
||||
rkisp_clear_reg_cache_bits(dev, CIF_ISP_CTRL, CIF_ISP_CTRL_ISP_CFG_UPD);
|
||||
if (hw->unite == ISP_UNITE_TWO) {
|
||||
rkisp_next_write(dev, CIF_ISP_CTRL, val, true);
|
||||
rkisp_next_clear_reg_cache_bits(dev, CIF_ISP_CTRL, CIF_ISP_CTRL_ISP_CFG_UPD);
|
||||
}
|
||||
|
||||
readx_poll_timeout_atomic(readl, base + CIF_ISP_RIS,
|
||||
val, val & CIF_ISP_OFF, 20, 100);
|
||||
v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
|
||||
|
|
@ -2113,9 +2122,7 @@ static int rkisp_isp_stop(struct rkisp_device *dev)
|
|||
writel(0, base + CIF_ISP_CSI0_MASK2);
|
||||
writel(0, base + CIF_ISP_CSI0_MASK3);
|
||||
} else if (dev->isp_ver >= ISP_V20) {
|
||||
writel(0, base + CSI2RX_CSI2_RESETN);
|
||||
if (hw->unite == ISP_UNITE_TWO)
|
||||
rkisp_next_write(dev, CSI2RX_CSI2_RESETN, 0, true);
|
||||
rkisp_unite_write(dev, CSI2RX_CSI2_RESETN, 0, true);
|
||||
}
|
||||
|
||||
hw->is_dvfs = false;
|
||||
|
|
@ -2623,6 +2630,8 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd,
|
|||
struct rkisp_isp_subdev *isp_sd = sd_to_isp_sd(sd);
|
||||
struct rkisp_device *dev = sd_to_isp_dev(sd);
|
||||
struct v4l2_rect in_crop = isp_sd->in_crop;
|
||||
struct rkisp_hw_dev *hw = dev->hw_dev;
|
||||
u32 size;
|
||||
|
||||
crop->left = ALIGN(crop->left, 2);
|
||||
crop->width = ALIGN(crop->width, 2);
|
||||
|
|
@ -2631,6 +2640,28 @@ static void rkisp_isp_sd_try_crop(struct v4l2_subdev *sd,
|
|||
/* update sensor info if sensor link be changed */
|
||||
rkisp_update_sensor_info(dev);
|
||||
rkisp_align_sensor_resolution(dev, crop, true);
|
||||
if (hw->unite == ISP_UNITE_TWO && hw->isp_ver == ISP_V30) {
|
||||
dev->unite_div = ISP_UNITE_DIV2;
|
||||
} else {
|
||||
dev->unite_div = ISP_UNITE_DIV1;
|
||||
switch (dev->isp_ver) {
|
||||
case ISP_V30:
|
||||
size = CIF_ISP_INPUT_W_MAX_V30 * CIF_ISP_INPUT_H_MAX_V30;
|
||||
break;
|
||||
case ISP_V32:
|
||||
size = CIF_ISP_INPUT_W_MAX_V32 * CIF_ISP_INPUT_H_MAX_V32;
|
||||
break;
|
||||
case ISP_V32_L:
|
||||
size = CIF_ISP_INPUT_W_MAX_V32_L * CIF_ISP_INPUT_H_MAX_V32_L;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
if (crop->width * crop->height > size * 2)
|
||||
dev->unite_div = ISP_UNITE_DIV4;
|
||||
else if (crop->width * crop->height > size)
|
||||
dev->unite_div = ISP_UNITE_DIV2;
|
||||
}
|
||||
} else if (pad == RKISP_ISP_PAD_SOURCE_PATH) {
|
||||
crop->left = clamp_t(u32, crop->left, 0, in_crop.width);
|
||||
crop->top = clamp_t(u32, crop->top, 0, in_crop.height);
|
||||
|
|
@ -2695,8 +2726,10 @@ static int rkisp_isp_sd_get_selection(struct v4l2_subdev *sd,
|
|||
CIF_ISP_INPUT_H_MAX_V32_UNITE : CIF_ISP_INPUT_H_MAX_V32;
|
||||
break;
|
||||
case ISP_V32_L:
|
||||
max_w = CIF_ISP_INPUT_W_MAX_V32_L;
|
||||
max_h = CIF_ISP_INPUT_H_MAX_V32_L;
|
||||
max_w = dev->hw_dev->unite ?
|
||||
CIF_ISP_INPUT_W_MAX_V32_L_UNITE : CIF_ISP_INPUT_W_MAX_V32_L;
|
||||
max_h = dev->hw_dev->unite ?
|
||||
CIF_ISP_INPUT_H_MAX_V32_L_UNITE : CIF_ISP_INPUT_H_MAX_V32_L;
|
||||
break;
|
||||
default:
|
||||
max_w = CIF_ISP_INPUT_W_MAX;
|
||||
|
|
@ -2956,8 +2989,9 @@ static void rkisp_rx_qbuf_online(struct rkisp_stream *stream,
|
|||
{
|
||||
struct rkisp_device *dev = stream->ispdev;
|
||||
u32 val = pool->buf.buff_addr[RKISP_PLANE_Y];
|
||||
u32 reg = stream->config->mi.y_base_ad_init;
|
||||
|
||||
rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false);
|
||||
rkisp_write(dev, reg, val, false);
|
||||
if (dev->hw_dev->unite == ISP_UNITE_TWO) {
|
||||
u32 offs = stream->out_fmt.width / 2 - RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
|
||||
|
|
@ -2966,7 +3000,7 @@ static void rkisp_rx_qbuf_online(struct rkisp_stream *stream,
|
|||
else
|
||||
offs = offs * stream->out_isp_fmt.bpp[0] / 8;
|
||||
val += offs;
|
||||
rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false);
|
||||
rkisp_idx_write(dev, reg, val, ISP_UNITE_RIGHT, false);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -3435,11 +3469,12 @@ static int rkisp_get_info(struct rkisp_device *dev, struct rkisp_isp_info *info)
|
|||
if (dev->is_bigmode)
|
||||
mode |= RKISP_ISP_BIGMODE;
|
||||
info->mode = mode;
|
||||
if (dev->hw_dev->unite)
|
||||
info->act_width = in_crop->width;
|
||||
if (dev->unite_div > ISP_UNITE_DIV1)
|
||||
info->act_width = in_crop->width / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
else
|
||||
info->act_width = in_crop->width;
|
||||
info->act_height = in_crop->height;
|
||||
if (dev->unite_div == ISP_UNITE_DIV4)
|
||||
info->act_height = in_crop->height / 2 + RKMOUDLE_UNITE_EXTEND_PIXEL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -3845,6 +3880,7 @@ int rkisp_register_isp_subdev(struct rkisp_device *isp_dev,
|
|||
goto err_cleanup_media_entity;
|
||||
}
|
||||
|
||||
isp_dev->unite_div = ISP_UNITE_DIV1;
|
||||
rkisp_isp_sd_init_default_fmt(isp_sdev);
|
||||
isp_dev->hdr.sensor = NULL;
|
||||
isp_dev->isp_state = ISP_STOP;
|
||||
|
|
|
|||
|
|
@ -61,6 +61,8 @@
|
|||
#define CIF_ISP_INPUT_H_MAX_V32_UNITE 2160
|
||||
#define CIF_ISP_INPUT_W_MAX_V32_L 4224
|
||||
#define CIF_ISP_INPUT_H_MAX_V32_L 3136
|
||||
#define CIF_ISP_INPUT_W_MAX_V32_L_UNITE 8192
|
||||
#define CIF_ISP_INPUT_H_MAX_V32_L_UNITE 6144
|
||||
#define CIF_ISP_INPUT_W_MIN 272
|
||||
#define CIF_ISP_INPUT_H_MIN 256
|
||||
#define CIF_ISP_OUTPUT_W_MAX CIF_ISP_INPUT_W_MAX
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue