rk2928: spi init
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02b33dc94f
commit
dfeede9fe7
2 changed files with 116 additions and 5 deletions
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@ -281,7 +281,7 @@ static struct platform_device device_i2c_gpio = {
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};
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#endif
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static void __init rk30_init_i2c(void)
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static void __init rk2928_init_i2c(void)
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{
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#ifdef CONFIG_I2C0_RK30
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platform_device_register(&device_i2c0);
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@ -300,10 +300,122 @@ static void __init rk30_init_i2c(void)
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#endif
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}
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//end of i2c
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#if defined(CONFIG_SPIM0_RK29) || defined(CONFIG_SPIM1_RK29)
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/*****************************************************************************************
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* spi devices
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* author: cmc@rock-chips.com
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*****************************************************************************************/
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#define SPI_CHIPSELECT_NUM 2
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static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
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{
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int i;
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if (cs_gpios) {
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for (i = 0; i < cs_num; i++) {
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rk30_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
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}
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}
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return 0;
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}
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static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
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{
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return 0;
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}
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static int spi_io_fix_leakage_bug(void)
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{
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#if 0
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gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
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#endif
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return 0;
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}
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static int spi_io_resume_leakage_bug(void)
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{
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#if 0
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gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
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#endif
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return 0;
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}
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#endif
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/*
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* rk29xx spi master device
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*/
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#ifdef CONFIG_SPIM0_RK29
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static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
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{
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.name = "spi0 cs0",
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.cs_gpio = RK2928_PIN1_PB3,
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.cs_iomux_name = GPIO1B3_SPI_CSN0_UART1_RTSN_NAME,
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.cs_iomux_mode = GPIO1B_SPI_CSN0,
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},
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{
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.name = "spi0 cs1",
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.cs_gpio = RK2928_PIN1_PB4,
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.cs_iomux_name = GPIO1B4_SPI_CSN1_UART1_CTSN_NAME,//if no iomux,set it NULL
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.cs_iomux_mode = GPIO1B_SPI_CSN1,
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},
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};
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static struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
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.num_chipselect = SPI_CHIPSELECT_NUM,
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.chipselect_gpios = rk29xx_spi0_cs_gpios,
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.io_init = spi_io_init,
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.io_deinit = spi_io_deinit,
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.io_fix_leakage_bug = spi_io_fix_leakage_bug,
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.io_resume_leakage_bug = spi_io_resume_leakage_bug,
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};
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static struct resource rk29_spi0_resources[] = {
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{
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.start = IRQ_SPI,
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.end = IRQ_SPI,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = RK2928_SPI_PHYS,
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.end = RK2928_SPI_PHYS + RK2928_SPI_SIZE - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DMACH_SPI0_TX,
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.end = DMACH_SPI0_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = DMACH_SPI0_RX,
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.end = DMACH_SPI0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device rk29xx_device_spi0m = {
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.name = "rk29xx_spim",
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.id = 0,
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.num_resources = ARRAY_SIZE(rk29_spi0_resources),
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.resource = rk29_spi0_resources,
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.dev = {
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.dma_mask = &dma_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &rk29xx_spi0_platdata,
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},
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};
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#endif
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static void __init rk2928_init_spim(void)
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{
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#ifdef CONFIG_SPIM0_RK29
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platform_device_register(&rk29xx_device_spi0m);
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#endif
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}
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static int __init rk2928_init_devices(void)
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{
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rk2928_init_dma();
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rk30_init_i2c();
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rk2928_init_i2c();
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rk2928_init_spim();
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#if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS)
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rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1);
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#endif
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@ -426,7 +426,7 @@ config SPI_NUC900
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config SPIM_RK29
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tristate "RK SPI master controller core support"
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depends on (ARCH_RK29 || ARCH_RK30) && SPI_MASTER
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depends on (ARCH_RK29 || ARCH_RK30 || ARCH_RK2928) && SPI_MASTER
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help
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general driver for SPI controller core from RockChips
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@ -438,13 +438,12 @@ config SPIM0_RK29
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config SPIM1_RK29
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bool "RK SPI1 master controller"
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depends on SPIM_RK29
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depends on SPIM_RK29 && !ARCH_RK2928
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help
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enable SPI1 master controller for RK29
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config RK_SPIM_TEST
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bool "RK SPIM test"
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depends on (SPIM0_RK29 && SPIM1_RK29)
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config LCD_USE_SPIM_CONTROL
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bool "Switch gpio to spim with spin lock"
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