mfd: intel-m10-bmc: Fix the register access range
[ Upstream commit d9b326b2c3 ]
This patch fixes the max register address of MAX 10 BMC. The range
0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
controller, which are not accessible to host.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -11,7 +11,7 @@
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#define M10BMC_LEGACY_SYS_BASE 0x300400
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#define M10BMC_SYS_BASE 0x300800
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#define M10BMC_MEM_END 0x200000fc
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#define M10BMC_MEM_END 0x1fffffff
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/* Register offset of system registers */
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#define NIOS2_FW_VERSION 0x0
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