phy: rockchip: inno-hdmi: fix 4k10 bit display abnormal

avoid out of value range calculate catmdsclk when 4k10bit and set
scdc high tmds clock ratio when mtmdsclock is more than 340000000

Change-Id: I8aed4c99813e43c69526f3918d5e7024879d3288
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
This commit is contained in:
Huicong Xu 2018-01-24 13:58:39 +08:00 committed by Tao Huang
commit d4953cfed3
4 changed files with 22 additions and 6 deletions

View file

@ -1270,6 +1270,20 @@ static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
return true;
}
void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi)
{
unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
/* Control for TMDS Bit Period/TMDS Clock-Period Ratio */
if (hdmi->connector.display_info.hdmi.scdc.supported) {
if (mtmdsclock > 340000000)
drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 1);
else
drm_scdc_set_high_tmds_clock_ratio(hdmi->ddc, 0);
}
}
EXPORT_SYMBOL_GPL(dw_hdmi_set_high_tmds_clock_ratio);
void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
unsigned char addr)
{

View file

@ -121,6 +121,7 @@ inno_dw_hdmi_phy_init(struct dw_hdmi *dw_hdmi, void *data,
struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data;
inno_dw_hdmi_phy_disable(dw_hdmi, data);
dw_hdmi_set_high_tmds_clock_ratio(dw_hdmi);
return phy_power_on(hdmi->phy);
}

View file

@ -337,22 +337,22 @@ static u32 inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, int rate)
switch (bus_width) {
case 4:
tmdsclk = rate / 2;
tmdsclk = (u32)rate / 2;
break;
case 5:
tmdsclk = rate * 5 / 8;
tmdsclk = (u32)rate * 5 / 8;
break;
case 6:
tmdsclk = rate * 3 / 4;
tmdsclk = (u32)rate * 3 / 4;
break;
case 10:
tmdsclk = rate * 5 / 4;
tmdsclk = (u32)rate * 5 / 4;
break;
case 12:
tmdsclk = rate * 3 / 2;
tmdsclk = (u32)rate * 3 / 2;
break;
case 16:
tmdsclk = rate * 2;
tmdsclk = (u32)rate * 2;
break;
default:
tmdsclk = rate;

View file

@ -198,6 +198,7 @@ enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi);
/* PHY configuration */
void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,