media: rockchip: isp: fix cac for multi sensor
Change-Id: Ia63c5129ca28ff8d683cd35b56bb2d57b58682e4 Signed-off-by: Cai YiWei <cyw@rock-chips.com>
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parent
ce6e1b95ba
commit
b98e293576
2 changed files with 21 additions and 16 deletions
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@ -573,6 +573,11 @@ void rkisp_hw_reg_restore(struct rkisp_hw_dev *dev)
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writel(val, base + ISP_MPFBC_HEAD_PTR);
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val = rkisp_read_reg_cache(isp, MI_SWS_3A_WR_BASE);
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writel(val, base + MI_SWS_3A_WR_BASE);
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/* force for cac to read lut */
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if (dev->isp_ver >= ISP_V33) {
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val = rkisp_read_reg_cache(isp, ISP3X_CAC_BASE);
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writel(val, base + ISP3X_CAC_BASE);
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}
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}
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if (dev->is_single) {
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@ -675,9 +675,21 @@ void rkisp_trigger_read_back(struct rkisp_device *dev, u8 dma2frm, u32 mode, boo
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writel(0, hw->base_addr + CIF_IRCL);
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}
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/* sensor mode & index */
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if (dev->isp_ver >= ISP_V21) {
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val = rkisp_read_reg_cache(dev, ISP_ACQ_H_OFFS);
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val |= ISP21_SENSOR_INDEX(dev->multi_index);
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if (dev->isp_ver == ISP_V32_L)
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val |= ISP32L_SENSOR_MODE(dev->multi_mode);
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else
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val |= ISP21_SENSOR_MODE(dev->multi_mode);
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writel(val, hw->base_addr + ISP_ACQ_H_OFFS);
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if (hw->unite == ISP_UNITE_TWO)
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writel(val, hw->base_next_addr + ISP_ACQ_H_OFFS);
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}
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rkisp_update_regs(dev, CTRL_VI_ISP_PATH, SUPER_IMP_COLOR_CR);
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rkisp_update_regs(dev, DUAL_CROP_M_H_OFFS, ISP3X_DUAL_CROP_FBC_V_SIZE);
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rkisp_update_regs(dev, ISP_ACQ_H_OFFS, DUAL_CROP_CTRL);
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rkisp_update_regs(dev, ISP_ACQ_V_OFFS, DUAL_CROP_CTRL);
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rkisp_update_regs(dev, ISP39_LDCV_BIC_TABLE0, MI_WR_CTRL);
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rkisp_update_regs(dev, SELF_RESIZE_SCALE_HY, ISP39_LDCV_CTRL);
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rkisp_update_regs(dev, ISP32_BP_RESIZE_SCALE_HY, SELF_RESIZE_CTRL);
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@ -702,21 +714,9 @@ void rkisp_trigger_read_back(struct rkisp_device *dev, u8 dma2frm, u32 mode, boo
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rkisp_write(dev, ISP39_MAIN_SCALE_UPDATE, ISP32_SCALE_FORCE_UPD, true);
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rkisp_unite_write(dev, ISP3X_MI_WR_INIT, CIF_MI_INIT_SOFT_UPD, true);
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}
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/* sensor mode & index */
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if (dev->isp_ver >= ISP_V21) {
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val = rkisp_read_reg_cache(dev, ISP_ACQ_H_OFFS);
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val |= ISP21_SENSOR_INDEX(dev->multi_index);
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if (dev->isp_ver == ISP_V32_L || dev->isp_ver == ISP_V39)
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val |= ISP32L_SENSOR_MODE(dev->multi_mode);
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else
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val |= ISP21_SENSOR_MODE(dev->multi_mode);
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writel(val, hw->base_addr + ISP_ACQ_H_OFFS);
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if (hw->unite == ISP_UNITE_TWO)
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writel(val, hw->base_next_addr + ISP_ACQ_H_OFFS);
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v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
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"sensor mode:%d index:%d | 0x%x\n",
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dev->multi_mode, dev->multi_index, val);
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}
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v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
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"sensor mode:%d index:%d | 0x%x\n",
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dev->multi_mode, dev->multi_index, rkisp_read(dev, ISP_ACQ_H_OFFS, true));
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is_upd = true;
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}
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