diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index dae1bd7529f8..1659465ab340 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -212,6 +212,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-pcie-ep-lp4x-v10-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-cm3i-io.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-android.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-sd0-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-toybrick-x0-android.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts new file mode 100644 index 000000000000..9a32ad4b8f9c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts @@ -0,0 +1,445 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Radxa Computer (Shenzhen) Co., Ltd. + * + */ + +/dts-v1/; + +#include "rk3568-radxa-cm3i.dtsi" + +/ { + model = "Radxa E25 Carrier Board"; + compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568"; + + /delete-node/ fiq-debugger; + + fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <1>; + rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_en>; + regulator-name = "vcc5v0_usb"; + }; + + pcie30_3v3: pcie30-3v3 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_3v3"; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie3v3_en>; + }; + + minipcie_3v3: minipcie_3v3 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&minipcie_en>; + regulator-name = "vcc3v3_minipcie"; + regulator-always-on; + regulator-boot-on; + }; + + //low:wifi,high:5G + vcc3v3_minipcie_to_5g_or_wifi: vcc3v3-minipcie-to-5g-or-wifi { + compatible = "regulator-fixed"; + enable-active-low; + gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_minipcie_to_5g_or_wifi_en>; + regulator-name = "vcc3v3_minipcie_to_5g_or_wifi"; + regulator-always-on; + regulator-boot-on; + }; + + vcc3v3_pcie_30x1: vcc3v3-pci-30x1 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie_30x1_en>; + regulator-name = "vcc3v3_pci_30x1"; + regulator-always-on; + regulator-boot-on; + }; + + em05_modem: em05-modem { + compatible = "lte-em05-modem-platdata"; + pinctrl-names = "default"; + pinctrl-0 = <&em05_power_en &em05_airplane_mode &em05_reset>; + em05,power-gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + em05,reset-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + em05,airplane-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + rgb0: rgb0 { + compatible = "pwm-leds"; + status = "okay"; + + rgb0-red { + pwms = <&pwm1 0 1000000 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + }; + + rgb0-blue { + pwms = <&pwm12 0 1000000 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + }; + + rgb0-green { + pwms = <&pwm2 0 1000000 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + }; + }; + + adc_keys: adc-keys { + status = "okay"; + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + user-key { + label = "macro"; + linux,code = ; + press-threshold-microvolt = <1750>; + }; + }; +}; + +&pwm1 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm1m0_pins>; +}; + +&pwm2 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm2m0_pins>; +}; + +&pwm12 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm12m1_pins>; +}; + +&u2phy0_host { + status = "okay"; +}; + +&u2phy0_otg { + vbus-supply = <&vcc5v0_usb>; + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&u2phy1_host { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd_dwc3 { + extcon=<&usb2phy0>; + dr_mode = "host"; + status = "okay"; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbhost_dwc3 { + status = "okay"; +}; + +&usbhost30 { + status = "okay"; +}; + +&combphy0_us { + status = "okay"; +}; + +&combphy1_usq { + status = "okay"; +}; + +&rk809_codec { + status = "okay"; +}; + +&combphy2_psq { + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie30_3v3>; + pinctrl-0 = <&pcie30x2m1_pins>; + rockchip,bifurcation; + status = "okay"; + + pcie@40 { + reg = <0x00400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + rtl8125_1: pcie-eth@40,0 { + compatible = "pci10ec,8125"; + reg = <0x000000 0 0 0 0>; + + // LED0 => G+ , LED1 => G- , LED2 => Y- + // LED0=High active, blink on every speed act + // LED1=Low active, always on every speed link + // LED2=LED1 + realtek,led-data = <0x1200 0x2b 0x2b 0>; + }; + }; +}; + +&pcie3x1 { + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie30_3v3>; + pinctrl-0 = <&pcie30x1m1_pins>; + rockchip,bifurcation; + status = "okay"; +}; + +&pcie2x1 { + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie30_3v3>; + pinctrl-0 = <&pcie20m2_pins>; + status = "okay"; + + pcie@40 { + reg = <0x00400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + rtl8125_2: pcie-eth@40,0 { + compatible = "pci10ec,8125"; + reg = <0x000000 0 0 0 0>; + + // LED0 => G+ , LED1 => G- , LED2 => Y- + // LED0=High active, blink on every speed act + // LED1=Low active, always on every speed link + // LED2=LED1 + realtek,led-data = <0x1200 0x2b 0x2b 0>; + }; + }; +}; + +&sata1 { + status = "okay"; +}; + +&pinctrl { + usb { + vcc5v0_en: vcc5v0-en { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie3v3_en: pcie3v3-en { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + minipcie_en: vcc3v3-minipcie-en { + rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc3v3_minipcie_to_5g_or_wifi_en: vcc3v3-minipcie-to-5g-or-wifi-en { + rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc3v3_pcie_30x1_en: vcc3v3-pcie-30x1-en { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lte-em05-modem { + em05_airplane_mode: em05-airplane-mode { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + em05_power_en: em05-power-en { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + em05_reset: em05-reset { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&gpio0 { + gpio-line-names = + /* GPIO0_A0-A3 */ + "", "", "", "", + /* GPIO0_A4-A7 */ + "", "", "", "", + + /* GPIO0_B0-B3 */ + "", "", "", "", + /* GPIO0_B4-B7 */ + "", "", "", "", + + /* GPIO0_C0-C3 */ + "", "", "", "", + /* GPIO0_C4-C7 */ + "", "", "PIN_18", "", + + /* GPIO0_D0-D3 */ + "", "", "", "", + /* GPIO0_D4-D7 */ + "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = + /* GPIO1_A0-A3 */ + "PIN_3", "PIN_5", "", "", + /* GPIO1_A4-A7 */ + "", "", "", "", + + /* GPIO1_B0-B3 */ + "", "", "", "", + /* GPIO1_B4-B7 */ + "", "", "", "", + + /* GPIO1_C0-C3 */ + "", "", "", "", + /* GPIO1_C4-C7 */ + "", "", "", "", + + /* GPIO1_D0-D3 */ + "", "", "", "", + /* GPIO1_D4-D7 */ + "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + /* GPIO2_A0-A3 */ + "", "", "", "", + /* GPIO2_A4-A7 */ + "", "", "", "", + + /* GPIO2_B0-B3 */ + "", "", "", "", + /* GPIO2_B4-B7 */ + "", "", "", "", + + /* GPIO2_C0-C3 */ + "", "", "", "", + /* GPIO2_C4-C7 */ + "", "", "", "", + + /* GPIO2_D0-D3 */ + "PIN_21", "PIN_19", "PIN_16", "PIN_23", + /* GPIO2_D4-D7 */ + "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + /* GPIO3_A0-A3 */ + "", "PIN_17", "", "PIN_12", + /* GPIO3_A4-A7 */ + "", "", "", "", + + /* GPIO3_B0-B3 */ + "", "", "", "", + /* GPIO3_B4-B7 */ + "", "", "", "PIN_7", + + /* GPIO3_C0-C3 */ + "PIN_26", "PIN_15", "PIN_8", "PIN_10", + /* GPIO3_C4-C7 */ + "PIN_11", "PIN_13", "", "", + + /* GPIO3_D0-D3 */ + "", "", "", "", + /* GPIO3_D4-D7 */ + "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + /* GPIO4_A0-A3 */ + "", "", "", "", + /* GPIO4_A4-A7 */ + "", "", "", "", + + /* GPIO4_B0-B3 */ + "", "", "", "", + /* GPIO4_B4-B7 */ + "", "", "", "", + + /* GPIO4_C0-C3 */ + "", "", "", "", + /* GPIO4_C4-C7 */ + "", "", "PIN_24", "", + + /* GPIO4_D0-D3 */ + "", "", "", "", + /* GPIO4_D4-D7 */ + "", "", "", ""; +}; \ No newline at end of file