driver: video: rockchip: fix the memory leak of the encoder
1.when release buffer should call vpu_iommu_clear function. 2.before call vpu_iommu_clear that we should call vpu_drm_unmap_iommu&vpu_drm_free if there is through vpu_drm_alloc to allocate buffer. Change-Id: I01e7fac88c6da40e8cb4ee2199dd38283323783b Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
This commit is contained in:
Xinhuang Li
Tao Huang
parent
aefc44dabb
commit
8486a3deec
4 changed files with 71 additions and 61 deletions
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@ -687,14 +687,17 @@ static int mpp_dev_release(struct inode *inode, struct file *filp)
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}
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wake_up(&session->wait);
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if (mpp->ops->release)
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mpp->ops->release(session);
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mpp_srv_lock(mpp->srv);
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/* remove this filp from the asynchronusly notified filp's */
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list_del_init(&session->list_session);
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mpp_dev_session_clear(mpp, session);
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vpu_iommu_clear(mpp->iommu_info, session);
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filp->private_data = NULL;
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mpp_srv_unlock(mpp->srv);
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if (mpp->ops->release)
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mpp->ops->release(session);
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if (mpp->ops->free)
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mpp->ops->free(session);
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else
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kfree(session);
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@ -1054,7 +1057,6 @@ static struct platform_driver mpp_dev_driver = {
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.remove = mpp_dev_remove,
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.driver = {
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.name = "mpp_dev",
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.owner = THIS_MODULE,
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#if defined(CONFIG_OF)
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.of_match_table = of_match_ptr(mpp_dev_dt_ids),
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#endif
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@ -244,6 +244,7 @@ struct mpp_dev_ops {
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unsigned int cmd, unsigned long arg);
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struct mpp_session *(*open)(struct rockchip_mpp_dev *mpp);
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void (*release)(struct mpp_session *session);
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void (*free)(struct mpp_session *session);
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};
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void mpp_dump_reg(void __iomem *regs, int count);
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@ -64,8 +64,10 @@ static ktime_t h265e_now, h265e_last;
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static
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struct mpp_session *rockchip_mpp_h265e_open(struct rockchip_mpp_dev *mpp);
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static void rockchip_mpp_h265e_free(struct mpp_session *isession);
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static void rockchip_mpp_h265e_release(struct mpp_session *isession);
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static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp);
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static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp,
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struct mpp_session *session);
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static int rockchip_mpp_h265e_encode_one_frame(struct rockchip_mpp_dev *mpp,
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struct h265e_ctx *ctx,
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int index);
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@ -79,6 +81,16 @@ int rockchip_mpp_h265e_register_frame_buffer(struct rockchip_mpp_dev *mpp,
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static void rockchip_mpp_h265e_enable_clk(struct rockchip_mpp_dev *mpp);
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static void rockchip_mpp_h265e_disable_clk(struct rockchip_mpp_dev *mpp);
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static void rockchip_mpp_h265e_dma_free(struct rockchip_mpp_dev *mpp,
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struct mpp_session *session,
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int hdl)
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{
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if (hdl >= 0) {
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vpu_iommu_unmap_iommu(mpp->iommu_info, session, hdl);
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vpu_iommu_free(mpp->iommu_info, session, hdl);
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}
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}
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static int rockchip_mpp_h265e_dma_alloc(struct rockchip_mpp_dev *mpp,
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struct mpp_session *session,
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size_t len,
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@ -108,18 +120,6 @@ FAIL:
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return -1;
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}
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static int rockchip_mpp_h265e_global_dma_alloc(struct rockchip_mpp_dev *mpp,
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size_t len,
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size_t align,
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unsigned long *addr)
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{
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struct mpp_session *session = list_first_entry(&mpp->srv->session,
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struct mpp_session,
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list_session);
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return rockchip_mpp_h265e_dma_alloc(mpp, session, len, align, addr);
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}
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static void rockchip_mpp_h265e_free_frame_buffer(struct rockchip_mpp_dev *mpp,
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struct rockchip_h265e_instance *instance)
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{
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@ -130,22 +130,18 @@ static void rockchip_mpp_h265e_free_frame_buffer(struct rockchip_mpp_dev *mpp,
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mpp_debug_enter();
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buf = &instance->mv;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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buf = &instance->fbc_luma;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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buf = &instance->fbc_chroma;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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buf = &instance->sub_sample;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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for (i = 0; i < ARRAY_SIZE(instance->frame_buffer); i++) {
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fb = &instance->frame_buffer[i];
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buf = &fb->buffer;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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fb->y = 0;
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fb->cb = 0;
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fb->cr = 0;
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@ -170,8 +166,7 @@ static void rockchip_mpp_h265e_free_instance(struct rockchip_mpp_dev *mpp,
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#endif
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if (!mpp || !instance)
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return;
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if (buf->hdl >= 0)
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vpu_iommu_free(mpp->iommu_info, session, buf->hdl);
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rockchip_mpp_h265e_dma_free(mpp, session, buf->hdl);
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rockchip_mpp_h265e_free_frame_buffer(mpp, instance);
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atomic_set(&enc->instance[index].is_used, 0);
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mpp_debug_leave();
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@ -252,7 +247,8 @@ static int rockchip_mpp_h265e_write_encoder_file(struct rockchip_mpp_dev *mpp)
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}
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#endif
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static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp)
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static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp,
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struct mpp_session *session)
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{
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const struct firmware *firmware;
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u32 size = 0;
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@ -260,9 +256,6 @@ static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp)
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container_of(mpp,
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struct rockchip_h265e_dev,
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dev);
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struct mpp_session *session = list_first_entry(&mpp->srv->session,
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struct mpp_session,
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list_session);
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if (request_firmware(&firmware, H265E_FIRMWARE_NAME, mpp->dev) < 0) {
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mpp_err("firmware request failed\n");
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@ -273,10 +266,11 @@ static int rockchip_mpp_h265e_load_firmware(struct rockchip_mpp_dev *mpp)
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firmware->data, firmware->size);
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size = ALIGN(firmware->size, H265E_CODE_BUFFER_SIZE);
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enc->firmware.hdl =
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rockchip_mpp_h265e_global_dma_alloc(mpp,
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size,
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MPP_ALIGN_SIZE,
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&enc->firmware.dma_addr);
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rockchip_mpp_h265e_dma_alloc(mpp,
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session,
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size,
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MPP_ALIGN_SIZE,
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&enc->firmware.dma_addr);
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if (enc->firmware.hdl < 0) {
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mpp_err("error: alloc firmware buffer error\n");
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goto FAIL;
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@ -1340,7 +1334,7 @@ int rockchip_mpp_h265e_register_frame_buffer(struct rockchip_mpp_dev *mpp,
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stride;
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mpp_write(mpp, value, H265E_COMMON_PIC_INFO);
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memset(&instance->frame_buffer, 0, sizeof(instance->frame_buffer));
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memset(&instance->frame_buffer, -1, sizeof(instance->frame_buffer));
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/* set frame buffer address*/
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for (i = 0; i < count; i++) {
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frame_buffer = &instance->frame_buffer[i];
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@ -1766,6 +1760,7 @@ struct mpp_dev_ops h265e_ops = {
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.ioctl = rockchip_mpp_h265e_ioctl,
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.open = rockchip_mpp_h265e_open,
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.release = rockchip_mpp_h265e_release,
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.free = rockchip_mpp_h265e_free,
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};
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static void rockchip_mpp_h265e_enable_clk(struct rockchip_mpp_dev *mpp)
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@ -1843,31 +1838,17 @@ static struct mpp_session *rockchip_mpp_h265e_open(struct rockchip_mpp_dev *mpp)
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#endif
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mpp_dev_power_on(mpp);
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if (!atomic_read(&enc->load_firmware)) {
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ret = rockchip_mpp_h265e_load_firmware(mpp);
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if (ret)
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goto NFREE_FAIL;
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atomic_inc(&enc->load_firmware);
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enc->temp.size = H265E_TEMP_BUFFER_SIZE;
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enc->temp.hdl =
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rockchip_mpp_h265e_global_dma_alloc(mpp,
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enc->temp.size,
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MPP_ALIGN_SIZE,
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&enc->temp.dma_addr);
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if (enc->temp.hdl < 0) {
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mpp_err("error: alloc temp buffer error\n");
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goto NFREE_FAIL;
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}
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}
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for (i = 0; i < H265E_INSTANCE_NUM; i++) {
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instance = &enc->instance[i];
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instance->session = &session->isession;
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if (!atomic_read(&instance->is_used)) {
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instance->work.size = H265E_WORK_BUFFER_SIZE;
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instance->work.hdl =
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rockchip_mpp_h265e_global_dma_alloc(mpp,
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instance->work.size,
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MPP_ALIGN_SIZE,
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&instance->work.dma_addr);
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rockchip_mpp_h265e_dma_alloc(mpp,
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instance->session,
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instance->work.size,
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MPP_ALIGN_SIZE,
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&instance->work.dma_addr);
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instance->index = i;
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atomic_set(&instance->is_used, 1);
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break;
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@ -1877,11 +1858,29 @@ static struct mpp_session *rockchip_mpp_h265e_open(struct rockchip_mpp_dev *mpp)
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mpp_err("error: the num of instance up to H265E_INSTANCE_NUM\n");
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goto NFREE_FAIL;
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}
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if (!atomic_read(&enc->load_firmware)) {
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ret = rockchip_mpp_h265e_load_firmware(mpp, instance->session);
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if (ret)
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goto FAIL;
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atomic_inc(&enc->load_firmware);
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enc->temp.size = H265E_TEMP_BUFFER_SIZE;
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enc->temp.hdl =
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rockchip_mpp_h265e_dma_alloc(mpp,
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instance->session,
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enc->temp.size,
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MPP_ALIGN_SIZE,
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&enc->temp.dma_addr);
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if (enc->temp.hdl < 0) {
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mpp_err("error: alloc temp buffer error\n");
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goto FAIL;
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}
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}
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index = instance->index;
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instance->status = H265E_INSTANCE_STATUS_ERROR;
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mpp_debug(DEBUG_H265E_INFO,
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"%s = %d\n", __func__, index);
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instance->session = &session->isession;
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session->instance_index = index;
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code_base = (u32)enc->firmware.dma_addr;
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mpp_debug(DEBUG_H265E_INFO, "h265e code_base = %x\n", code_base);
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@ -1980,6 +1979,15 @@ NFREE_FAIL:
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return NULL;
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}
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static void rockchip_mpp_h265e_free(struct mpp_session *isession)
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{
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struct h265e_session *session =
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container_of(isession,
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struct h265e_session,
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isession);
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kfree(session);
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}
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static void rockchip_mpp_h265e_release(struct mpp_session *isession)
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{
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struct h265e_session *session =
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@ -2006,7 +2014,6 @@ static void rockchip_mpp_h265e_release(struct mpp_session *isession)
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if (mpp_read(mpp, H265E_RET_SUCCESS) == 0)
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mpp_err("h265e close instance %d ret fail\n", index);
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rockchip_mpp_h265e_free_instance(mpp, index);
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kfree(session);
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#if H265E_POWER_SAVE
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rockchip_mpp_h265e_disable_clk(mpp);
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#endif
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@ -636,7 +636,7 @@ static struct mpp_session *mpp_dev_rkvenc_open(struct rockchip_mpp_dev *mpp)
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return &session->isession;
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}
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static void mpp_dev_rkvenc_release(struct mpp_session *isession)
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static void mpp_dev_rkvenc_free(struct mpp_session *isession)
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{
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struct rkvenc_session *session = to_rkvenc_session(isession);
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@ -652,7 +652,7 @@ struct mpp_dev_ops rkvenc_ops = {
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.result = rockchip_mpp_rkvenc_result,
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.ioctl = rockchip_mpp_rkvenc_ioctl,
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.open = mpp_dev_rkvenc_open,
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.release = mpp_dev_rkvenc_release,
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.free = mpp_dev_rkvenc_free,
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};
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static void rockchip_mpp_rkvenc_power_on(struct rockchip_mpp_dev *mpp)
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