drm/rockchip: vop: post vsize should be 2 align when in interlace mode

Change-Id: I154f8fcb97e9f54f5a3c0254c05ff9c6505dd965
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang 2018-01-26 14:21:25 +08:00 committed by Tao Huang
commit 6802789fb9

View file

@ -2825,6 +2825,9 @@ static void vop_post_config(struct drm_crtc *crtc)
u16 hact_end, vact_end;
u32 val;
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
vsize = rounddown(vsize, 2);
hact_st += hdisplay * (100 - s->left_margin) / 200;
hact_end = hact_st + hsize;
val = hact_st << 16;