From 5dc8f0d04ba59e1a1fc0c74ec4a4cdafcf72919d Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Wed, 22 Nov 2023 10:40:14 +0800 Subject: [PATCH] PCI: rockchip: dw: Validate phy mode in suspend Some PCIe root port uses combophy but combo phy can be used by other type of controllers. If someone enable phy for both of two controllers, it should break the s2r and hard to debug. Validate this kind of bug and cast an error like this: [ 10.698225] naneng-combphy fee20000.phy: expected mode is PCIe, but current mode is USB3 [ 10.698232] rk-pcie fe180000.pcie: PHY is reused by other controller, check the dts! [ 10.698244] PM: dpm_run_callback(): rockchip_dw_pcie_suspend+0x0/0x410 returns -22 [ 10.698266] PM: Device fe180000.pcie failed to suspend async: error -22 [ 10.902134] PM: pm_system_irq_wakeup: 166 triggered fsc_interrupt_int_n Signed-off-by: Shawn Lin Change-Id: Icc65c9d19ef2bcb54bfb3665d4c012f8ac0e710e --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index b8d86b5f3039..a63896496f15 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -8,6 +8,7 @@ * Author: Simon Xue */ +#include #include #include #include @@ -2335,6 +2336,12 @@ static int __maybe_unused rockchip_dw_pcie_suspend(struct device *dev) no_l2: rk_pcie_disable_ltssm(rk_pcie); + ret = phy_validate(rk_pcie->phy, PHY_TYPE_PCIE, 0, NULL); + if (ret && ret != -EOPNOTSUPP) { + dev_err(dev, "PHY is reused by other controller, check the dts!\n"); + return ret; + } + /* make sure assert phy success */ usleep_range(200, 300);