mfd: Add support for Maxim MAX96776
The MAX96776/MAX96778 deserializers convert singleor dual-link GMSL™ serial input to embedded DisplayPort (eDP) v1.4a. 600MHz PCLK capability and decompression of VESA 3:1 DSC v1.1 enable transport of 4K (UHD), 24-bit, 60fps video over a single coax or twisted pair link. The MAX96776/MAX96778 also send and receive sidechannel and peripheral control data to enable full-duplex single-wire transmission of video and bidirectional data. Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I3c07fc1053ae6080cb1cca1bfb9bca5fb38bb563
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Guochun Huang
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4 changed files with 335 additions and 0 deletions
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@ -947,6 +947,15 @@ config MFD_MAX96755F
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help
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Say yes here to add support for Maxim Semiconductor MAX96755.
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config MFD_MAX96776
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tristate "Maxim Semiconductor MAX96776 GMSL2 Deserializer Support"
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depends on I2C
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select MFD_CORE
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select REGMAP_I2C
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select I2C_MUX
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help
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Say yes here to add support for Maxim Semiconductor MAX96776.
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config MFD_MT6360
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tristate "Mediatek MT6360 SubPMIC"
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select MFD_CORE
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@ -173,6 +173,7 @@ obj-$(CONFIG_MFD_MAX8998) += max8998.o max8998-irq.o
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obj-$(CONFIG_MFD_MAX96745) += max96745.o
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obj-$(CONFIG_MFD_MAX96752F) += max96752f.o
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obj-$(CONFIG_MFD_MAX96755F) += max96755f.o
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obj-$(CONFIG_MFD_MAX96776) += max96776.o
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obj-$(CONFIG_MFD_MP2629) += mp2629.o
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194
drivers/mfd/max96776.c
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194
drivers/mfd/max96776.c
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@ -0,0 +1,194 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Maxim MAX96776 MFD driver
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*
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* Copyright (C) 2022 Rockchip Electronics Co. Ltd.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/i2c.h>
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#include <linux/i2c-mux.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regmap.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/max96752f.h>
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struct max96776 {
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struct device *dev;
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struct regmap *regmap;
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struct i2c_client *client;
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struct i2c_mux_core *muxc;
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struct gpio_desc *enable_gpio;
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u32 stream_id;
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};
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static const struct mfd_cell max96776_devs[] = {
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{
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.name = "max96776-bridge",
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.of_compatible = "maxim,max96776-bridge",
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},
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};
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static int max96776_select(struct i2c_mux_core *muxc, u32 chan)
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{
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return 0;
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}
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static const struct regmap_range max96776_readable_ranges[] = {
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regmap_reg_range(0x0000, 0x0026),
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regmap_reg_range(0x0029, 0x002c),
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regmap_reg_range(0x0050, 0x0050),
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regmap_reg_range(0x0100, 0x0100),
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regmap_reg_range(0x0103, 0x0103),
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regmap_reg_range(0x0108, 0x0108),
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regmap_reg_range(0x0600, 0x0600),
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regmap_reg_range(0x07f0, 0x07f1),
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regmap_reg_range(0x1700, 0x1700),
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regmap_reg_range(0x4100, 0x4100),
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regmap_reg_range(0x6230, 0x6230),
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regmap_reg_range(0xe75e, 0xe75e),
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regmap_reg_range(0xe776, 0xe7bf),
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};
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static const struct regmap_access_table max96776_readable_table = {
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.yes_ranges = max96776_readable_ranges,
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.n_yes_ranges = ARRAY_SIZE(max96776_readable_ranges),
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};
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static const struct regmap_config max96776_regmap_config = {
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.name = "max96776",
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.reg_bits = 16,
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.val_bits = 8,
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.rd_table = &max96776_readable_table,
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.max_register = 0xff02,
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};
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static void max96776_power_on(struct max96776 *max96776)
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{
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if (max96776->enable_gpio) {
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gpiod_direction_output(max96776->enable_gpio, 1);
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msleep(500);
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}
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}
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static void max96776_power_off(struct max96776 *max96776)
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{
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if (max96776->enable_gpio)
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gpiod_direction_output(max96776->enable_gpio, 0);
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}
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static int max96776_i2c_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
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struct device_node *child;
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struct max96776 *max96776;
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unsigned int nr = 0;
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int ret;
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for_each_available_child_of_node(dev->of_node, child) {
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if (!of_find_property(child, "reg", NULL))
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continue;
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nr++;
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}
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max96776 = devm_kzalloc(dev, sizeof(*max96776), GFP_KERNEL);
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if (!max96776)
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return -ENOMEM;
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max96776->muxc = i2c_mux_alloc(client->adapter, dev, nr, 0,
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I2C_MUX_LOCKED, max96776_select, NULL);
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if (!max96776->muxc)
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return -ENOMEM;
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max96776->dev = dev;
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max96776->client = client;
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max96776->enable_gpio = devm_gpiod_get_optional(dev, "enable",
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GPIOD_ASIS);
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if (IS_ERR(max96776->enable_gpio))
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return dev_err_probe(dev, PTR_ERR(max96776->enable_gpio),
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"failed to get enable GPIO\n");
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ret = device_property_read_u32(dev->parent, "reg", &max96776->stream_id);
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if (ret)
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return dev_err_probe(dev, ret, "failed to get gmsl id\n");
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i2c_set_clientdata(client, max96776);
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max96776->regmap = devm_regmap_init_i2c(client,
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&max96776_regmap_config);
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if (IS_ERR(max96776->regmap))
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return dev_err_probe(dev, PTR_ERR(max96776->regmap),
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"failed to initialize regmap\n");
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max96776_power_on(max96776);
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ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, max96776_devs,
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ARRAY_SIZE(max96776_devs), NULL, 0, NULL);
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if (ret)
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return ret;
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for_each_available_child_of_node(dev->of_node, child) {
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if (of_property_read_u32(child, "reg", &nr))
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continue;
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ret = i2c_mux_add_adapter(max96776->muxc, 0, nr, 0);
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if (ret) {
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i2c_mux_del_adapters(max96776->muxc);
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return ret;
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}
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}
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return 0;
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}
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static void max96776_i2c_shutdown(struct i2c_client *client)
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{
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struct max96776 *max96776 = i2c_get_clientdata(client);
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max96776_power_off(max96776);
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}
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static int __maybe_unused max96776_suspend(struct device *dev)
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{
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struct max96776 *max96776 = dev_get_drvdata(dev);
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max96776_power_off(max96776);
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return 0;
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}
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static int __maybe_unused max96776_resume(struct device *dev)
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{
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struct max96776 *max96776 = dev_get_drvdata(dev);
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max96776_power_on(max96776);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(max96776_pm_ops, max96776_suspend, max96776_resume);
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static const struct of_device_id max96776_of_match[] = {
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{ .compatible = "maxim,max96776", },
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{}
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};
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MODULE_DEVICE_TABLE(of, max96776_of_match);
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static struct i2c_driver max96776_i2c_driver = {
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.driver = {
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.name = "max96776",
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.of_match_table = of_match_ptr(max96776_of_match),
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.pm = &max96776_pm_ops,
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},
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.probe_new = max96776_i2c_probe,
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.shutdown = max96776_i2c_shutdown,
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};
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module_i2c_driver(max96776_i2c_driver);
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MODULE_AUTHOR("Guochun Huang <hero.huang@rock-chips.com>");
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MODULE_DESCRIPTION("Maxim max96776 MFD driver");
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MODULE_LICENSE("GPL");
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131
include/linux/mfd/max96776.h
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131
include/linux/mfd/max96776.h
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@ -0,0 +1,131 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Defining registers address and its bit definitions of MAX96776
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*
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* Copyright (c) 2022 Rockchip Electronics Co. Ltd.
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*/
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#ifndef _MFD_MAX96776_H_
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#define _MFD_MAX96776_H_
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#include <linux/bitfield.h>
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/* 07f0h */
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#define TRAINING_SUCCESSFUL BIT(0)
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/* 1700h */
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#define CMD_RESET BIT(7)
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/* 6230h */
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#define HPD_PRESENT BIT(0)
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/* e776h */
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#define REBOOT_TRAINNING BIT(0)
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#define RUN_LINK_TRAINING BIT(1)
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#define AUX_READ BIT(4)
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#define AUX_WRITE BIT(5)
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/* e777h */
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#define RUN_COMMAND BIT(7)
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/* e778h */
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#define USER_DATA1_B0 GENMASK(7, 0)
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/* e779h */
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#define USER_DATA1_B1 GENMASK(7, 0)
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/* e77ah */
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#define USER_DATA2_B0 GENMASK(7, 0)
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/* e77ch */
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#define USER_DATA3_B0 GENMASK(7, 0)
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/* e790h */
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#define LINK_RATE GENMASK(4, 0)
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/* e792h */
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#define LANE_COUNT GENMASK(2, 0)
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/* e794h */
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#define HRES_B0 GENMASK(7, 0)
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/* e795h */
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#define HRES_B1 GENMASK(7, 0)
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/* e796h */
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#define HFP_B0 GENMASK(7, 0)
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/* e797h */
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#define HFP_B1 GENMASK(7, 0)
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/* e798h */
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#define HSW_B0 GENMASK(7, 0)
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/* e799h */
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#define HSW_B1 GENMASK(7, 0)
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/* e79ah */
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#define HBP_B0 GENMASK(7, 0)
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/* e79bh */
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#define HBP_B1 GENMASK(7, 0)
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/* e79ch */
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#define VRES_B0 GENMASK(7, 0)
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/* e79dh */
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#define VRES_B1 GENMASK(7, 0)
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/* e79eh */
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#define VFP_B0 GENMASK(7, 0)
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/* e79fh */
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#define VFP_B1 GENMASK(7, 0)
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/* e7a0h */
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#define VSW_B0 GENMASK(7, 0)
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/* e7a1h */
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#define VSW_B1 GENMASK(7, 0)
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/* e7a2h */
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#define VBP_B0 GENMASK(7, 0)
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/* e7a3h */
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#define VBP_B1 GENMASK(7, 0)
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/* e7a4h */
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#define HWORDS_B0 GENMASK(7, 0)
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/* e7a5h */
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#define HWORDS_B1 GENMASK(7, 0)
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/* e7a6h */
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#define MVID_B0 GENMASK(7, 0)
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/* e7a7h */
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#define MVID_B1 GENMASK(7, 0)
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/* e7a8h */
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#define NVID_B0 GENMASK(7, 0)
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/* e7a9h */
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#define NVID_B1 GENMASK(7, 0)
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/* e7aah */
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#define TUC_VALUE_B0 GENMASK(7, 0)
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/* e7abh */
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#define TUC_VALUE_B1 GENMASK(7, 0)
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/* e7ach */
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#define HSYNC_POL BIT(0)
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#define VSYNC_POL BIT(1)
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/* e7b0h */
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#define SS_ENABLE BIT(0)
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/* e7b1h */
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#define SSC_ENABLE BIT(4)
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#endif /* _MFD_MAX96776_H_ */
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