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FROMGIT: arm64: mte: Add asynchronous mode support

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MTE provides an asynchronous mode for detecting tag exceptions. In
particular instead of triggering a fault the arm64 core updates a
register which is checked by the kernel after the asynchronous tag
check fault has occurred.

Add support for MTE asynchronous mode.

The exception handling mechanism will be added with a future patch.

Note: KASAN HW activates async mode via kasan.mode kernel parameter.
The default mode is set to synchronous.
The code that verifies the status of TFSR_EL1 will be added with a
future patch.

Cc: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Andrey Konovalov <andreyknvl@google.com>
Acked-by: Andrey Konovalov <andreyknvl@google.com>
Tested-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Link: https://lore.kernel.org/r/20210315132019.33202-2-vincenzo.frascino@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Bug: 170327579
Bug: 172318110
(cherry picked from commit f3b7deef8d
 git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/
 for-next/mte-async-kernel-mode)
Signed-off-by: Alexander Potapenko <glider@google.com>
Change-Id: I5a2778bbb03595c24eb6cddb6c2b2dcb383b7907
This commit is contained in:
Vincenzo Frascino 2021-03-15 13:20:11 +00:00 • committed by Alexander Potapenko
commit 433b85479b
3 changed files with 24 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

4
arch/arm64/include/asm/memory.h
View file

@ -232,7 +232,9 @@ static inline const void *__tag_set(const void *addr, u8 tag)
}
#ifdef CONFIG_KASAN_HW_TAGS
#define arch_enable_tagging() mte_enable_kernel()
#define arch_enable_tagging_sync() mte_enable_kernel_sync()
#define arch_enable_tagging_async() mte_enable_kernel_async()
#define arch_enable_tagging() arch_enable_tagging_sync()
#define arch_set_tagging_report_once(state) mte_set_report_once(state)
#define arch_init_tags(max_tag) mte_init_tags(max_tag)
#define arch_get_random_tag() mte_get_random_tag()

9
arch/arm64/include/asm/mte-kasan.h
View file

@ -87,7 +87,8 @@ static inline void mte_set_mem_tag_range(void *addr, size_t size,
}
}
void mte_enable_kernel(void);
void mte_enable_kernel_sync(void);
void mte_enable_kernel_async(void);
void mte_init_tags(u64 max_tag);
void mte_set_report_once(bool state);
@ -115,7 +116,11 @@ static inline void mte_set_mem_tag_range(void *addr, size_t size,
{
}
static inline void mte_enable_kernel(void)
static inline void mte_enable_kernel_sync(void)
{
}
static inline void mte_enable_kernel_async(void)
{
}

16
arch/arm64/kernel/mte.c
View file

@ -107,11 +107,23 @@ void mte_init_tags(u64 max_tag)
write_sysreg_s(SYS_GCR_EL1_RRND | gcr_kernel_excl, SYS_GCR_EL1);
}
void mte_enable_kernel(void)
static inline void __mte_enable_kernel(const char *mode, unsigned long tcf)
{
/* Enable MTE Sync Mode for EL1. */
sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_SYNC);
sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, tcf);
isb();
pr_info_once("MTE: enabled in %s mode at EL1\n", mode);
}
void mte_enable_kernel_sync(void)
{
__mte_enable_kernel("synchronous", SCTLR_ELx_TCF_SYNC);
}
void mte_enable_kernel_async(void)
{
__mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC);
}
void mte_set_report_once(bool state)