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Microchip clock fixes for 6.0

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It contains fixes for Polarire SoCs:
 - fix panic at boot in clock initialization when building with clang-15
 - make RTC's AHB clock critical as rtc will stop if the AHB
   interface clock is disabled
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYyLmDgAKCRCejrg/N2X7
 /dS5AQD1meKPe/O9SPdiU3bibnVlOiYhi1DrLnLA5G1z/JQoTwD/WPeqm1DSWQ3g
 8Z7CNVQJ40wTz9HgD7wt1n1U8guDfQs=
 =P4U3
 -----END PGP SIGNATURE-----

Merge tag 'clk-microchip-fixes-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-fixes

Pull Microchip clock fixes for Polarfire SoCs:

 - fix panic at boot in clock initialization when building with clang-15
 - make RTC's AHB clock critical as rtc will stop if the AHB
   interface clock is disabled

* tag 'clk-microchip-fixes-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  clk: microchip: mpfs: make the rtc's ahb clock critical
  clk: microchip: mpfs: fix clk_cfg array bounds violation
This commit is contained in:
Stephen Boyd 2022-09-28 10:52:14 -07:00
commit 3d87f6c3be
1 changed files with 9 additions and 2 deletions
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11
drivers/clk/microchip/clk-mpfs.c
View file

@ -239,6 +239,11 @@ static const struct clk_ops mpfs_clk_cfg_ops = {
.hw.init = CLK_HW_INIT(_name, _parent, &mpfs_clk_cfg_ops, 0), \
}
#define CLK_CPU_OFFSET 0u
#define CLK_AXI_OFFSET 1u
#define CLK_AHB_OFFSET 2u
#define CLK_RTCREF_OFFSET 3u
static struct mpfs_cfg_hw_clock mpfs_cfg_clks[] = {
CLK_CFG(CLK_CPU, "clk_cpu", "clk_msspll", 0, 2, mpfs_div_cpu_axi_table, 0,
REG_CLOCK_CONFIG_CR),
@ -362,7 +367,7 @@ static const struct clk_ops mpfs_periph_clk_ops = {
_flags), \
}
#define PARENT_CLK(PARENT) (&mpfs_cfg_clks[CLK_##PARENT].hw)
#define PARENT_CLK(PARENT) (&mpfs_cfg_clks[CLK_##PARENT##_OFFSET].hw)
/*
* Critical clocks:
@ -370,6 +375,8 @@ static const struct clk_ops mpfs_periph_clk_ops = {
* trap handler
* - CLK_MMUART0: reserved by the hss
* - CLK_DDRC: provides clock to the ddr subsystem
* - CLK_RTC: the onboard RTC's AHB bus clock must be kept running as the rtc will stop
* if the AHB interface clock is disabled
* - CLK_FICx: these provide the processor side clocks to the "FIC" (Fabric InterConnect)
* clock domain crossers which provide the interface to the FPGA fabric. Disabling them
* causes the FPGA fabric to go into reset.
@ -394,7 +401,7 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = {
CLK_PERIPH(CLK_CAN0, "clk_periph_can0", PARENT_CLK(AHB), 14, 0),
CLK_PERIPH(CLK_CAN1, "clk_periph_can1", PARENT_CLK(AHB), 15, 0),
CLK_PERIPH(CLK_USB, "clk_periph_usb", PARENT_CLK(AHB), 16, 0),
CLK_PERIPH(CLK_RTC, "clk_periph_rtc", PARENT_CLK(AHB), 18, 0),
CLK_PERIPH(CLK_RTC, "clk_periph_rtc", PARENT_CLK(AHB), 18, CLK_IS_CRITICAL),
CLK_PERIPH(CLK_QSPI, "clk_periph_qspi", PARENT_CLK(AHB), 19, 0),
CLK_PERIPH(CLK_GPIO0, "clk_periph_gpio0", PARENT_CLK(AHB), 20, 0),
CLK_PERIPH(CLK_GPIO1, "clk_periph_gpio1", PARENT_CLK(AHB), 21, 0),