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arm64: dts: rockchip: px30: correct cif pinctrl place

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Change-Id: I0181fe97e0528c3552f4cef25453f9c2f834f7c8
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
This commit is contained in:
Zhang Yunlong 2018-01-25 19:43:35 +08:00 • committed by Dalon.zhang
commit 354664b4b4
1 changed files with 68 additions and 64 deletions
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136
arch/arm64/boot/dts/rockchip/px30.dtsi
View file

@ -936,8 +936,7 @@
reset-names = "rst_isp", "rst_mipicsiphy";
pinctrl-names = "default";
pinctrl-0 = <&cif_clkout_m0>;
rockchip,isp,mipiphy = <1>;
rockchip,isp,cifphy = <1>;
rockchip,isp,mipiphy = <0>;
rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
@ -2036,73 +2035,78 @@
};
};
};
cif-m0 {
cif_clkout_m0: cif-clkout-m0 {
rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
};
cif-m0 {
cif_clkout_m0: cif-clkout-m0 {
rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d2d9_m0: dvp-d2d9-m0 {
rockchip,pins =
<2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_sync */
<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */
<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,/* cif_clkin */
<2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d0d1_m0: dvp-d0d1-m0 {
rockchip,pins =
<2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data0 */
<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;/* cif_data1 */
};
dvp_d10d11_m0:d10-d11-m0 {
rockchip,pins =
<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data10 */
<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;/* cif_data11 */
};
};
dvp_d2d9_m0: dvp-d2d9-m0 {
rockchip,pins =
<2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_sync */
<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */
<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,/* cif_clkin */
<2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
};
cif-m1 {
cif_clkout_m1: cif-clkout-m1 {
rockchip,pins = <3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d2d9_m1: dvp-d2d9-m1 {
rockchip,pins =
<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
<3 RK_PD1 RK_FUNC_3 &pcfg_pull_none>,/* cif_sync */
<3 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,/* cif_href */
<3 RK_PD3 RK_FUNC_2 &pcfg_pull_none>,/* cif_clkin */
<3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d0d1_m1: dvp-d0d1-m1 {
rockchip,pins =
<3 RK_PA1 RK_FUNC_3 &pcfg_pull_none>,/* cif_data0 */
<3 RK_PA2 RK_FUNC_3 &pcfg_pull_none>;/* cif_data1 */
};
dvp_d10d11_m1:d10-d11-m1 {
rockchip,pins =
<3 RK_PC6 RK_FUNC_3 &pcfg_pull_none>,/* cif_data10 */
<3 RK_PC7 RK_FUNC_3 &pcfg_pull_none>;/* cif_data11 */
};
};
dvp_d0d1_m0: dvp-d0d1-m0 {
rockchip,pins =
<2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data0 */
<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;/* cif_data1 */
};
isp {
isp_prelight: isp-prelight {
rockchip,pins = <3 RK_PD1 RK_FUNC_4 &pcfg_pull_none>;/* ISP_PRELIGHTTRIG */
dvp_d10d11_m0:d10-d11-m0 {
rockchip,pins =
<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data10 */
<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;/* cif_data11 */
};
};
cif-m1 {
cif_clkout_m1: cif-clkout-m1 {
rockchip,pins = <3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d2d9_m1: dvp-d2d9-m1 {
rockchip,pins =
<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
<3 RK_PD1 RK_FUNC_3 &pcfg_pull_none>,/* cif_sync */
<3 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,/* cif_href */
<3 RK_PD3 RK_FUNC_2 &pcfg_pull_none>,/* cif_clkin */
<3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
};
dvp_d0d1_m1: dvp-d0d1-m1 {
rockchip,pins =
<3 RK_PA1 RK_FUNC_3 &pcfg_pull_none>,/* cif_data0 */
<3 RK_PA2 RK_FUNC_3 &pcfg_pull_none>;/* cif_data1 */
};
dvp_d10d11_m1:d10-d11-m1 {
rockchip,pins =
<3 RK_PC6 RK_FUNC_3 &pcfg_pull_none>,/* cif_data10 */
<3 RK_PC7 RK_FUNC_3 &pcfg_pull_none>;/* cif_data11 */
};
};
isp {
isp_prelight: isp-prelight {
rockchip,pins = <3 RK_PD1 RK_FUNC_4 &pcfg_pull_none>;/* ISP_PRELIGHTTRIG */
};
};
};
};