From 2e2a36fadcf5422bc58ceee5ff200c53e748723b Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Fri, 20 Oct 2017 18:00:59 +0800 Subject: [PATCH] clk: rockchip: add the needed cpuclk for rk3036 As the rk3036 supported the cpu opp table, we need add the related frequency rates. Change-Id: If50ed0fc02d3c8d0971d99bf392210616f1748c0 Signed-off-by: Caesar Wang --- drivers/clk/rockchip/clk-rk3036.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c index 7ce641a71049..51a624f678d3 100644 --- a/drivers/clk/rockchip/clk-rk3036.c +++ b/drivers/clk/rockchip/clk-rk3036.c @@ -104,8 +104,11 @@ static struct rockchip_pll_rate_table rk3036_pll_rates[] = { } static struct rockchip_cpuclk_rate_table rk3036_cpuclk_rates[] __initdata = { + RK3036_CPUCLK_RATE(1200000000, 4), + RK3036_CPUCLK_RATE(1008000000, 4), RK3036_CPUCLK_RATE(816000000, 4), RK3036_CPUCLK_RATE(600000000, 4), + RK3036_CPUCLK_RATE(408000000, 4), RK3036_CPUCLK_RATE(312000000, 4), };