This is the 5.10.75 stable release
-----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmFv5S8ACgkQONu9yGCS aT7IjQ/8CFAU/7DKwb6LMl8OOzui8yStdO2Dta2P0XfsfLVBcyFp0AZg9ODKRnzi 6JbUtmDxak/hobVPGEl8zaF8438+vXX85evqj0Ufq8fV8HFiHHmrC6CETz4fHY18 GJ6IaWkMx8dhIW5cmgVyPdBZ3dEOSyuJd74tq8GajyAYN7kdHTNxtWx8platQ2N7 q8hcfAmwBEhaZIKUU6mBLZodIFg1+guqPliXrNEnO+1YTTcBSMaG3plYH7C+7x/r vSimoSGDj2o2P0eFOpGrl9mXcXuXuvdCjeonp/O881Kjkbib3gYeTq32WcKa5e2R cQJKDEk5DCzbXxm+FuFdczId36n0c36pb2E6XCxPbq9+S+U0T3uUoNxSU8Qjgpt1 0B8z5QhEahzEJkvM0h4Ph5NVCZ8nIzWxnCAC6KbjMerQQ/4JtrAjY7BSPcN9TCfH EzfjpUyEjBey5gP48/a7nRHXlX968XkN2qpEeG77OilSHNp1V7ZSkHkq9rUOBFJl MF3EM9kHwtbmDl9X1fdd6qWSItFBZsAuZZl17wMsZhacSZooNlsL1dEz+wmQkUeT 1k0rn1ZJ0EECrFgbXfPHHwYBrEx/F2QF0iCiDBq4RwWlFgwche8UqJDFNn97alz2 Gyy80hf62YaDYnQgRLPOQjlwFnfAXth0c0biTETmIWTbkwof2fw= =mAv1 -----END PGP SIGNATURE----- Merge 5.10.75 into android12-5.10-lts Changes in 5.10.75 ALSA: usb-audio: Add quirk for VF0770 ALSA: pcm: Workaround for a wrong offset in SYNC_PTR compat ioctl ALSA: seq: Fix a potential UAF by wrong private_free call order ALSA: hda/realtek: Enable 4-speaker output for Dell Precision 5560 laptop ALSA: hda - Enable headphone mic on Dell Latitude laptops with ALC3254 ALSA: hda/realtek: Complete partial device name to avoid ambiguity ALSA: hda/realtek: Add quirk for Clevo X170KM-G ALSA: hda/realtek - ALC236 headset MIC recording issue ALSA: hda/realtek: Add quirk for TongFang PHxTxX1 ALSA: hda/realtek: Fix for quirk to enable speaker output on the Lenovo 13s Gen2 ALSA: hda/realtek: Fix the mic type detection issue for ASUS G551JW nds32/ftrace: Fix Error: invalid operands (*UND* and *UND* sections) for `^' s390: fix strrchr() implementation clk: socfpga: agilex: fix duplicate s2f_user0_clk csky: don't let sigreturn play with priveleged bits of status register csky: Fixup regs.sr broken in ptrace arm64/hugetlb: fix CMA gigantic page order for non-4K PAGE_SIZE drm/msm: Avoid potential overflow in timeout_to_jiffies() btrfs: unlock newly allocated extent buffer after error btrfs: deal with errors when replaying dir entry during log replay btrfs: deal with errors when adding inode reference during log replay btrfs: check for error when looking up inode during dir entry replay btrfs: update refs for any root except tree log roots btrfs: fix abort logic in btrfs_replace_file_extents x86/resctrl: Free the ctrlval arrays when domain_setup_mon_state() fails mei: me: add Ice Lake-N device id. USB: xhci: dbc: fix tty registration race xhci: guard accesses to ep_state in xhci_endpoint_reset() xhci: Fix command ring pointer corruption while aborting a command xhci: Enable trust tx length quirk for Fresco FL11 USB controller cb710: avoid NULL pointer subtraction efi/cper: use stack buffer for error record decoding efi: Change down_interruptible() in virt_efi_reset_system() to down_trylock() usb: musb: dsps: Fix the probe error path Input: xpad - add support for another USB ID of Nacon GC-100 USB: serial: qcserial: add EM9191 QDL support USB: serial: option: add Quectel EC200S-CN module support USB: serial: option: add Telit LE910Cx composition 0x1204 USB: serial: option: add prod. id for Quectel EG91 misc: fastrpc: Add missing lock before accessing find_vma() virtio: write back F_VERSION_1 before validate EDAC/armada-xp: Fix output of uncorrectable error counter nvmem: Fix shift-out-of-bound (UBSAN) with byte size cells x86/Kconfig: Do not enable AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT automatically powerpc/xive: Discard disabled interrupts in get_irqchip_state() iio: adc: aspeed: set driver data when adc probe. drivers: bus: simple-pm-bus: Add support for probing simple bus only devices driver core: Reject pointless SYNC_STATE_ONLY device links iio: adc: ad7192: Add IRQ flag iio: adc: ad7780: Fix IRQ flag iio: adc: ad7793: Fix IRQ flag iio: adc128s052: Fix the error handling path of 'adc128_probe()' iio: adc: max1027: Fix wrong shift with 12-bit devices iio: mtk-auxadc: fix case IIO_CHAN_INFO_PROCESSED iio: light: opt3001: Fixed timeout error when 0 lux iio: adc: max1027: Fix the number of max1X31 channels iio: ssp_sensors: add more range checking in ssp_parse_dataframe() iio: ssp_sensors: fix error code in ssp_print_mcu_debug() iio: dac: ti-dac5571: fix an error code in probe() tee: optee: Fix missing devices unregister during optee_remove ARM: dts: bcm2711-rpi-4-b: Fix usb's unit address ARM: dts: bcm2711: fix MDIO #address- and #size-cells ARM: dts: bcm2711-rpi-4-b: fix sd_io_1v8_reg regulator states ARM: dts: bcm2711-rpi-4-b: Fix pcie0's unit address formatting nvme-pci: Fix abort command id sctp: account stream padding length for reconf chunk gpio: pca953x: Improve bias setting net: arc: select CRC32 net: korina: select CRC32 net/mlx5e: Fix memory leak in mlx5_core_destroy_cq() error path net/mlx5e: Mutually exclude RX-FCS and RX-port-timestamp net: stmmac: fix get_hw_feature() on old hardware net: dsa: microchip: Added the condition for scheduling ksz_mib_read_work net: encx24j600: check error in devm_regmap_init_encx24j600 ethernet: s2io: fix setting mac address during resume vhost-vdpa: Fix the wrong input in config_cb nfc: fix error handling of nfc_proto_register() NFC: digital: fix possible memory leak in digital_tg_listen_mdaa() NFC: digital: fix possible memory leak in digital_in_send_sdd_req() pata_legacy: fix a couple uninitialized variable bugs ata: ahci_platform: fix null-ptr-deref in ahci_platform_enable_regulators() mlxsw: thermal: Fix out-of-bounds memory accesses platform/mellanox: mlxreg-io: Fix argument base in kstrtou32() call platform/mellanox: mlxreg-io: Fix read access of n-bytes size attributes spi: bcm-qspi: clear MSPI spifie interrupt during probe drm/panel: olimex-lcd-olinuxino: select CRC32 drm/edid: In connector_bad_edid() cap num_of_ext by num_blocks read drm/msm: Fix null pointer dereference on pointer edp drm/msm/mdp5: fix cursor-related warnings drm/msm/a6xx: Track current ctx by seqno drm/msm/dsi: Fix an error code in msm_dsi_modeset_init() drm/msm/dsi: fix off by one in dsi_bus_clk_enable error handling acpi/arm64: fix next_platform_timer() section mismatch error platform/x86: intel_scu_ipc: Fix busy loop expiry time mqprio: Correct stats in mqprio_dump_class_stats(). qed: Fix missing error code in qed_slowpath_start() r8152: select CRC32 and CRYPTO/CRYPTO_HASH/CRYPTO_SHA256 nfp: flow_offload: move flow_indr_dev_register from app init to app start net: mscc: ocelot: warn when a PTP IRQ is raised for an unknown skb ionic: don't remove netdev->dev_addr when syncing uc list net: dsa: mv88e6xxx: don't use PHY_DETECT on internal PHY's Linux 5.10.75 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I0c71baf6e376f0983e4a34d950c2bba7e226b564
This commit is contained in:
commit
221975092a
96 changed files with 704 additions and 260 deletions
2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 10
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SUBLEVEL = 74
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SUBLEVEL = 75
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EXTRAVERSION =
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NAME = Dare mighty things
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@ -54,8 +54,8 @@
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regulator-always-on;
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regulator-settling-time-us = <5000>;
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gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x1
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3300000 0x0>;
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states = <1800000 0x1>,
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<3300000 0x0>;
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status = "okay";
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};
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@ -255,15 +255,16 @@
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};
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&pcie0 {
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pci@1,0 {
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pci@0,0 {
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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reg = <0 0 0 0 0>;
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usb@1,0 {
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reg = <0x10000 0 0 0 0>;
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usb@0,0 {
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reg = <0 0 0 0 0>;
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resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
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};
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};
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@ -514,8 +514,8 @@
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compatible = "brcm,genet-mdio-v5";
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reg = <0xe14 0x8>;
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reg-names = "mdio";
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#address-cells = <0x0>;
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#size-cells = <0x1>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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};
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};
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};
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@ -43,7 +43,7 @@ void __init arm64_hugetlb_cma_reserve(void)
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#ifdef CONFIG_ARM64_4K_PAGES
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order = PUD_SHIFT - PAGE_SHIFT;
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#else
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order = CONT_PMD_SHIFT + PMD_SHIFT - PAGE_SHIFT;
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order = CONT_PMD_SHIFT - PAGE_SHIFT;
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#endif
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/*
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* HugeTLB CMA reservation is required for gigantic
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@ -98,7 +98,8 @@ static int gpr_set(struct task_struct *target,
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if (ret)
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return ret;
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regs.sr = task_pt_regs(target)->sr;
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/* BIT(0) of regs.sr is Condition Code/Carry bit */
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regs.sr = (regs.sr & BIT(0)) | (task_pt_regs(target)->sr & ~BIT(0));
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#ifdef CONFIG_CPU_HAS_HILO
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regs.dcsr = task_pt_regs(target)->dcsr;
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#endif
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@ -52,10 +52,14 @@ static long restore_sigcontext(struct pt_regs *regs,
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struct sigcontext __user *sc)
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{
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int err = 0;
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unsigned long sr = regs->sr;
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/* sc_pt_regs is structured the same as the start of pt_regs */
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err |= __copy_from_user(regs, &sc->sc_pt_regs, sizeof(struct pt_regs));
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/* BIT(0) of regs->sr is Condition Code/Carry bit */
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regs->sr = (sr & ~1) | (regs->sr & 1);
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/* Restore the floating-point state. */
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err |= restore_fpu_state(sc);
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@ -997,7 +997,8 @@ static int xive_get_irqchip_state(struct irq_data *data,
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* interrupt to be inactive in that case.
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*/
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*state = (pq != XIVE_ESB_INVALID) && !xd->stale_p &&
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(xd->saved_p || !!(pq & XIVE_ESB_VAL_P));
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(xd->saved_p || (!!(pq & XIVE_ESB_VAL_P) &&
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!irqd_irq_disabled(data)));
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return 0;
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default:
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return -EINVAL;
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@ -246,14 +246,13 @@ EXPORT_SYMBOL(strcmp);
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#ifdef __HAVE_ARCH_STRRCHR
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char *strrchr(const char *s, int c)
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{
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size_t len = __strend(s) - s;
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ssize_t len = __strend(s) - s;
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if (len)
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do {
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if (s[len] == (char) c)
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return (char *) s + len;
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} while (--len > 0);
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return NULL;
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do {
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if (s[len] == (char)c)
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return (char *)s + len;
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} while (--len >= 0);
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return NULL;
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}
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EXPORT_SYMBOL(strrchr);
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#endif
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@ -1541,7 +1541,6 @@ config AMD_MEM_ENCRYPT
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config AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT
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bool "Activate AMD Secure Memory Encryption (SME) by default"
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default y
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depends on AMD_MEM_ENCRYPT
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help
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Say yes to have system memory encrypted by default if running on
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@ -590,6 +590,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource *r)
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}
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if (r->mon_capable && domain_setup_mon_state(r, d)) {
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kfree(d->ctrl_val);
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kfree(d->mbps_val);
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kfree(d);
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return;
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}
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@ -36,7 +36,7 @@ struct acpi_gtdt_descriptor {
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static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
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static inline void *next_platform_timer(void *platform_timer)
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static inline __init void *next_platform_timer(void *platform_timer)
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{
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struct acpi_gtdt_header *gh = platform_timer;
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@ -440,10 +440,7 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
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hpriv->phy_regulator = devm_regulator_get(dev, "phy");
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if (IS_ERR(hpriv->phy_regulator)) {
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rc = PTR_ERR(hpriv->phy_regulator);
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if (rc == -EPROBE_DEFER)
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goto err_out;
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rc = 0;
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hpriv->phy_regulator = NULL;
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goto err_out;
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}
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if (flags & AHCI_PLATFORM_GET_RESETS) {
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@ -315,7 +315,8 @@ static unsigned int pdc_data_xfer_vlb(struct ata_queued_cmd *qc,
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iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
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if (unlikely(slop)) {
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__le32 pad;
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__le32 pad = 0;
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if (rw == READ) {
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pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
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memcpy(buf + buflen - slop, &pad, slop);
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@ -705,7 +706,8 @@ static unsigned int vlb32_data_xfer(struct ata_queued_cmd *qc,
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ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
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if (unlikely(slop)) {
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__le32 pad;
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__le32 pad = 0;
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if (rw == WRITE) {
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memcpy(&pad, buf + buflen - slop, slop);
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iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
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@ -672,7 +672,8 @@ struct device_link *device_link_add(struct device *consumer,
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{
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struct device_link *link;
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if (!consumer || !supplier || flags & ~DL_ADD_VALID_FLAGS ||
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if (!consumer || !supplier || consumer == supplier ||
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flags & ~DL_ADD_VALID_FLAGS ||
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(flags & DL_FLAG_STATELESS && flags & DL_MANAGED_LINK_FLAGS) ||
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(flags & DL_FLAG_SYNC_STATE_ONLY &&
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(flags & ~DL_FLAG_INFERRED) != DL_FLAG_SYNC_STATE_ONLY) ||
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@ -16,7 +16,33 @@
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static int simple_pm_bus_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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const struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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const struct of_device_id *match;
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/*
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* Allow user to use driver_override to bind this driver to a
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* transparent bus device which has a different compatible string
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* that's not listed in simple_pm_bus_of_match. We don't want to do any
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* of the simple-pm-bus tasks for these devices, so return early.
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*/
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if (pdev->driver_override)
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return 0;
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match = of_match_device(dev->driver->of_match_table, dev);
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/*
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* These are transparent bus devices (not simple-pm-bus matches) that
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* have their child nodes populated automatically. So, don't need to
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* do anything more. We only match with the device if this driver is
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* the most specific match because we don't want to incorrectly bind to
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* a device that has a more specific driver.
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*/
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if (match && match->data) {
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if (of_property_match_string(np, "compatible", match->compatible) == 0)
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return 0;
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else
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return -ENODEV;
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}
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dev_dbg(&pdev->dev, "%s\n", __func__);
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@ -30,14 +56,25 @@ static int simple_pm_bus_probe(struct platform_device *pdev)
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static int simple_pm_bus_remove(struct platform_device *pdev)
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{
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const void *data = of_device_get_match_data(&pdev->dev);
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if (pdev->driver_override || data)
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return 0;
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dev_dbg(&pdev->dev, "%s\n", __func__);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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#define ONLY_BUS ((void *) 1) /* Match if the device is only a bus. */
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static const struct of_device_id simple_pm_bus_of_match[] = {
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{ .compatible = "simple-pm-bus", },
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{ .compatible = "simple-bus", .data = ONLY_BUS },
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{ .compatible = "simple-mfd", .data = ONLY_BUS },
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{ .compatible = "isa", .data = ONLY_BUS },
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{ .compatible = "arm,amba-bus", .data = ONLY_BUS },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, simple_pm_bus_of_match);
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@ -165,13 +165,6 @@ static const struct clk_parent_data mpu_mux[] = {
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.name = "boot_clk", },
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};
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static const struct clk_parent_data s2f_usr0_mux[] = {
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{ .fw_name = "f2s-free-clk",
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.name = "f2s-free-clk", },
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{ .fw_name = "boot_clk",
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.name = "boot_clk", },
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};
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static const struct clk_parent_data emac_mux[] = {
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{ .fw_name = "emaca_free_clk",
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.name = "emaca_free_clk", },
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@ -299,8 +292,6 @@ static const struct stratix10_gate_clock agilex_gate_clks[] = {
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4, 0x44, 28, 1, 0, 0, 0},
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{ AGILEX_CS_TIMER_CLK, "cs_timer_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
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5, 0, 0, 0, 0x30, 1, 0},
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{ AGILEX_S2F_USER0_CLK, "s2f_user0_clk", NULL, s2f_usr0_mux, ARRAY_SIZE(s2f_usr0_mux), 0, 0x24,
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6, 0, 0, 0, 0, 0, 0},
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{ AGILEX_EMAC0_CLK, "emac0_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
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0, 0, 0, 0, 0x94, 26, 0},
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{ AGILEX_EMAC1_CLK, "emac1_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
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|
|
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@ -178,7 +178,7 @@ static void axp_mc_check(struct mem_ctl_info *mci)
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"details unavailable (multiple errors)");
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if (cnt_dbe)
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edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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cnt_sbe, /* error count */
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cnt_dbe, /* error count */
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0, 0, 0, /* pfn, offset, syndrome */
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-1, -1, -1, /* top, mid, low layer */
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mci->ctl_name,
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|
|
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|
@ -25,8 +25,6 @@
|
|||
#include <acpi/ghes.h>
|
||||
#include <ras/ras_event.h>
|
||||
|
||||
static char rcd_decode_str[CPER_REC_LEN];
|
||||
|
||||
/*
|
||||
* CPER record ID need to be unique even after reboot, because record
|
||||
* ID is used as index for ERST storage, while CPER records from
|
||||
|
|
@ -313,6 +311,7 @@ const char *cper_mem_err_unpack(struct trace_seq *p,
|
|||
struct cper_mem_err_compact *cmem)
|
||||
{
|
||||
const char *ret = trace_seq_buffer_ptr(p);
|
||||
char rcd_decode_str[CPER_REC_LEN];
|
||||
|
||||
if (cper_mem_err_location(cmem, rcd_decode_str))
|
||||
trace_seq_printf(p, "%s", rcd_decode_str);
|
||||
|
|
@ -327,6 +326,7 @@ static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem,
|
|||
int len)
|
||||
{
|
||||
struct cper_mem_err_compact cmem;
|
||||
char rcd_decode_str[CPER_REC_LEN];
|
||||
|
||||
/* Don't trust UEFI 2.1/2.2 structure with bad validation bits */
|
||||
if (len == sizeof(struct cper_sec_mem_err_old) &&
|
||||
|
|
|
|||
|
|
@ -414,7 +414,7 @@ static void virt_efi_reset_system(int reset_type,
|
|||
unsigned long data_size,
|
||||
efi_char16_t *data)
|
||||
{
|
||||
if (down_interruptible(&efi_runtime_lock)) {
|
||||
if (down_trylock(&efi_runtime_lock)) {
|
||||
pr_warn("failed to invoke the reset_system() runtime service:\n"
|
||||
"could not get exclusive access to the firmware\n");
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -558,21 +558,21 @@ static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
|
|||
|
||||
mutex_lock(&chip->i2c_lock);
|
||||
|
||||
/* Disable pull-up/pull-down */
|
||||
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
/* Configure pull-up/pull-down */
|
||||
if (config == PIN_CONFIG_BIAS_PULL_UP)
|
||||
ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
|
||||
else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
|
||||
ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
|
||||
else
|
||||
ret = 0;
|
||||
if (ret)
|
||||
goto exit;
|
||||
|
||||
/* Enable pull-up/pull-down */
|
||||
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
|
||||
/* Disable/Enable pull-up/pull-down */
|
||||
if (config == PIN_CONFIG_BIAS_DISABLE)
|
||||
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
|
||||
else
|
||||
ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
|
||||
|
||||
exit:
|
||||
mutex_unlock(&chip->i2c_lock);
|
||||
|
|
@ -586,7 +586,9 @@ static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
|
|||
|
||||
switch (pinconf_to_config_param(config)) {
|
||||
case PIN_CONFIG_BIAS_PULL_UP:
|
||||
case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
|
||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
||||
case PIN_CONFIG_BIAS_DISABLE:
|
||||
return pca953x_gpio_set_pull_up_down(chip, offset, config);
|
||||
default:
|
||||
return -ENOTSUPP;
|
||||
|
|
|
|||
|
|
@ -1835,11 +1835,20 @@ static void connector_bad_edid(struct drm_connector *connector,
|
|||
u8 *edid, int num_blocks)
|
||||
{
|
||||
int i;
|
||||
u8 num_of_ext = edid[0x7e];
|
||||
u8 last_block;
|
||||
|
||||
/*
|
||||
* 0x7e in the EDID is the number of extension blocks. The EDID
|
||||
* is 1 (base block) + num_ext_blocks big. That means we can think
|
||||
* of 0x7e in the EDID of the _index_ of the last block in the
|
||||
* combined chunk of memory.
|
||||
*/
|
||||
last_block = edid[0x7e];
|
||||
|
||||
/* Calculate real checksum for the last edid extension block data */
|
||||
connector->real_edid_checksum =
|
||||
drm_edid_block_checksum(edid + num_of_ext * EDID_LENGTH);
|
||||
if (last_block < num_blocks)
|
||||
connector->real_edid_checksum =
|
||||
drm_edid_block_checksum(edid + last_block * EDID_LENGTH);
|
||||
|
||||
if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS))
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu,
|
|||
u32 asid;
|
||||
u64 memptr = rbmemptr(ring, ttbr0);
|
||||
|
||||
if (ctx == a6xx_gpu->cur_ctx)
|
||||
if (ctx->seqno == a6xx_gpu->cur_ctx_seqno)
|
||||
return;
|
||||
|
||||
if (msm_iommu_pagetable_params(ctx->aspace->mmu, &ttbr, &asid))
|
||||
|
|
@ -132,7 +132,7 @@ static void a6xx_set_pagetable(struct a6xx_gpu *a6xx_gpu,
|
|||
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
|
||||
OUT_RING(ring, 0x31);
|
||||
|
||||
a6xx_gpu->cur_ctx = ctx;
|
||||
a6xx_gpu->cur_ctx_seqno = ctx->seqno;
|
||||
}
|
||||
|
||||
static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
|
||||
|
|
@ -887,7 +887,7 @@ static int a6xx_hw_init(struct msm_gpu *gpu)
|
|||
/* Always come up on rb 0 */
|
||||
a6xx_gpu->cur_ring = gpu->rb[0];
|
||||
|
||||
a6xx_gpu->cur_ctx = NULL;
|
||||
a6xx_gpu->cur_ctx_seqno = 0;
|
||||
|
||||
/* Enable the SQE_to start the CP engine */
|
||||
gpu_write(gpu, REG_A6XX_CP_SQE_CNTL, 1);
|
||||
|
|
|
|||
|
|
@ -19,7 +19,16 @@ struct a6xx_gpu {
|
|||
uint64_t sqe_iova;
|
||||
|
||||
struct msm_ringbuffer *cur_ring;
|
||||
struct msm_file_private *cur_ctx;
|
||||
|
||||
/**
|
||||
* cur_ctx_seqno:
|
||||
*
|
||||
* The ctx->seqno value of the context with current pgtables
|
||||
* installed. Tracked by seqno rather than pointer value to
|
||||
* avoid dangling pointers, and cases where a ctx can be freed
|
||||
* and a new one created with the same address.
|
||||
*/
|
||||
int cur_ctx_seqno;
|
||||
|
||||
struct a6xx_gmu gmu;
|
||||
|
||||
|
|
|
|||
|
|
@ -1119,6 +1119,20 @@ static void mdp5_crtc_reset(struct drm_crtc *crtc)
|
|||
__drm_atomic_helper_crtc_reset(crtc, &mdp5_cstate->base);
|
||||
}
|
||||
|
||||
static const struct drm_crtc_funcs mdp5_crtc_no_lm_cursor_funcs = {
|
||||
.set_config = drm_atomic_helper_set_config,
|
||||
.destroy = mdp5_crtc_destroy,
|
||||
.page_flip = drm_atomic_helper_page_flip,
|
||||
.reset = mdp5_crtc_reset,
|
||||
.atomic_duplicate_state = mdp5_crtc_duplicate_state,
|
||||
.atomic_destroy_state = mdp5_crtc_destroy_state,
|
||||
.atomic_print_state = mdp5_crtc_atomic_print_state,
|
||||
.get_vblank_counter = mdp5_crtc_get_vblank_counter,
|
||||
.enable_vblank = msm_crtc_enable_vblank,
|
||||
.disable_vblank = msm_crtc_disable_vblank,
|
||||
.get_vblank_timestamp = drm_crtc_vblank_helper_get_vblank_timestamp,
|
||||
};
|
||||
|
||||
static const struct drm_crtc_funcs mdp5_crtc_funcs = {
|
||||
.set_config = drm_atomic_helper_set_config,
|
||||
.destroy = mdp5_crtc_destroy,
|
||||
|
|
@ -1307,6 +1321,8 @@ struct drm_crtc *mdp5_crtc_init(struct drm_device *dev,
|
|||
mdp5_crtc->lm_cursor_enabled = cursor_plane ? false : true;
|
||||
|
||||
drm_crtc_init_with_planes(dev, crtc, plane, cursor_plane,
|
||||
cursor_plane ?
|
||||
&mdp5_crtc_no_lm_cursor_funcs :
|
||||
&mdp5_crtc_funcs, NULL);
|
||||
|
||||
drm_flip_work_init(&mdp5_crtc->unref_cursor_work,
|
||||
|
|
|
|||
|
|
@ -208,8 +208,10 @@ int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
|
|||
goto fail;
|
||||
}
|
||||
|
||||
if (!msm_dsi_manager_validate_current_config(msm_dsi->id))
|
||||
if (!msm_dsi_manager_validate_current_config(msm_dsi->id)) {
|
||||
ret = -EINVAL;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
msm_dsi->encoder = encoder;
|
||||
|
||||
|
|
|
|||
|
|
@ -464,7 +464,7 @@ static int dsi_bus_clk_enable(struct msm_dsi_host *msm_host)
|
|||
|
||||
return 0;
|
||||
err:
|
||||
for (; i > 0; i--)
|
||||
while (--i >= 0)
|
||||
clk_disable_unprepare(msm_host->bus_clks[i]);
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -1116,7 +1116,7 @@ void msm_edp_ctrl_power(struct edp_ctrl *ctrl, bool on)
|
|||
int msm_edp_ctrl_init(struct msm_edp *edp)
|
||||
{
|
||||
struct edp_ctrl *ctrl = NULL;
|
||||
struct device *dev = &edp->pdev->dev;
|
||||
struct device *dev;
|
||||
int ret;
|
||||
|
||||
if (!edp) {
|
||||
|
|
@ -1124,6 +1124,7 @@ int msm_edp_ctrl_init(struct msm_edp *edp)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev = &edp->pdev->dev;
|
||||
ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL);
|
||||
if (!ctrl)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -581,6 +581,7 @@ static void load_gpu(struct drm_device *dev)
|
|||
|
||||
static int context_init(struct drm_device *dev, struct drm_file *file)
|
||||
{
|
||||
static atomic_t ident = ATOMIC_INIT(0);
|
||||
struct msm_drm_private *priv = dev->dev_private;
|
||||
struct msm_file_private *ctx;
|
||||
|
||||
|
|
@ -594,6 +595,8 @@ static int context_init(struct drm_device *dev, struct drm_file *file)
|
|||
ctx->aspace = msm_gpu_create_private_address_space(priv->gpu, current);
|
||||
file->driver_priv = ctx;
|
||||
|
||||
ctx->seqno = atomic_inc_return(&ident);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -58,6 +58,7 @@ struct msm_file_private {
|
|||
int queueid;
|
||||
struct msm_gem_address_space *aspace;
|
||||
struct kref ref;
|
||||
int seqno;
|
||||
};
|
||||
|
||||
enum msm_mdp_plane_property {
|
||||
|
|
@ -543,7 +544,7 @@ static inline int align_pitch(int width, int bpp)
|
|||
static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
|
||||
{
|
||||
ktime_t now = ktime_get();
|
||||
unsigned long remaining_jiffies;
|
||||
s64 remaining_jiffies;
|
||||
|
||||
if (ktime_compare(*timeout, now) < 0) {
|
||||
remaining_jiffies = 0;
|
||||
|
|
@ -552,7 +553,7 @@ static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
|
|||
remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ);
|
||||
}
|
||||
|
||||
return remaining_jiffies;
|
||||
return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
|
||||
}
|
||||
|
||||
#endif /* __MSM_DRV_H__ */
|
||||
|
|
|
|||
|
|
@ -233,6 +233,7 @@ config DRM_PANEL_OLIMEX_LCD_OLINUXINO
|
|||
depends on OF
|
||||
depends on I2C
|
||||
depends on BACKLIGHT_CLASS_DEVICE
|
||||
select CRC32
|
||||
help
|
||||
The panel is used with different sizes LCDs, from 480x272 to
|
||||
1280x800, and 24 bit per pixel.
|
||||
|
|
|
|||
|
|
@ -293,6 +293,7 @@ static const struct ad_sigma_delta_info ad7192_sigma_delta_info = {
|
|||
.has_registers = true,
|
||||
.addr_shift = 3,
|
||||
.read_mask = BIT(6),
|
||||
.irq_flags = IRQF_TRIGGER_FALLING,
|
||||
};
|
||||
|
||||
static const struct ad_sd_calib_data ad7192_calib_arr[8] = {
|
||||
|
|
|
|||
|
|
@ -203,7 +203,7 @@ static const struct ad_sigma_delta_info ad7780_sigma_delta_info = {
|
|||
.set_mode = ad7780_set_mode,
|
||||
.postprocess_sample = ad7780_postprocess_sample,
|
||||
.has_registers = false,
|
||||
.irq_flags = IRQF_TRIGGER_LOW,
|
||||
.irq_flags = IRQF_TRIGGER_FALLING,
|
||||
};
|
||||
|
||||
#define _AD7780_CHANNEL(_bits, _wordsize, _mask_all) \
|
||||
|
|
|
|||
|
|
@ -206,7 +206,7 @@ static const struct ad_sigma_delta_info ad7793_sigma_delta_info = {
|
|||
.has_registers = true,
|
||||
.addr_shift = 3,
|
||||
.read_mask = BIT(6),
|
||||
.irq_flags = IRQF_TRIGGER_LOW,
|
||||
.irq_flags = IRQF_TRIGGER_FALLING,
|
||||
};
|
||||
|
||||
static const struct ad_sd_calib_data ad7793_calib_arr[6] = {
|
||||
|
|
|
|||
|
|
@ -183,6 +183,7 @@ static int aspeed_adc_probe(struct platform_device *pdev)
|
|||
|
||||
data = iio_priv(indio_dev);
|
||||
data->dev = &pdev->dev;
|
||||
platform_set_drvdata(pdev, indio_dev);
|
||||
|
||||
data->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(data->base))
|
||||
|
|
|
|||
|
|
@ -103,7 +103,7 @@ MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids);
|
|||
.sign = 'u', \
|
||||
.realbits = depth, \
|
||||
.storagebits = 16, \
|
||||
.shift = 2, \
|
||||
.shift = (depth == 10) ? 2 : 0, \
|
||||
.endianness = IIO_BE, \
|
||||
}, \
|
||||
}
|
||||
|
|
@ -142,7 +142,6 @@ MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids);
|
|||
MAX1027_V_CHAN(11, depth)
|
||||
|
||||
#define MAX1X31_CHANNELS(depth) \
|
||||
MAX1X27_CHANNELS(depth), \
|
||||
MAX1X29_CHANNELS(depth), \
|
||||
MAX1027_V_CHAN(12, depth), \
|
||||
MAX1027_V_CHAN(13, depth), \
|
||||
|
|
|
|||
|
|
@ -82,6 +82,10 @@ static const struct iio_chan_spec mt6577_auxadc_iio_channels[] = {
|
|||
MT6577_AUXADC_CHANNEL(15),
|
||||
};
|
||||
|
||||
/* For Voltage calculation */
|
||||
#define VOLTAGE_FULL_RANGE 1500 /* VA voltage */
|
||||
#define AUXADC_PRECISE 4096 /* 12 bits */
|
||||
|
||||
static int mt_auxadc_get_cali_data(int rawdata, bool enable_cali)
|
||||
{
|
||||
return rawdata;
|
||||
|
|
@ -191,6 +195,10 @@ static int mt6577_auxadc_read_raw(struct iio_dev *indio_dev,
|
|||
}
|
||||
if (adc_dev->dev_comp->sample_data_cali)
|
||||
*val = mt_auxadc_get_cali_data(*val, true);
|
||||
|
||||
/* Convert adc raw data to voltage: 0 - 1500 mV */
|
||||
*val = *val * VOLTAGE_FULL_RANGE / AUXADC_PRECISE;
|
||||
|
||||
return IIO_VAL_INT;
|
||||
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -171,7 +171,13 @@ static int adc128_probe(struct spi_device *spi)
|
|||
mutex_init(&adc->lock);
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret)
|
||||
goto err_disable_regulator;
|
||||
|
||||
return 0;
|
||||
|
||||
err_disable_regulator:
|
||||
regulator_disable(adc->reg);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -137,7 +137,7 @@ static int ssp_print_mcu_debug(char *data_frame, int *data_index,
|
|||
if (length > received_len - *data_index || length <= 0) {
|
||||
ssp_dbg("[SSP]: MSG From MCU-invalid debug length(%d/%d)\n",
|
||||
length, received_len);
|
||||
return length ? length : -EPROTO;
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
ssp_dbg("[SSP]: MSG From MCU - %s\n", &data_frame[*data_index]);
|
||||
|
|
@ -273,6 +273,8 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len)
|
|||
for (idx = 0; idx < len;) {
|
||||
switch (dataframe[idx++]) {
|
||||
case SSP_MSG2AP_INST_BYPASS_DATA:
|
||||
if (idx >= len)
|
||||
return -EPROTO;
|
||||
sd = dataframe[idx++];
|
||||
if (sd < 0 || sd >= SSP_SENSOR_MAX) {
|
||||
dev_err(SSP_DEV,
|
||||
|
|
@ -282,10 +284,13 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len)
|
|||
|
||||
if (indio_devs[sd]) {
|
||||
spd = iio_priv(indio_devs[sd]);
|
||||
if (spd->process_data)
|
||||
if (spd->process_data) {
|
||||
if (idx >= len)
|
||||
return -EPROTO;
|
||||
spd->process_data(indio_devs[sd],
|
||||
&dataframe[idx],
|
||||
data->timestamp);
|
||||
}
|
||||
} else {
|
||||
dev_err(SSP_DEV, "no client for frame\n");
|
||||
}
|
||||
|
|
@ -293,6 +298,8 @@ static int ssp_parse_dataframe(struct ssp_data *data, char *dataframe, int len)
|
|||
idx += ssp_offset_map[sd];
|
||||
break;
|
||||
case SSP_MSG2AP_INST_DEBUG_DATA:
|
||||
if (idx >= len)
|
||||
return -EPROTO;
|
||||
sd = ssp_print_mcu_debug(dataframe, &idx, len);
|
||||
if (sd) {
|
||||
dev_err(SSP_DEV,
|
||||
|
|
|
|||
|
|
@ -350,6 +350,7 @@ static int dac5571_probe(struct i2c_client *client,
|
|||
data->dac5571_pwrdwn = dac5571_pwrdwn_quad;
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -276,6 +276,8 @@ static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
|
|||
ret = wait_event_timeout(opt->result_ready_queue,
|
||||
opt->result_ready,
|
||||
msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
|
||||
if (ret == 0)
|
||||
return -ETIMEDOUT;
|
||||
} else {
|
||||
/* Sleep for result ready time */
|
||||
timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
|
||||
|
|
@ -312,9 +314,7 @@ err:
|
|||
/* Disallow IRQ to access the device while lock is active */
|
||||
opt->ok_to_ignore_lock = false;
|
||||
|
||||
if (ret == 0)
|
||||
return -ETIMEDOUT;
|
||||
else if (ret < 0)
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (opt->use_irq) {
|
||||
|
|
|
|||
|
|
@ -331,6 +331,7 @@ static const struct xpad_device {
|
|||
{ 0x24c6, 0x5b03, "Thrustmaster Ferrari 458 Racing Wheel", 0, XTYPE_XBOX360 },
|
||||
{ 0x24c6, 0x5d04, "Razer Sabertooth", 0, XTYPE_XBOX360 },
|
||||
{ 0x24c6, 0xfafe, "Rock Candy Gamepad for Xbox 360", 0, XTYPE_XBOX360 },
|
||||
{ 0x3285, 0x0607, "Nacon GC-100", 0, XTYPE_XBOX360 },
|
||||
{ 0x3767, 0x0101, "Fanatec Speedster 3 Forceshock Wheel", 0, XTYPE_XBOX },
|
||||
{ 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX },
|
||||
{ 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN }
|
||||
|
|
@ -447,6 +448,7 @@ static const struct usb_device_id xpad_table[] = {
|
|||
XPAD_XBOXONE_VENDOR(0x24c6), /* PowerA Controllers */
|
||||
XPAD_XBOXONE_VENDOR(0x2e24), /* Hyperkin Duke X-Box One pad */
|
||||
XPAD_XBOX360_VENDOR(0x2f24), /* GameSir Controllers */
|
||||
XPAD_XBOX360_VENDOR(0x3285), /* Nacon GC-100 */
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@ static inline bool needs_unaligned_copy(const void *ptr)
|
|||
#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
|
||||
return false;
|
||||
#else
|
||||
return ((ptr - NULL) & 3) != 0;
|
||||
return ((uintptr_t)ptr & 3) != 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -812,10 +812,12 @@ static int fastrpc_get_args(u32 kernel, struct fastrpc_invoke_ctx *ctx)
|
|||
rpra[i].pv = (u64) ctx->args[i].ptr;
|
||||
pages[i].addr = ctx->maps[i]->phys;
|
||||
|
||||
mmap_read_lock(current->mm);
|
||||
vma = find_vma(current->mm, ctx->args[i].ptr);
|
||||
if (vma)
|
||||
pages[i].addr += ctx->args[i].ptr -
|
||||
vma->vm_start;
|
||||
mmap_read_unlock(current->mm);
|
||||
|
||||
pg_start = (ctx->args[i].ptr & PAGE_MASK) >> PAGE_SHIFT;
|
||||
pg_end = ((ctx->args[i].ptr + len - 1) & PAGE_MASK) >>
|
||||
|
|
|
|||
|
|
@ -92,6 +92,7 @@
|
|||
#define MEI_DEV_ID_CDF 0x18D3 /* Cedar Fork */
|
||||
|
||||
#define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */
|
||||
#define MEI_DEV_ID_ICP_N 0x38E0 /* Ice Lake Point N */
|
||||
|
||||
#define MEI_DEV_ID_JSP_N 0x4DE0 /* Jasper Lake Point N */
|
||||
|
||||
|
|
|
|||
|
|
@ -96,6 +96,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
|
|||
{MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_ITOUCH_CFG)},
|
||||
|
||||
{MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)},
|
||||
{MEI_PCI_DEVICE(MEI_DEV_ID_ICP_N, MEI_ME_PCH12_CFG)},
|
||||
|
||||
{MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)},
|
||||
{MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)},
|
||||
|
|
|
|||
|
|
@ -460,8 +460,10 @@ EXPORT_SYMBOL(ksz_switch_register);
|
|||
void ksz_switch_remove(struct ksz_device *dev)
|
||||
{
|
||||
/* timer started */
|
||||
if (dev->mib_read_interval)
|
||||
if (dev->mib_read_interval) {
|
||||
dev->mib_read_interval = 0;
|
||||
cancel_delayed_work_sync(&dev->mib_read);
|
||||
}
|
||||
|
||||
dev->dev_ops->exit(dev);
|
||||
dsa_unregister_switch(dev->ds);
|
||||
|
|
|
|||
|
|
@ -726,7 +726,11 @@ static void mv88e6xxx_mac_link_down(struct dsa_switch *ds, int port,
|
|||
ops = chip->info->ops;
|
||||
|
||||
mv88e6xxx_reg_lock(chip);
|
||||
if ((!mv88e6xxx_port_ppu_updates(chip, port) ||
|
||||
/* Internal PHYs propagate their configuration directly to the MAC.
|
||||
* External PHYs depend on whether the PPU is enabled for this port.
|
||||
*/
|
||||
if (((!mv88e6xxx_phy_is_internal(ds, port) &&
|
||||
!mv88e6xxx_port_ppu_updates(chip, port)) ||
|
||||
mode == MLO_AN_FIXED) && ops->port_set_link)
|
||||
err = ops->port_set_link(chip, port, LINK_FORCED_DOWN);
|
||||
mv88e6xxx_reg_unlock(chip);
|
||||
|
|
@ -749,7 +753,12 @@ static void mv88e6xxx_mac_link_up(struct dsa_switch *ds, int port,
|
|||
ops = chip->info->ops;
|
||||
|
||||
mv88e6xxx_reg_lock(chip);
|
||||
if (!mv88e6xxx_port_ppu_updates(chip, port) || mode == MLO_AN_FIXED) {
|
||||
/* Internal PHYs propagate their configuration directly to the MAC.
|
||||
* External PHYs depend on whether the PPU is enabled for this port.
|
||||
*/
|
||||
if ((!mv88e6xxx_phy_is_internal(ds, port) &&
|
||||
!mv88e6xxx_port_ppu_updates(chip, port)) ||
|
||||
mode == MLO_AN_FIXED) {
|
||||
/* FIXME: for an automedia port, should we force the link
|
||||
* down here - what if the link comes up due to "other" media
|
||||
* while we're bringing the port up, how is the exclusivity
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@ config JME
|
|||
config KORINA
|
||||
tristate "Korina (IDT RC32434) Ethernet support"
|
||||
depends on MIKROTIK_RB532
|
||||
select CRC32
|
||||
help
|
||||
If you have a Mikrotik RouterBoard 500 or IDT RC32434
|
||||
based system say Y. Otherwise say N.
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ config ARC_EMAC_CORE
|
|||
depends on ARC || ARCH_ROCKCHIP || COMPILE_TEST
|
||||
select MII
|
||||
select PHYLIB
|
||||
select CRC32
|
||||
|
||||
config ARC_EMAC
|
||||
tristate "ARC EMAC support"
|
||||
|
|
|
|||
|
|
@ -154,6 +154,8 @@ int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
|
|||
u32 in[MLX5_ST_SZ_DW(destroy_cq_in)] = {};
|
||||
int err;
|
||||
|
||||
mlx5_debug_cq_remove(dev, cq);
|
||||
|
||||
mlx5_eq_del_cq(mlx5_get_async_eq(dev), cq);
|
||||
mlx5_eq_del_cq(&cq->eq->core, cq);
|
||||
|
||||
|
|
@ -161,16 +163,13 @@ int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
|
|||
MLX5_SET(destroy_cq_in, in, cqn, cq->cqn);
|
||||
MLX5_SET(destroy_cq_in, in, uid, cq->uid);
|
||||
err = mlx5_cmd_exec_in(dev, destroy_cq, in);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
synchronize_irq(cq->irqn);
|
||||
|
||||
mlx5_debug_cq_remove(dev, cq);
|
||||
mlx5_cq_put(cq);
|
||||
wait_for_completion(&cq->free);
|
||||
|
||||
return 0;
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL(mlx5_core_destroy_cq);
|
||||
|
||||
|
|
|
|||
|
|
@ -3819,20 +3819,67 @@ static int set_feature_rx_all(struct net_device *netdev, bool enable)
|
|||
return mlx5_set_port_fcs(mdev, !enable);
|
||||
}
|
||||
|
||||
static int mlx5e_set_rx_port_ts(struct mlx5_core_dev *mdev, bool enable)
|
||||
{
|
||||
u32 in[MLX5_ST_SZ_DW(pcmr_reg)] = {};
|
||||
bool supported, curr_state;
|
||||
int err;
|
||||
|
||||
if (!MLX5_CAP_GEN(mdev, ports_check))
|
||||
return 0;
|
||||
|
||||
err = mlx5_query_ports_check(mdev, in, sizeof(in));
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
supported = MLX5_GET(pcmr_reg, in, rx_ts_over_crc_cap);
|
||||
curr_state = MLX5_GET(pcmr_reg, in, rx_ts_over_crc);
|
||||
|
||||
if (!supported || enable == curr_state)
|
||||
return 0;
|
||||
|
||||
MLX5_SET(pcmr_reg, in, local_port, 1);
|
||||
MLX5_SET(pcmr_reg, in, rx_ts_over_crc, enable);
|
||||
|
||||
return mlx5_set_ports_check(mdev, in, sizeof(in));
|
||||
}
|
||||
|
||||
static int set_feature_rx_fcs(struct net_device *netdev, bool enable)
|
||||
{
|
||||
struct mlx5e_priv *priv = netdev_priv(netdev);
|
||||
struct mlx5e_channels *chs = &priv->channels;
|
||||
struct mlx5_core_dev *mdev = priv->mdev;
|
||||
int err;
|
||||
|
||||
mutex_lock(&priv->state_lock);
|
||||
|
||||
priv->channels.params.scatter_fcs_en = enable;
|
||||
err = mlx5e_modify_channels_scatter_fcs(&priv->channels, enable);
|
||||
if (err)
|
||||
priv->channels.params.scatter_fcs_en = !enable;
|
||||
if (enable) {
|
||||
err = mlx5e_set_rx_port_ts(mdev, false);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
chs->params.scatter_fcs_en = true;
|
||||
err = mlx5e_modify_channels_scatter_fcs(chs, true);
|
||||
if (err) {
|
||||
chs->params.scatter_fcs_en = false;
|
||||
mlx5e_set_rx_port_ts(mdev, true);
|
||||
}
|
||||
} else {
|
||||
chs->params.scatter_fcs_en = false;
|
||||
err = mlx5e_modify_channels_scatter_fcs(chs, false);
|
||||
if (err) {
|
||||
chs->params.scatter_fcs_en = true;
|
||||
goto out;
|
||||
}
|
||||
err = mlx5e_set_rx_port_ts(mdev, true);
|
||||
if (err) {
|
||||
mlx5_core_warn(mdev, "Failed to set RX port timestamp %d\n", err);
|
||||
err = 0;
|
||||
}
|
||||
}
|
||||
|
||||
out:
|
||||
mutex_unlock(&priv->state_lock);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -25,16 +25,8 @@
|
|||
#define MLXSW_THERMAL_ZONE_MAX_NAME 16
|
||||
#define MLXSW_THERMAL_TEMP_SCORE_MAX GENMASK(31, 0)
|
||||
#define MLXSW_THERMAL_MAX_STATE 10
|
||||
#define MLXSW_THERMAL_MIN_STATE 2
|
||||
#define MLXSW_THERMAL_MAX_DUTY 255
|
||||
/* Minimum and maximum fan allowed speed in percent: from 20% to 100%. Values
|
||||
* MLXSW_THERMAL_MAX_STATE + x, where x is between 2 and 10 are used for
|
||||
* setting fan speed dynamic minimum. For example, if value is set to 14 (40%)
|
||||
* cooling levels vector will be set to 4, 4, 4, 4, 4, 5, 6, 7, 8, 9, 10 to
|
||||
* introduce PWM speed in percent: 40, 40, 40, 40, 40, 50, 60. 70, 80, 90, 100.
|
||||
*/
|
||||
#define MLXSW_THERMAL_SPEED_MIN (MLXSW_THERMAL_MAX_STATE + 2)
|
||||
#define MLXSW_THERMAL_SPEED_MAX (MLXSW_THERMAL_MAX_STATE * 2)
|
||||
#define MLXSW_THERMAL_SPEED_MIN_LEVEL 2 /* 20% */
|
||||
|
||||
/* External cooling devices, allowed for binding to mlxsw thermal zones. */
|
||||
static char * const mlxsw_thermal_external_allowed_cdev[] = {
|
||||
|
|
@ -635,49 +627,16 @@ static int mlxsw_thermal_set_cur_state(struct thermal_cooling_device *cdev,
|
|||
struct mlxsw_thermal *thermal = cdev->devdata;
|
||||
struct device *dev = thermal->bus_info->dev;
|
||||
char mfsc_pl[MLXSW_REG_MFSC_LEN];
|
||||
unsigned long cur_state, i;
|
||||
int idx;
|
||||
u8 duty;
|
||||
int err;
|
||||
|
||||
if (state > MLXSW_THERMAL_MAX_STATE)
|
||||
return -EINVAL;
|
||||
|
||||
idx = mlxsw_get_cooling_device_idx(thermal, cdev);
|
||||
if (idx < 0)
|
||||
return idx;
|
||||
|
||||
/* Verify if this request is for changing allowed fan dynamical
|
||||
* minimum. If it is - update cooling levels accordingly and update
|
||||
* state, if current state is below the newly requested minimum state.
|
||||
* For example, if current state is 5, and minimal state is to be
|
||||
* changed from 4 to 6, thermal->cooling_levels[0 to 5] will be changed
|
||||
* all from 4 to 6. And state 5 (thermal->cooling_levels[4]) should be
|
||||
* overwritten.
|
||||
*/
|
||||
if (state >= MLXSW_THERMAL_SPEED_MIN &&
|
||||
state <= MLXSW_THERMAL_SPEED_MAX) {
|
||||
state -= MLXSW_THERMAL_MAX_STATE;
|
||||
for (i = 0; i <= MLXSW_THERMAL_MAX_STATE; i++)
|
||||
thermal->cooling_levels[i] = max(state, i);
|
||||
|
||||
mlxsw_reg_mfsc_pack(mfsc_pl, idx, 0);
|
||||
err = mlxsw_reg_query(thermal->core, MLXSW_REG(mfsc), mfsc_pl);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
duty = mlxsw_reg_mfsc_pwm_duty_cycle_get(mfsc_pl);
|
||||
cur_state = mlxsw_duty_to_state(duty);
|
||||
|
||||
/* If current fan state is lower than requested dynamical
|
||||
* minimum, increase fan speed up to dynamical minimum.
|
||||
*/
|
||||
if (state < cur_state)
|
||||
return 0;
|
||||
|
||||
state = cur_state;
|
||||
}
|
||||
|
||||
if (state > MLXSW_THERMAL_MAX_STATE)
|
||||
return -EINVAL;
|
||||
|
||||
/* Normalize the state to the valid speed range. */
|
||||
state = thermal->cooling_levels[state];
|
||||
mlxsw_reg_mfsc_pack(mfsc_pl, idx, mlxsw_state_to_duty(state));
|
||||
|
|
@ -980,8 +939,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core,
|
|||
|
||||
/* Initialize cooling levels per PWM state. */
|
||||
for (i = 0; i < MLXSW_THERMAL_MAX_STATE; i++)
|
||||
thermal->cooling_levels[i] = max(MLXSW_THERMAL_SPEED_MIN_LEVEL,
|
||||
i);
|
||||
thermal->cooling_levels[i] = max(MLXSW_THERMAL_MIN_STATE, i);
|
||||
|
||||
thermal->polling_delay = bus_info->low_frequency ?
|
||||
MLXSW_THERMAL_SLOW_POLL_INT :
|
||||
|
|
|
|||
|
|
@ -497,13 +497,19 @@ static struct regmap_bus phymap_encx24j600 = {
|
|||
.reg_read = regmap_encx24j600_phy_reg_read,
|
||||
};
|
||||
|
||||
void devm_regmap_init_encx24j600(struct device *dev,
|
||||
struct encx24j600_context *ctx)
|
||||
int devm_regmap_init_encx24j600(struct device *dev,
|
||||
struct encx24j600_context *ctx)
|
||||
{
|
||||
mutex_init(&ctx->mutex);
|
||||
regcfg.lock_arg = ctx;
|
||||
ctx->regmap = devm_regmap_init(dev, ®map_encx24j600, ctx, ®cfg);
|
||||
if (IS_ERR(ctx->regmap))
|
||||
return PTR_ERR(ctx->regmap);
|
||||
ctx->phymap = devm_regmap_init(dev, &phymap_encx24j600, ctx, &phycfg);
|
||||
if (IS_ERR(ctx->phymap))
|
||||
return PTR_ERR(ctx->phymap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(devm_regmap_init_encx24j600);
|
||||
|
||||
|
|
|
|||
|
|
@ -1024,10 +1024,13 @@ static int encx24j600_spi_probe(struct spi_device *spi)
|
|||
priv->speed = SPEED_100;
|
||||
|
||||
priv->ctx.spi = spi;
|
||||
devm_regmap_init_encx24j600(&spi->dev, &priv->ctx);
|
||||
ndev->irq = spi->irq;
|
||||
ndev->netdev_ops = &encx24j600_netdev_ops;
|
||||
|
||||
ret = devm_regmap_init_encx24j600(&spi->dev, &priv->ctx);
|
||||
if (ret)
|
||||
goto out_free;
|
||||
|
||||
mutex_init(&priv->lock);
|
||||
|
||||
/* Reset device and check if it is connected */
|
||||
|
|
|
|||
|
|
@ -15,8 +15,8 @@ struct encx24j600_context {
|
|||
int bank;
|
||||
};
|
||||
|
||||
void devm_regmap_init_encx24j600(struct device *dev,
|
||||
struct encx24j600_context *ctx);
|
||||
int devm_regmap_init_encx24j600(struct device *dev,
|
||||
struct encx24j600_context *ctx);
|
||||
|
||||
/* Single-byte instructions */
|
||||
#define BANK_SELECT(bank) (0xC0 | ((bank & (BANK_MASK >> BANK_SHIFT)) << 1))
|
||||
|
|
|
|||
|
|
@ -594,12 +594,12 @@ void ocelot_get_txtstamp(struct ocelot *ocelot)
|
|||
|
||||
spin_unlock_irqrestore(&port->tx_skbs.lock, flags);
|
||||
|
||||
if (WARN_ON(!skb_match))
|
||||
continue;
|
||||
|
||||
/* Get the h/w timestamp */
|
||||
ocelot_get_hwtimestamp(ocelot, &ts);
|
||||
|
||||
if (unlikely(!skb_match))
|
||||
continue;
|
||||
|
||||
/* Set the timestamp into the skb */
|
||||
memset(&shhwtstamps, 0, sizeof(shhwtstamps));
|
||||
shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
|
||||
|
|
|
|||
|
|
@ -8555,7 +8555,7 @@ static void s2io_io_resume(struct pci_dev *pdev)
|
|||
return;
|
||||
}
|
||||
|
||||
if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
|
||||
if (do_s2io_prog_unicast(netdev, netdev->dev_addr) == FAILURE) {
|
||||
s2io_card_down(sp);
|
||||
pr_err("Can't restore mac addr after reset.\n");
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -830,10 +830,6 @@ static int nfp_flower_init(struct nfp_app *app)
|
|||
if (err)
|
||||
goto err_cleanup;
|
||||
|
||||
err = flow_indr_dev_register(nfp_flower_indr_setup_tc_cb, app);
|
||||
if (err)
|
||||
goto err_cleanup;
|
||||
|
||||
if (app_priv->flower_ext_feats & NFP_FL_FEATS_VF_RLIM)
|
||||
nfp_flower_qos_init(app);
|
||||
|
||||
|
|
@ -942,7 +938,20 @@ static int nfp_flower_start(struct nfp_app *app)
|
|||
return err;
|
||||
}
|
||||
|
||||
return nfp_tunnel_config_start(app);
|
||||
err = flow_indr_dev_register(nfp_flower_indr_setup_tc_cb, app);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = nfp_tunnel_config_start(app);
|
||||
if (err)
|
||||
goto err_tunnel_config;
|
||||
|
||||
return 0;
|
||||
|
||||
err_tunnel_config:
|
||||
flow_indr_dev_unregister(nfp_flower_indr_setup_tc_cb, app,
|
||||
nfp_flower_setup_indr_tc_release);
|
||||
return err;
|
||||
}
|
||||
|
||||
static void nfp_flower_stop(struct nfp_app *app)
|
||||
|
|
|
|||
|
|
@ -1096,6 +1096,10 @@ static int ionic_ndo_addr_add(struct net_device *netdev, const u8 *addr)
|
|||
|
||||
static int ionic_addr_del(struct net_device *netdev, const u8 *addr)
|
||||
{
|
||||
/* Don't delete our own address from the uc list */
|
||||
if (ether_addr_equal(addr, netdev->dev_addr))
|
||||
return 0;
|
||||
|
||||
return ionic_lif_addr(netdev_priv(netdev), addr, false, true);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1295,6 +1295,7 @@ static int qed_slowpath_start(struct qed_dev *cdev,
|
|||
} else {
|
||||
DP_NOTICE(cdev,
|
||||
"Failed to acquire PTT for aRFS\n");
|
||||
rc = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -218,11 +218,18 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr, u32 *reg_space)
|
|||
readl(ioaddr + DMA_BUS_MODE + i * 4);
|
||||
}
|
||||
|
||||
static void dwmac1000_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
static int dwmac1000_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
{
|
||||
u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE);
|
||||
|
||||
if (!hw_cap) {
|
||||
/* 0x00000000 is the value read on old hardware that does not
|
||||
* implement this register
|
||||
*/
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
dma_cap->mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
|
||||
dma_cap->mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
|
||||
dma_cap->half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
|
||||
|
|
@ -252,6 +259,8 @@ static void dwmac1000_get_hw_feature(void __iomem *ioaddr,
|
|||
dma_cap->number_tx_channel = (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
|
||||
/* Alternate (enhanced) DESC mode */
|
||||
dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt,
|
||||
|
|
|
|||
|
|
@ -337,8 +337,8 @@ static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode,
|
|||
writel(mtl_tx_op, ioaddr + MTL_CHAN_TX_OP_MODE(channel));
|
||||
}
|
||||
|
||||
static void dwmac4_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
static int dwmac4_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
{
|
||||
u32 hw_cap = readl(ioaddr + GMAC_HW_FEATURE0);
|
||||
|
||||
|
|
@ -425,6 +425,8 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr,
|
|||
dma_cap->frpbs = (hw_cap & GMAC_HW_FEAT_FRPBS) >> 11;
|
||||
dma_cap->frpsel = (hw_cap & GMAC_HW_FEAT_FRPSEL) >> 10;
|
||||
dma_cap->dvlan = (hw_cap & GMAC_HW_FEAT_DVLAN) >> 5;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Enable/disable TSO feature and set MSS */
|
||||
|
|
|
|||
|
|
@ -365,8 +365,8 @@ static int dwxgmac2_dma_interrupt(void __iomem *ioaddr,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void dwxgmac2_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap)
|
||||
{
|
||||
u32 hw_cap;
|
||||
|
||||
|
|
@ -439,6 +439,8 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr,
|
|||
dma_cap->frpes = (hw_cap & XGMAC_HWFEAT_FRPES) >> 11;
|
||||
dma_cap->frpbs = (hw_cap & XGMAC_HWFEAT_FRPPB) >> 9;
|
||||
dma_cap->frpsel = (hw_cap & XGMAC_HWFEAT_FRPSEL) >> 3;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dwxgmac2_rx_watchdog(void __iomem *ioaddr, u32 riwt, u32 nchan)
|
||||
|
|
|
|||
|
|
@ -203,8 +203,8 @@ struct stmmac_dma_ops {
|
|||
int (*dma_interrupt) (void __iomem *ioaddr,
|
||||
struct stmmac_extra_stats *x, u32 chan);
|
||||
/* If supported then get the optional core features */
|
||||
void (*get_hw_feature)(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap);
|
||||
int (*get_hw_feature)(void __iomem *ioaddr,
|
||||
struct dma_features *dma_cap);
|
||||
/* Program the HW RX Watchdog */
|
||||
void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt, u32 number_chan);
|
||||
void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len, u32 chan);
|
||||
|
|
@ -255,7 +255,7 @@ struct stmmac_dma_ops {
|
|||
#define stmmac_dma_interrupt_status(__priv, __args...) \
|
||||
stmmac_do_callback(__priv, dma, dma_interrupt, __args)
|
||||
#define stmmac_get_hw_feature(__priv, __args...) \
|
||||
stmmac_do_void_callback(__priv, dma, get_hw_feature, __args)
|
||||
stmmac_do_callback(__priv, dma, get_hw_feature, __args)
|
||||
#define stmmac_rx_watchdog(__priv, __args...) \
|
||||
stmmac_do_void_callback(__priv, dma, rx_watchdog, __args)
|
||||
#define stmmac_set_tx_ring_len(__priv, __args...) \
|
||||
|
|
|
|||
|
|
@ -99,6 +99,10 @@ config USB_RTL8150
|
|||
config USB_RTL8152
|
||||
tristate "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
|
||||
select MII
|
||||
select CRC32
|
||||
select CRYPTO
|
||||
select CRYPTO_HASH
|
||||
select CRYPTO_SHA256
|
||||
help
|
||||
This option adds support for Realtek RTL8152 based USB 2.0
|
||||
10/100 Ethernet adapters and RTL8153 based USB 3.0 10/100/1000
|
||||
|
|
|
|||
|
|
@ -1342,7 +1342,7 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
|
|||
|
||||
memset(&cmd, 0, sizeof(cmd));
|
||||
cmd.abort.opcode = nvme_admin_abort_cmd;
|
||||
cmd.abort.cid = req->tag;
|
||||
cmd.abort.cid = nvme_cid(req);
|
||||
cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
|
||||
|
||||
dev_warn(nvmeq->dev->ctrl.device,
|
||||
|
|
|
|||
|
|
@ -1229,7 +1229,8 @@ static void nvmem_shift_read_buffer_in_place(struct nvmem_cell *cell, void *buf)
|
|||
*p-- = 0;
|
||||
|
||||
/* clear msb bits if any leftover in the last byte */
|
||||
*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
|
||||
if (cell->nbits % BITS_PER_BYTE)
|
||||
*p &= GENMASK((cell->nbits % BITS_PER_BYTE) - 1, 0);
|
||||
}
|
||||
|
||||
static int __nvmem_cell_read(struct nvmem_device *nvmem,
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ mlxreg_io_get_reg(void *regmap, struct mlxreg_core_data *data, u32 in_val,
|
|||
if (ret)
|
||||
goto access_error;
|
||||
|
||||
*regval |= rol32(val, regsize * i);
|
||||
*regval |= rol32(val, regsize * i * 8);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -141,7 +141,7 @@ mlxreg_io_attr_store(struct device *dev, struct device_attribute *attr,
|
|||
return -EINVAL;
|
||||
|
||||
/* Convert buffer to input value. */
|
||||
ret = kstrtou32(buf, len, &input_val);
|
||||
ret = kstrtou32(buf, 0, &input_val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -232,7 +232,7 @@ static inline u32 ipc_data_readl(struct intel_scu_ipc_dev *scu, u32 offset)
|
|||
/* Wait till scu status is busy */
|
||||
static inline int busy_loop(struct intel_scu_ipc_dev *scu)
|
||||
{
|
||||
unsigned long end = jiffies + msecs_to_jiffies(IPC_TIMEOUT);
|
||||
unsigned long end = jiffies + IPC_TIMEOUT;
|
||||
|
||||
do {
|
||||
u32 status;
|
||||
|
|
|
|||
|
|
@ -1250,10 +1250,14 @@ static void bcm_qspi_hw_init(struct bcm_qspi *qspi)
|
|||
|
||||
static void bcm_qspi_hw_uninit(struct bcm_qspi *qspi)
|
||||
{
|
||||
u32 status = bcm_qspi_read(qspi, MSPI, MSPI_MSPI_STATUS);
|
||||
|
||||
bcm_qspi_write(qspi, MSPI, MSPI_SPCR2, 0);
|
||||
if (has_bspi(qspi))
|
||||
bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0);
|
||||
|
||||
/* clear interrupt */
|
||||
bcm_qspi_write(qspi, MSPI, MSPI_MSPI_STATUS, status & ~1);
|
||||
}
|
||||
|
||||
static const struct spi_controller_mem_ops bcm_qspi_mem_ops = {
|
||||
|
|
@ -1397,6 +1401,47 @@ int bcm_qspi_probe(struct platform_device *pdev,
|
|||
if (!qspi->dev_ids)
|
||||
return -ENOMEM;
|
||||
|
||||
/*
|
||||
* Some SoCs integrate spi controller (e.g., its interrupt bits)
|
||||
* in specific ways
|
||||
*/
|
||||
if (soc_intc) {
|
||||
qspi->soc_intc = soc_intc;
|
||||
soc_intc->bcm_qspi_int_set(soc_intc, MSPI_DONE, true);
|
||||
} else {
|
||||
qspi->soc_intc = NULL;
|
||||
}
|
||||
|
||||
if (qspi->clk) {
|
||||
ret = clk_prepare_enable(qspi->clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to prepare clock\n");
|
||||
goto qspi_probe_err;
|
||||
}
|
||||
qspi->base_clk = clk_get_rate(qspi->clk);
|
||||
} else {
|
||||
qspi->base_clk = MSPI_BASE_FREQ;
|
||||
}
|
||||
|
||||
if (data->has_mspi_rev) {
|
||||
rev = bcm_qspi_read(qspi, MSPI, MSPI_REV);
|
||||
/* some older revs do not have a MSPI_REV register */
|
||||
if ((rev & 0xff) == 0xff)
|
||||
rev = 0;
|
||||
}
|
||||
|
||||
qspi->mspi_maj_rev = (rev >> 4) & 0xf;
|
||||
qspi->mspi_min_rev = rev & 0xf;
|
||||
qspi->mspi_spcr3_sysclk = data->has_spcr3_sysclk;
|
||||
|
||||
qspi->max_speed_hz = qspi->base_clk / (bcm_qspi_spbr_min(qspi) * 2);
|
||||
|
||||
/*
|
||||
* On SW resets it is possible to have the mask still enabled
|
||||
* Need to disable the mask and clear the status while we init
|
||||
*/
|
||||
bcm_qspi_hw_uninit(qspi);
|
||||
|
||||
for (val = 0; val < num_irqs; val++) {
|
||||
irq = -1;
|
||||
name = qspi_irq_tab[val].irq_name;
|
||||
|
|
@ -1433,38 +1478,6 @@ int bcm_qspi_probe(struct platform_device *pdev,
|
|||
goto qspi_probe_err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Some SoCs integrate spi controller (e.g., its interrupt bits)
|
||||
* in specific ways
|
||||
*/
|
||||
if (soc_intc) {
|
||||
qspi->soc_intc = soc_intc;
|
||||
soc_intc->bcm_qspi_int_set(soc_intc, MSPI_DONE, true);
|
||||
} else {
|
||||
qspi->soc_intc = NULL;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(qspi->clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to prepare clock\n");
|
||||
goto qspi_probe_err;
|
||||
}
|
||||
|
||||
qspi->base_clk = clk_get_rate(qspi->clk);
|
||||
|
||||
if (data->has_mspi_rev) {
|
||||
rev = bcm_qspi_read(qspi, MSPI, MSPI_REV);
|
||||
/* some older revs do not have a MSPI_REV register */
|
||||
if ((rev & 0xff) == 0xff)
|
||||
rev = 0;
|
||||
}
|
||||
|
||||
qspi->mspi_maj_rev = (rev >> 4) & 0xf;
|
||||
qspi->mspi_min_rev = rev & 0xf;
|
||||
qspi->mspi_spcr3_sysclk = data->has_spcr3_sysclk;
|
||||
|
||||
qspi->max_speed_hz = qspi->base_clk / (bcm_qspi_spbr_min(qspi) * 2);
|
||||
|
||||
bcm_qspi_hw_init(qspi);
|
||||
init_completion(&qspi->mspi_done);
|
||||
init_completion(&qspi->bspi_done);
|
||||
|
|
|
|||
|
|
@ -585,6 +585,9 @@ static int optee_remove(struct platform_device *pdev)
|
|||
{
|
||||
struct optee *optee = platform_get_drvdata(pdev);
|
||||
|
||||
/* Unregister OP-TEE specific client devices on TEE bus */
|
||||
optee_unregister_devices();
|
||||
|
||||
/*
|
||||
* Ask OP-TEE to free all cached shared memory objects to decrease
|
||||
* reference counters and also avoid wild pointers in secure world
|
||||
|
|
|
|||
|
|
@ -53,6 +53,13 @@ static int get_devices(struct tee_context *ctx, u32 session,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void optee_release_device(struct device *dev)
|
||||
{
|
||||
struct tee_client_device *optee_device = to_tee_client_device(dev);
|
||||
|
||||
kfree(optee_device);
|
||||
}
|
||||
|
||||
static int optee_register_device(const uuid_t *device_uuid)
|
||||
{
|
||||
struct tee_client_device *optee_device = NULL;
|
||||
|
|
@ -63,6 +70,7 @@ static int optee_register_device(const uuid_t *device_uuid)
|
|||
return -ENOMEM;
|
||||
|
||||
optee_device->dev.bus = &tee_bus_type;
|
||||
optee_device->dev.release = optee_release_device;
|
||||
if (dev_set_name(&optee_device->dev, "optee-ta-%pUb", device_uuid)) {
|
||||
kfree(optee_device);
|
||||
return -ENOMEM;
|
||||
|
|
@ -154,3 +162,17 @@ int optee_enumerate_devices(u32 func)
|
|||
{
|
||||
return __optee_enumerate_devices(func);
|
||||
}
|
||||
|
||||
static int __optee_unregister_device(struct device *dev, void *data)
|
||||
{
|
||||
if (!strncmp(dev_name(dev), "optee-ta", strlen("optee-ta")))
|
||||
device_unregister(dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void optee_unregister_devices(void)
|
||||
{
|
||||
bus_for_each_dev(&tee_bus_type, NULL, NULL,
|
||||
__optee_unregister_device);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -184,6 +184,7 @@ void optee_fill_pages_list(u64 *dst, struct page **pages, int num_pages,
|
|||
#define PTA_CMD_GET_DEVICES 0x0
|
||||
#define PTA_CMD_GET_DEVICES_SUPP 0x1
|
||||
int optee_enumerate_devices(u32 func);
|
||||
void optee_unregister_devices(void);
|
||||
|
||||
/*
|
||||
* Small helpers
|
||||
|
|
|
|||
|
|
@ -408,40 +408,38 @@ static int xhci_dbc_tty_register_device(struct xhci_dbc *dbc)
|
|||
return -EBUSY;
|
||||
|
||||
xhci_dbc_tty_init_port(dbc, port);
|
||||
tty_dev = tty_port_register_device(&port->port,
|
||||
dbc_tty_driver, 0, NULL);
|
||||
if (IS_ERR(tty_dev)) {
|
||||
ret = PTR_ERR(tty_dev);
|
||||
goto register_fail;
|
||||
}
|
||||
|
||||
ret = kfifo_alloc(&port->write_fifo, DBC_WRITE_BUF_SIZE, GFP_KERNEL);
|
||||
if (ret)
|
||||
goto buf_alloc_fail;
|
||||
goto err_exit_port;
|
||||
|
||||
ret = xhci_dbc_alloc_requests(dbc, BULK_IN, &port->read_pool,
|
||||
dbc_read_complete);
|
||||
if (ret)
|
||||
goto request_fail;
|
||||
goto err_free_fifo;
|
||||
|
||||
ret = xhci_dbc_alloc_requests(dbc, BULK_OUT, &port->write_pool,
|
||||
dbc_write_complete);
|
||||
if (ret)
|
||||
goto request_fail;
|
||||
goto err_free_requests;
|
||||
|
||||
tty_dev = tty_port_register_device(&port->port,
|
||||
dbc_tty_driver, 0, NULL);
|
||||
if (IS_ERR(tty_dev)) {
|
||||
ret = PTR_ERR(tty_dev);
|
||||
goto err_free_requests;
|
||||
}
|
||||
|
||||
port->registered = true;
|
||||
|
||||
return 0;
|
||||
|
||||
request_fail:
|
||||
err_free_requests:
|
||||
xhci_dbc_free_requests(&port->read_pool);
|
||||
xhci_dbc_free_requests(&port->write_pool);
|
||||
err_free_fifo:
|
||||
kfifo_free(&port->write_fifo);
|
||||
|
||||
buf_alloc_fail:
|
||||
tty_unregister_device(dbc_tty_driver, 0);
|
||||
|
||||
register_fail:
|
||||
err_exit_port:
|
||||
xhci_dbc_tty_exit_port(port);
|
||||
|
||||
dev_err(dbc->dev, "can't register tty port, err %d\n", ret);
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
|
||||
#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
|
||||
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009 0x1009
|
||||
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 0x1100
|
||||
#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
|
||||
|
||||
#define PCI_VENDOR_ID_ETRON 0x1b6f
|
||||
|
|
@ -112,6 +113,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
|
|||
/* Look for vendor-specific quirks */
|
||||
if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
|
||||
(pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
|
||||
pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1100 ||
|
||||
pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
|
||||
if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
|
||||
pdev->revision == 0x0) {
|
||||
|
|
|
|||
|
|
@ -368,16 +368,22 @@ static void xhci_handle_stopped_cmd_ring(struct xhci_hcd *xhci,
|
|||
/* Must be called with xhci->lock held, releases and aquires lock back */
|
||||
static int xhci_abort_cmd_ring(struct xhci_hcd *xhci, unsigned long flags)
|
||||
{
|
||||
u64 temp_64;
|
||||
u32 temp_32;
|
||||
int ret;
|
||||
|
||||
xhci_dbg(xhci, "Abort command ring\n");
|
||||
|
||||
reinit_completion(&xhci->cmd_ring_stop_completion);
|
||||
|
||||
temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
|
||||
xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
|
||||
&xhci->op_regs->cmd_ring);
|
||||
/*
|
||||
* The control bits like command stop, abort are located in lower
|
||||
* dword of the command ring control register. Limit the write
|
||||
* to the lower dword to avoid corrupting the command ring pointer
|
||||
* in case if the command ring is stopped by the time upper dword
|
||||
* is written.
|
||||
*/
|
||||
temp_32 = readl(&xhci->op_regs->cmd_ring);
|
||||
writel(temp_32 | CMD_RING_ABORT, &xhci->op_regs->cmd_ring);
|
||||
|
||||
/* Section 4.6.1.2 of xHCI 1.0 spec says software should also time the
|
||||
* completion of the Command Abort operation. If CRR is not negated in 5
|
||||
|
|
|
|||
|
|
@ -3101,10 +3101,13 @@ static void xhci_endpoint_reset(struct usb_hcd *hcd,
|
|||
return;
|
||||
|
||||
/* Bail out if toggle is already being cleared by a endpoint reset */
|
||||
spin_lock_irqsave(&xhci->lock, flags);
|
||||
if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) {
|
||||
ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE;
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
return;
|
||||
}
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
/* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */
|
||||
if (usb_endpoint_xfer_control(&host_ep->desc) ||
|
||||
usb_endpoint_xfer_isoc(&host_ep->desc))
|
||||
|
|
@ -3202,8 +3205,10 @@ static void xhci_endpoint_reset(struct usb_hcd *hcd,
|
|||
xhci_free_command(xhci, cfg_cmd);
|
||||
cleanup:
|
||||
xhci_free_command(xhci, stop_cmd);
|
||||
spin_lock_irqsave(&xhci->lock, flags);
|
||||
if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE)
|
||||
ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE;
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
}
|
||||
|
||||
static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
|
||||
|
|
|
|||
|
|
@ -899,11 +899,13 @@ static int dsps_probe(struct platform_device *pdev)
|
|||
if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
|
||||
ret = dsps_setup_optional_vbus_irq(pdev, glue);
|
||||
if (ret)
|
||||
goto err;
|
||||
goto unregister_pdev;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
unregister_pdev:
|
||||
platform_device_unregister(glue->musb);
|
||||
err:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
iounmap(glue->usbss_base);
|
||||
|
|
|
|||
|
|
@ -246,11 +246,13 @@ static void option_instat_callback(struct urb *urb);
|
|||
/* These Quectel products use Quectel's vendor ID */
|
||||
#define QUECTEL_PRODUCT_EC21 0x0121
|
||||
#define QUECTEL_PRODUCT_EC25 0x0125
|
||||
#define QUECTEL_PRODUCT_EG91 0x0191
|
||||
#define QUECTEL_PRODUCT_EG95 0x0195
|
||||
#define QUECTEL_PRODUCT_BG96 0x0296
|
||||
#define QUECTEL_PRODUCT_EP06 0x0306
|
||||
#define QUECTEL_PRODUCT_EM12 0x0512
|
||||
#define QUECTEL_PRODUCT_RM500Q 0x0800
|
||||
#define QUECTEL_PRODUCT_EC200S_CN 0x6002
|
||||
#define QUECTEL_PRODUCT_EC200T 0x6026
|
||||
|
||||
#define CMOTECH_VENDOR_ID 0x16d8
|
||||
|
|
@ -1111,6 +1113,9 @@ static const struct usb_device_id option_ids[] = {
|
|||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC25, 0xff, 0xff, 0xff),
|
||||
.driver_info = NUMEP2 },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC25, 0xff, 0, 0) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG91, 0xff, 0xff, 0xff),
|
||||
.driver_info = NUMEP2 },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG91, 0xff, 0, 0) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0xff, 0xff),
|
||||
.driver_info = NUMEP2 },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) },
|
||||
|
|
@ -1128,6 +1133,7 @@ static const struct usb_device_id option_ids[] = {
|
|||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500Q, 0xff, 0, 0) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_RM500Q, 0xff, 0xff, 0x10),
|
||||
.driver_info = ZLP },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200S_CN, 0xff, 0, 0) },
|
||||
{ USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200T, 0xff, 0, 0) },
|
||||
|
||||
{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
|
||||
|
|
@ -1227,6 +1233,8 @@ static const struct usb_device_id option_ids[] = {
|
|||
.driver_info = NCTRL(0) | RSVD(1) | RSVD(2) },
|
||||
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1203, 0xff), /* Telit LE910Cx (RNDIS) */
|
||||
.driver_info = NCTRL(2) | RSVD(3) },
|
||||
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1204, 0xff), /* Telit LE910Cx (MBIM) */
|
||||
.driver_info = NCTRL(0) | RSVD(1) },
|
||||
{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE910_USBCFG4),
|
||||
.driver_info = NCTRL(0) | RSVD(1) | RSVD(2) | RSVD(3) },
|
||||
{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE920),
|
||||
|
|
|
|||
|
|
@ -165,6 +165,7 @@ static const struct usb_device_id id_table[] = {
|
|||
{DEVICE_SWI(0x1199, 0x907b)}, /* Sierra Wireless EM74xx */
|
||||
{DEVICE_SWI(0x1199, 0x9090)}, /* Sierra Wireless EM7565 QDL */
|
||||
{DEVICE_SWI(0x1199, 0x9091)}, /* Sierra Wireless EM7565 */
|
||||
{DEVICE_SWI(0x1199, 0x90d2)}, /* Sierra Wireless EM9191 QDL */
|
||||
{DEVICE_SWI(0x413c, 0x81a2)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */
|
||||
{DEVICE_SWI(0x413c, 0x81a3)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */
|
||||
{DEVICE_SWI(0x413c, 0x81a4)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */
|
||||
|
|
|
|||
|
|
@ -325,7 +325,7 @@ static long vhost_vdpa_set_config_call(struct vhost_vdpa *v, u32 __user *argp)
|
|||
struct eventfd_ctx *ctx;
|
||||
|
||||
cb.callback = vhost_vdpa_config_cb;
|
||||
cb.private = v->vdpa;
|
||||
cb.private = v;
|
||||
if (copy_from_user(&fd, argp, sizeof(fd)))
|
||||
return -EFAULT;
|
||||
|
||||
|
|
|
|||
|
|
@ -240,6 +240,17 @@ static int virtio_dev_probe(struct device *_d)
|
|||
driver_features_legacy = driver_features;
|
||||
}
|
||||
|
||||
/*
|
||||
* Some devices detect legacy solely via F_VERSION_1. Write
|
||||
* F_VERSION_1 to force LE config space accesses before FEATURES_OK for
|
||||
* these when needed.
|
||||
*/
|
||||
if (drv->validate && !virtio_legacy_is_little_endian()
|
||||
&& device_features & BIT_ULL(VIRTIO_F_VERSION_1)) {
|
||||
dev->features = BIT_ULL(VIRTIO_F_VERSION_1);
|
||||
dev->config->finalize_features(dev);
|
||||
}
|
||||
|
||||
if (device_features & (1ULL << VIRTIO_F_VERSION_1))
|
||||
dev->features = driver_features & device_features;
|
||||
else
|
||||
|
|
|
|||
|
|
@ -4715,6 +4715,7 @@ struct extent_buffer *btrfs_alloc_tree_block(struct btrfs_trans_handle *trans,
|
|||
out_free_delayed:
|
||||
btrfs_free_delayed_extent_op(extent_op);
|
||||
out_free_buf:
|
||||
btrfs_tree_unlock(buf);
|
||||
free_extent_buffer(buf);
|
||||
out_free_reserved:
|
||||
btrfs_free_reserved_extent(fs_info, ins.objectid, ins.offset, 0);
|
||||
|
|
|
|||
|
|
@ -710,8 +710,7 @@ int __btrfs_drop_extents(struct btrfs_trans_handle *trans,
|
|||
if (start >= inode->disk_i_size && !replace_extent)
|
||||
modify_tree = 0;
|
||||
|
||||
update_refs = (test_bit(BTRFS_ROOT_SHAREABLE, &root->state) ||
|
||||
root == fs_info->tree_root);
|
||||
update_refs = (root->root_key.objectid != BTRFS_TREE_LOG_OBJECTID);
|
||||
while (1) {
|
||||
recow = 0;
|
||||
ret = btrfs_lookup_file_extent(trans, root, path, ino,
|
||||
|
|
@ -2662,14 +2661,16 @@ int btrfs_replace_file_extents(struct inode *inode, struct btrfs_path *path,
|
|||
1, 0, 0, NULL);
|
||||
if (ret != -ENOSPC) {
|
||||
/*
|
||||
* When cloning we want to avoid transaction aborts when
|
||||
* nothing was done and we are attempting to clone parts
|
||||
* of inline extents, in such cases -EOPNOTSUPP is
|
||||
* returned by __btrfs_drop_extents() without having
|
||||
* changed anything in the file.
|
||||
* The only time we don't want to abort is if we are
|
||||
* attempting to clone a partial inline extent, in which
|
||||
* case we'll get EOPNOTSUPP. However if we aren't
|
||||
* clone we need to abort no matter what, because if we
|
||||
* got EOPNOTSUPP via prealloc then we messed up and
|
||||
* need to abort.
|
||||
*/
|
||||
if (extent_info && !extent_info->is_new_extent &&
|
||||
ret && ret != -EOPNOTSUPP)
|
||||
if (ret &&
|
||||
(ret != -EOPNOTSUPP ||
|
||||
(extent_info && extent_info->is_new_extent)))
|
||||
btrfs_abort_transaction(trans, ret);
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1137,7 +1137,10 @@ next:
|
|||
/* look for a conflicting sequence number */
|
||||
di = btrfs_lookup_dir_index_item(trans, root, path, btrfs_ino(dir),
|
||||
ref_index, name, namelen, 0);
|
||||
if (di && !IS_ERR(di)) {
|
||||
if (IS_ERR(di)) {
|
||||
if (PTR_ERR(di) != -ENOENT)
|
||||
return PTR_ERR(di);
|
||||
} else if (di) {
|
||||
ret = drop_one_dir_item(trans, root, path, dir, di);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -1147,7 +1150,9 @@ next:
|
|||
/* look for a conflicting name */
|
||||
di = btrfs_lookup_dir_item(trans, root, path, btrfs_ino(dir),
|
||||
name, namelen, 0);
|
||||
if (di && !IS_ERR(di)) {
|
||||
if (IS_ERR(di)) {
|
||||
return PTR_ERR(di);
|
||||
} else if (di) {
|
||||
ret = drop_one_dir_item(trans, root, path, dir, di);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -1897,8 +1902,8 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans,
|
|||
struct btrfs_key log_key;
|
||||
struct inode *dir;
|
||||
u8 log_type;
|
||||
int exists;
|
||||
int ret = 0;
|
||||
bool exists;
|
||||
int ret;
|
||||
bool update_size = (key->type == BTRFS_DIR_INDEX_KEY);
|
||||
bool name_added = false;
|
||||
|
||||
|
|
@ -1918,12 +1923,12 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans,
|
|||
name_len);
|
||||
|
||||
btrfs_dir_item_key_to_cpu(eb, di, &log_key);
|
||||
exists = btrfs_lookup_inode(trans, root, path, &log_key, 0);
|
||||
if (exists == 0)
|
||||
exists = 1;
|
||||
else
|
||||
exists = 0;
|
||||
ret = btrfs_lookup_inode(trans, root, path, &log_key, 0);
|
||||
btrfs_release_path(path);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
exists = (ret == 0);
|
||||
ret = 0;
|
||||
|
||||
if (key->type == BTRFS_DIR_ITEM_KEY) {
|
||||
dst_di = btrfs_lookup_dir_item(trans, root, path, key->objectid,
|
||||
|
|
@ -1938,7 +1943,14 @@ static noinline int replay_one_name(struct btrfs_trans_handle *trans,
|
|||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
if (IS_ERR_OR_NULL(dst_di)) {
|
||||
|
||||
if (dst_di == ERR_PTR(-ENOENT))
|
||||
dst_di = NULL;
|
||||
|
||||
if (IS_ERR(dst_di)) {
|
||||
ret = PTR_ERR(dst_di);
|
||||
goto out;
|
||||
} else if (!dst_di) {
|
||||
/* we need a sequence number to insert, so we only
|
||||
* do inserts for the BTRFS_DIR_INDEX_KEY types
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -9274,16 +9274,22 @@ struct mlx5_ifc_pcmr_reg_bits {
|
|||
u8 reserved_at_0[0x8];
|
||||
u8 local_port[0x8];
|
||||
u8 reserved_at_10[0x10];
|
||||
|
||||
u8 entropy_force_cap[0x1];
|
||||
u8 entropy_calc_cap[0x1];
|
||||
u8 entropy_gre_calc_cap[0x1];
|
||||
u8 reserved_at_23[0x1b];
|
||||
u8 reserved_at_23[0xf];
|
||||
u8 rx_ts_over_crc_cap[0x1];
|
||||
u8 reserved_at_33[0xb];
|
||||
u8 fcs_cap[0x1];
|
||||
u8 reserved_at_3f[0x1];
|
||||
|
||||
u8 entropy_force[0x1];
|
||||
u8 entropy_calc[0x1];
|
||||
u8 entropy_gre_calc[0x1];
|
||||
u8 reserved_at_43[0x1b];
|
||||
u8 reserved_at_43[0xf];
|
||||
u8 rx_ts_over_crc[0x1];
|
||||
u8 reserved_at_53[0xb];
|
||||
u8 fcs_chk[0x1];
|
||||
u8 reserved_at_5f[0x1];
|
||||
};
|
||||
|
|
|
|||
|
|
@ -60,6 +60,9 @@ int nfc_proto_register(const struct nfc_protocol *nfc_proto)
|
|||
proto_tab[nfc_proto->id] = nfc_proto;
|
||||
write_unlock(&proto_tab_lock);
|
||||
|
||||
if (rc)
|
||||
proto_unregister(nfc_proto->proto);
|
||||
|
||||
return rc;
|
||||
}
|
||||
EXPORT_SYMBOL(nfc_proto_register);
|
||||
|
|
|
|||
|
|
@ -277,6 +277,7 @@ int digital_tg_configure_hw(struct nfc_digital_dev *ddev, int type, int param)
|
|||
static int digital_tg_listen_mdaa(struct nfc_digital_dev *ddev, u8 rf_tech)
|
||||
{
|
||||
struct digital_tg_mdaa_params *params;
|
||||
int rc;
|
||||
|
||||
params = kzalloc(sizeof(*params), GFP_KERNEL);
|
||||
if (!params)
|
||||
|
|
@ -291,8 +292,12 @@ static int digital_tg_listen_mdaa(struct nfc_digital_dev *ddev, u8 rf_tech)
|
|||
get_random_bytes(params->nfcid2 + 2, NFC_NFCID2_MAXSIZE - 2);
|
||||
params->sc = DIGITAL_SENSF_FELICA_SC;
|
||||
|
||||
return digital_send_cmd(ddev, DIGITAL_CMD_TG_LISTEN_MDAA, NULL, params,
|
||||
500, digital_tg_recv_atr_req, NULL);
|
||||
rc = digital_send_cmd(ddev, DIGITAL_CMD_TG_LISTEN_MDAA, NULL, params,
|
||||
500, digital_tg_recv_atr_req, NULL);
|
||||
if (rc)
|
||||
kfree(params);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int digital_tg_listen_md(struct nfc_digital_dev *ddev, u8 rf_tech)
|
||||
|
|
|
|||
|
|
@ -465,8 +465,12 @@ static int digital_in_send_sdd_req(struct nfc_digital_dev *ddev,
|
|||
skb_put_u8(skb, sel_cmd);
|
||||
skb_put_u8(skb, DIGITAL_SDD_REQ_SEL_PAR);
|
||||
|
||||
return digital_in_send_cmd(ddev, skb, 30, digital_in_recv_sdd_res,
|
||||
target);
|
||||
rc = digital_in_send_cmd(ddev, skb, 30, digital_in_recv_sdd_res,
|
||||
target);
|
||||
if (rc)
|
||||
kfree_skb(skb);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void digital_in_recv_sens_res(struct nfc_digital_dev *ddev, void *arg,
|
||||
|
|
|
|||
|
|
@ -529,22 +529,28 @@ static int mqprio_dump_class_stats(struct Qdisc *sch, unsigned long cl,
|
|||
for (i = tc.offset; i < tc.offset + tc.count; i++) {
|
||||
struct netdev_queue *q = netdev_get_tx_queue(dev, i);
|
||||
struct Qdisc *qdisc = rtnl_dereference(q->qdisc);
|
||||
struct gnet_stats_basic_cpu __percpu *cpu_bstats = NULL;
|
||||
struct gnet_stats_queue __percpu *cpu_qstats = NULL;
|
||||
|
||||
spin_lock_bh(qdisc_lock(qdisc));
|
||||
if (qdisc_is_percpu_stats(qdisc)) {
|
||||
cpu_bstats = qdisc->cpu_bstats;
|
||||
cpu_qstats = qdisc->cpu_qstats;
|
||||
}
|
||||
|
||||
qlen = qdisc_qlen_sum(qdisc);
|
||||
__gnet_stats_copy_basic(NULL, &sch->bstats,
|
||||
cpu_bstats, &qdisc->bstats);
|
||||
__gnet_stats_copy_queue(&sch->qstats,
|
||||
cpu_qstats,
|
||||
&qdisc->qstats,
|
||||
qlen);
|
||||
if (qdisc_is_percpu_stats(qdisc)) {
|
||||
qlen = qdisc_qlen_sum(qdisc);
|
||||
|
||||
__gnet_stats_copy_basic(NULL, &bstats,
|
||||
qdisc->cpu_bstats,
|
||||
&qdisc->bstats);
|
||||
__gnet_stats_copy_queue(&qstats,
|
||||
qdisc->cpu_qstats,
|
||||
&qdisc->qstats,
|
||||
qlen);
|
||||
} else {
|
||||
qlen += qdisc->q.qlen;
|
||||
bstats.bytes += qdisc->bstats.bytes;
|
||||
bstats.packets += qdisc->bstats.packets;
|
||||
qstats.backlog += qdisc->qstats.backlog;
|
||||
qstats.drops += qdisc->qstats.drops;
|
||||
qstats.requeues += qdisc->qstats.requeues;
|
||||
qstats.overlimits += qdisc->qstats.overlimits;
|
||||
}
|
||||
spin_unlock_bh(qdisc_lock(qdisc));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -3651,7 +3651,7 @@ struct sctp_chunk *sctp_make_strreset_req(
|
|||
outlen = (sizeof(outreq) + stream_len) * out;
|
||||
inlen = (sizeof(inreq) + stream_len) * in;
|
||||
|
||||
retval = sctp_make_reconf(asoc, outlen + inlen);
|
||||
retval = sctp_make_reconf(asoc, SCTP_PAD4(outlen) + SCTP_PAD4(inlen));
|
||||
if (!retval)
|
||||
return NULL;
|
||||
|
||||
|
|
|
|||
|
|
@ -222,7 +222,7 @@ if ($arch =~ /(x86(_64)?)|(i386)/) {
|
|||
$local_regex = "^[0-9a-fA-F]+\\s+t\\s+(\\S+)";
|
||||
$weak_regex = "^[0-9a-fA-F]+\\s+([wW])\\s+(\\S+)";
|
||||
$section_regex = "Disassembly of section\\s+(\\S+):";
|
||||
$function_regex = "^([0-9a-fA-F]+)\\s+<(.*?)>:";
|
||||
$function_regex = "^([0-9a-fA-F]+)\\s+<([^^]*?)>:";
|
||||
$mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s(mcount|__fentry__)\$";
|
||||
$section_type = '@progbits';
|
||||
$mcount_adjust = 0;
|
||||
|
|
|
|||
|
|
@ -466,6 +466,76 @@ static int snd_pcm_ioctl_sync_ptr_x32(struct snd_pcm_substream *substream,
|
|||
}
|
||||
#endif /* CONFIG_X86_X32 */
|
||||
|
||||
#ifdef __BIG_ENDIAN
|
||||
typedef char __pad_before_u32[4];
|
||||
typedef char __pad_after_u32[0];
|
||||
#else
|
||||
typedef char __pad_before_u32[0];
|
||||
typedef char __pad_after_u32[4];
|
||||
#endif
|
||||
|
||||
/* PCM 2.0.15 API definition had a bug in mmap control; it puts the avail_min
|
||||
* at the wrong offset due to a typo in padding type.
|
||||
* The bug hits only 32bit.
|
||||
* A workaround for incorrect read/write is needed only in 32bit compat mode.
|
||||
*/
|
||||
struct __snd_pcm_mmap_control64_buggy {
|
||||
__pad_before_u32 __pad1;
|
||||
__u32 appl_ptr;
|
||||
__pad_before_u32 __pad2; /* SiC! here is the bug */
|
||||
__pad_before_u32 __pad3;
|
||||
__u32 avail_min;
|
||||
__pad_after_uframe __pad4;
|
||||
};
|
||||
|
||||
static int snd_pcm_ioctl_sync_ptr_buggy(struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_sync_ptr __user *_sync_ptr)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct snd_pcm_sync_ptr sync_ptr;
|
||||
struct __snd_pcm_mmap_control64_buggy *sync_cp;
|
||||
volatile struct snd_pcm_mmap_status *status;
|
||||
volatile struct snd_pcm_mmap_control *control;
|
||||
int err;
|
||||
|
||||
memset(&sync_ptr, 0, sizeof(sync_ptr));
|
||||
sync_cp = (struct __snd_pcm_mmap_control64_buggy *)&sync_ptr.c.control;
|
||||
if (get_user(sync_ptr.flags, (unsigned __user *)&(_sync_ptr->flags)))
|
||||
return -EFAULT;
|
||||
if (copy_from_user(sync_cp, &(_sync_ptr->c.control), sizeof(*sync_cp)))
|
||||
return -EFAULT;
|
||||
status = runtime->status;
|
||||
control = runtime->control;
|
||||
if (sync_ptr.flags & SNDRV_PCM_SYNC_PTR_HWSYNC) {
|
||||
err = snd_pcm_hwsync(substream);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
snd_pcm_stream_lock_irq(substream);
|
||||
if (!(sync_ptr.flags & SNDRV_PCM_SYNC_PTR_APPL)) {
|
||||
err = pcm_lib_apply_appl_ptr(substream, sync_cp->appl_ptr);
|
||||
if (err < 0) {
|
||||
snd_pcm_stream_unlock_irq(substream);
|
||||
return err;
|
||||
}
|
||||
} else {
|
||||
sync_cp->appl_ptr = control->appl_ptr;
|
||||
}
|
||||
if (!(sync_ptr.flags & SNDRV_PCM_SYNC_PTR_AVAIL_MIN))
|
||||
control->avail_min = sync_cp->avail_min;
|
||||
else
|
||||
sync_cp->avail_min = control->avail_min;
|
||||
sync_ptr.s.status.state = status->state;
|
||||
sync_ptr.s.status.hw_ptr = status->hw_ptr;
|
||||
sync_ptr.s.status.tstamp = status->tstamp;
|
||||
sync_ptr.s.status.suspended_state = status->suspended_state;
|
||||
sync_ptr.s.status.audio_tstamp = status->audio_tstamp;
|
||||
snd_pcm_stream_unlock_irq(substream);
|
||||
if (copy_to_user(_sync_ptr, &sync_ptr, sizeof(sync_ptr)))
|
||||
return -EFAULT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
*/
|
||||
enum {
|
||||
|
|
@ -535,7 +605,7 @@ static long snd_pcm_ioctl_compat(struct file *file, unsigned int cmd, unsigned l
|
|||
if (in_x32_syscall())
|
||||
return snd_pcm_ioctl_sync_ptr_x32(substream, argp);
|
||||
#endif /* CONFIG_X86_X32 */
|
||||
return snd_pcm_common_ioctl(file, substream, cmd, argp);
|
||||
return snd_pcm_ioctl_sync_ptr_buggy(substream, argp);
|
||||
case SNDRV_PCM_IOCTL_HW_REFINE32:
|
||||
return snd_pcm_ioctl_hw_params_compat(substream, 1, argp);
|
||||
case SNDRV_PCM_IOCTL_HW_PARAMS32:
|
||||
|
|
|
|||
|
|
@ -147,6 +147,8 @@ static int snd_seq_device_dev_free(struct snd_device *device)
|
|||
struct snd_seq_device *dev = device->device_data;
|
||||
|
||||
cancel_autoload_drivers();
|
||||
if (dev->private_free)
|
||||
dev->private_free(dev);
|
||||
put_device(&dev->dev);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -174,11 +176,7 @@ static int snd_seq_device_dev_disconnect(struct snd_device *device)
|
|||
|
||||
static void snd_seq_dev_release(struct device *dev)
|
||||
{
|
||||
struct snd_seq_device *sdev = to_seq_dev(dev);
|
||||
|
||||
if (sdev->private_free)
|
||||
sdev->private_free(sdev);
|
||||
kfree(sdev);
|
||||
kfree(to_seq_dev(dev));
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -527,6 +527,8 @@ static void alc_shutup_pins(struct hda_codec *codec)
|
|||
struct alc_spec *spec = codec->spec;
|
||||
|
||||
switch (codec->core.vendor_id) {
|
||||
case 0x10ec0236:
|
||||
case 0x10ec0256:
|
||||
case 0x10ec0283:
|
||||
case 0x10ec0286:
|
||||
case 0x10ec0288:
|
||||
|
|
@ -2549,7 +2551,8 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = {
|
|||
SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
|
||||
SND_PCI_QUIRK(0x1558, 0x67e5, "Clevo PC70D[PRS](?:-D|-G)?", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
|
||||
SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
|
||||
SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
|
||||
SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170SM", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
|
||||
SND_PCI_QUIRK(0x1558, 0x7715, "Clevo X170KM-G", ALC1220_FIXUP_CLEVO_PB51ED),
|
||||
SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950),
|
||||
SND_PCI_QUIRK(0x1558, 0x9506, "Clevo P955HQ", ALC1220_FIXUP_CLEVO_P950),
|
||||
SND_PCI_QUIRK(0x1558, 0x950a, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950),
|
||||
|
|
@ -3531,7 +3534,8 @@ static void alc256_shutup(struct hda_codec *codec)
|
|||
/* If disable 3k pulldown control for alc257, the Mic detection will not work correctly
|
||||
* when booting with headset plugged. So skip setting it for the codec alc257
|
||||
*/
|
||||
if (codec->core.vendor_id != 0x10ec0257)
|
||||
if (spec->codec_variant != ALC269_TYPE_ALC257 &&
|
||||
spec->codec_variant != ALC269_TYPE_ALC256)
|
||||
alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
|
||||
|
||||
if (!spec->no_shutup_pins)
|
||||
|
|
@ -6395,6 +6399,24 @@ static void alc287_fixup_legion_15imhg05_speakers(struct hda_codec *codec,
|
|||
/* for alc285_fixup_ideapad_s740_coef() */
|
||||
#include "ideapad_s740_helper.c"
|
||||
|
||||
static void alc256_fixup_tongfang_reset_persistent_settings(struct hda_codec *codec,
|
||||
const struct hda_fixup *fix,
|
||||
int action)
|
||||
{
|
||||
/*
|
||||
* A certain other OS sets these coeffs to different values. On at least one TongFang
|
||||
* barebone these settings might survive even a cold reboot. So to restore a clean slate the
|
||||
* values are explicitly reset to default here. Without this, the external microphone is
|
||||
* always in a plugged-in state, while the internal microphone is always in an unplugged
|
||||
* state, breaking the ability to use the internal microphone.
|
||||
*/
|
||||
alc_write_coef_idx(codec, 0x24, 0x0000);
|
||||
alc_write_coef_idx(codec, 0x26, 0x0000);
|
||||
alc_write_coef_idx(codec, 0x29, 0x3000);
|
||||
alc_write_coef_idx(codec, 0x37, 0xfe05);
|
||||
alc_write_coef_idx(codec, 0x45, 0x5089);
|
||||
}
|
||||
|
||||
enum {
|
||||
ALC269_FIXUP_GPIO2,
|
||||
ALC269_FIXUP_SONY_VAIO,
|
||||
|
|
@ -6608,7 +6630,8 @@ enum {
|
|||
ALC287_FIXUP_LEGION_15IMHG05_SPEAKERS,
|
||||
ALC287_FIXUP_LEGION_15IMHG05_AUTOMUTE,
|
||||
ALC287_FIXUP_YOGA7_14ITL_SPEAKERS,
|
||||
ALC287_FIXUP_13S_GEN2_SPEAKERS
|
||||
ALC287_FIXUP_13S_GEN2_SPEAKERS,
|
||||
ALC256_FIXUP_TONGFANG_RESET_PERSISTENT_SETTINGS,
|
||||
};
|
||||
|
||||
static const struct hda_fixup alc269_fixups[] = {
|
||||
|
|
@ -8283,7 +8306,7 @@ static const struct hda_fixup alc269_fixups[] = {
|
|||
.v.verbs = (const struct hda_verb[]) {
|
||||
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x24 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0x41 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0xb020 },
|
||||
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x26 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0x2 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0 },
|
||||
|
|
@ -8300,6 +8323,10 @@ static const struct hda_fixup alc269_fixups[] = {
|
|||
.chained = true,
|
||||
.chain_id = ALC269_FIXUP_HEADSET_MODE,
|
||||
},
|
||||
[ALC256_FIXUP_TONGFANG_RESET_PERSISTENT_SETTINGS] = {
|
||||
.type = HDA_FIXUP_FUNC,
|
||||
.v.func = alc256_fixup_tongfang_reset_persistent_settings,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
||||
|
|
@ -8391,6 +8418,9 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
|||
SND_PCI_QUIRK(0x1028, 0x0a30, "Dell", ALC236_FIXUP_DELL_AIO_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1028, 0x0a58, "Dell", ALC255_FIXUP_DELL_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1028, 0x0a61, "Dell XPS 15 9510", ALC289_FIXUP_DUAL_SPK),
|
||||
SND_PCI_QUIRK(0x1028, 0x0a62, "Dell Precision 5560", ALC289_FIXUP_DUAL_SPK),
|
||||
SND_PCI_QUIRK(0x1028, 0x0a9d, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1028, 0x0a9e, "Dell Latitude 5430", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),
|
||||
|
|
@ -8726,6 +8756,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
|||
SND_PCI_QUIRK(0x1b7d, 0xa831, "Ordissimo EVE2 ", ALC269VB_FIXUP_ORDISSIMO_EVE2), /* Also known as Malata PC-B1303 */
|
||||
SND_PCI_QUIRK(0x1c06, 0x2013, "Lemote A1802", ALC269_FIXUP_LEMOTE_A1802),
|
||||
SND_PCI_QUIRK(0x1c06, 0x2015, "Lemote A190X", ALC269_FIXUP_LEMOTE_A190X),
|
||||
SND_PCI_QUIRK(0x1d05, 0x1132, "TongFang PHxTxX1", ALC256_FIXUP_TONGFANG_RESET_PERSISTENT_SETTINGS),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC),
|
||||
|
|
@ -10098,6 +10129,9 @@ enum {
|
|||
ALC671_FIXUP_HP_HEADSET_MIC2,
|
||||
ALC662_FIXUP_ACER_X2660G_HEADSET_MODE,
|
||||
ALC662_FIXUP_ACER_NITRO_HEADSET_MODE,
|
||||
ALC668_FIXUP_ASUS_NO_HEADSET_MIC,
|
||||
ALC668_FIXUP_HEADSET_MIC,
|
||||
ALC668_FIXUP_MIC_DET_COEF,
|
||||
};
|
||||
|
||||
static const struct hda_fixup alc662_fixups[] = {
|
||||
|
|
@ -10481,6 +10515,29 @@ static const struct hda_fixup alc662_fixups[] = {
|
|||
.chained = true,
|
||||
.chain_id = ALC662_FIXUP_USI_FUNC
|
||||
},
|
||||
[ALC668_FIXUP_ASUS_NO_HEADSET_MIC] = {
|
||||
.type = HDA_FIXUP_PINS,
|
||||
.v.pins = (const struct hda_pintbl[]) {
|
||||
{ 0x1b, 0x04a1112c },
|
||||
{ }
|
||||
},
|
||||
.chained = true,
|
||||
.chain_id = ALC668_FIXUP_HEADSET_MIC
|
||||
},
|
||||
[ALC668_FIXUP_HEADSET_MIC] = {
|
||||
.type = HDA_FIXUP_FUNC,
|
||||
.v.func = alc269_fixup_headset_mic,
|
||||
.chained = true,
|
||||
.chain_id = ALC668_FIXUP_MIC_DET_COEF
|
||||
},
|
||||
[ALC668_FIXUP_MIC_DET_COEF] = {
|
||||
.type = HDA_FIXUP_VERBS,
|
||||
.v.verbs = (const struct hda_verb[]) {
|
||||
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x15 },
|
||||
{ 0x20, AC_VERB_SET_PROC_COEF, 0x0d60 },
|
||||
{}
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static const struct snd_pci_quirk alc662_fixup_tbl[] = {
|
||||
|
|
@ -10516,6 +10573,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = {
|
|||
SND_PCI_QUIRK(0x1043, 0x15a7, "ASUS UX51VZH", ALC662_FIXUP_BASS_16),
|
||||
SND_PCI_QUIRK(0x1043, 0x177d, "ASUS N551", ALC668_FIXUP_ASUS_Nx51),
|
||||
SND_PCI_QUIRK(0x1043, 0x17bd, "ASUS N751", ALC668_FIXUP_ASUS_Nx51),
|
||||
SND_PCI_QUIRK(0x1043, 0x185d, "ASUS G551JW", ALC668_FIXUP_ASUS_NO_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71SL", ALC662_FIXUP_ASUS_MODE8),
|
||||
SND_PCI_QUIRK(0x1043, 0x1b73, "ASUS N55SF", ALC662_FIXUP_BASS_16),
|
||||
SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_BASS_MODE4_CHMAP),
|
||||
|
|
|
|||
|
|
@ -77,6 +77,48 @@
|
|||
/* E-Mu 0204 USB */
|
||||
{ USB_DEVICE_VENDOR_SPEC(0x041e, 0x3f19) },
|
||||
|
||||
/*
|
||||
* Creative Technology, Ltd Live! Cam Sync HD [VF0770]
|
||||
* The device advertises 8 formats, but only a rate of 48kHz is honored by the
|
||||
* hardware and 24 bits give chopped audio, so only report the one working
|
||||
* combination.
|
||||
*/
|
||||
{
|
||||
USB_DEVICE(0x041e, 0x4095),
|
||||
.driver_info = (unsigned long) &(const struct snd_usb_audio_quirk) {
|
||||
.ifnum = QUIRK_ANY_INTERFACE,
|
||||
.type = QUIRK_COMPOSITE,
|
||||
.data = &(const struct snd_usb_audio_quirk[]) {
|
||||
{
|
||||
.ifnum = 2,
|
||||
.type = QUIRK_AUDIO_STANDARD_MIXER,
|
||||
},
|
||||
{
|
||||
.ifnum = 3,
|
||||
.type = QUIRK_AUDIO_FIXED_ENDPOINT,
|
||||
.data = &(const struct audioformat) {
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE,
|
||||
.channels = 2,
|
||||
.fmt_bits = 16,
|
||||
.iface = 3,
|
||||
.altsetting = 4,
|
||||
.altset_idx = 4,
|
||||
.endpoint = 0x82,
|
||||
.ep_attr = 0x05,
|
||||
.rates = SNDRV_PCM_RATE_48000,
|
||||
.rate_min = 48000,
|
||||
.rate_max = 48000,
|
||||
.nr_rates = 1,
|
||||
.rate_table = (unsigned int[]) { 48000 },
|
||||
},
|
||||
},
|
||||
{
|
||||
.ifnum = -1
|
||||
},
|
||||
},
|
||||
},
|
||||
},
|
||||
|
||||
/*
|
||||
* HP Wireless Audio
|
||||
* When not ignored, causes instability issues for some users, forcing them to
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue