diff --git a/drivers/video/rockchip/transmitter/rk32_dp.c b/drivers/video/rockchip/transmitter/rk32_dp.c
index f73e6191747d..a76b6d9d1aa1 100755
--- a/drivers/video/rockchip/transmitter/rk32_dp.c
+++ b/drivers/video/rockchip/transmitter/rk32_dp.c
@@ -21,7 +21,6 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/rockchip/cpu.h>
-#include <linux/rockchip/iomap.h>
 #include <linux/rockchip/grf.h>
 #include <linux/string.h>
 #include <linux/slab.h>
@@ -92,6 +91,7 @@ static int rk32_edp_pre_init(struct rk32_edp *edp)
 	u32 val;
 
 	if (cpu_is_rk3288()) {
+#if 0
 		val = GRF_EDP_REF_CLK_SEL_INTER |
 			(GRF_EDP_REF_CLK_SEL_INTER << 16);
 		writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_SOC_CON12);
@@ -104,6 +104,7 @@ static int rk32_edp_pre_init(struct rk32_edp *edp)
 		writel_relaxed(val, RK_CRU_VIRT + 0x01d0);
 		dsb(sy);
 		udelay(1);
+#endif
 	} else {
 		/* The rk3368 reset the edp 24M clock and apb bus
 		 * according to the CRU_SOFTRST6_CON and CRU_SOFTRST7_CON.
@@ -132,11 +133,13 @@ static int rk32_edp_init_edp(struct rk32_edp *edp)
 	rk_fb_get_prmry_screen(screen);
 
 	if (cpu_is_rk3288()) {
+#if 0
 		if (screen->lcdc_id == 1)  /*select lcdc*/
 			val = EDP_SEL_VOP_LIT | (EDP_SEL_VOP_LIT << 16);
 		else
 			val = EDP_SEL_VOP_LIT << 16;
 		writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_SOC_CON6);
+#endif
 	}
 
 	if (edp->soctype == SOC_RK3399) {
diff --git a/drivers/video/rockchip/transmitter/rk32_dp_reg.c b/drivers/video/rockchip/transmitter/rk32_dp_reg.c
index eb315a35d695..d72c3aa6e841 100644
--- a/drivers/video/rockchip/transmitter/rk32_dp_reg.c
+++ b/drivers/video/rockchip/transmitter/rk32_dp_reg.c
@@ -11,7 +11,6 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/rockchip/cpu.h>
-#include <linux/rockchip/iomap.h>
 #include <linux/rockchip/grf.h>
 #include "rk32_dp.h"
 
diff --git a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
index 741fdb5ee58e..2a313ffc0477 100644
--- a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
+++ b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
@@ -49,8 +49,6 @@
 #include <linux/dma-mapping.h>
 #include "mipi_dsi.h"
 #include "rk32_mipi_dsi.h"
-#include <linux/rockchip/iomap.h>
-#include <linux/rockchip/cpu.h>
 #include<linux/mfd/syscon.h>
 #include<linux/regmap.h>
 
@@ -1781,12 +1779,14 @@ static void rockchip_3399_grf_config(int lcdc_id)
 
 static void rk32_init_phy_mode(int lcdc_id)
 {
-	int val0 = 0, val1 = 0;
 
 	MIPI_DBG("rk32_init_phy_mode----------lcdc_id=%d\n", lcdc_id);
 
 	/* Only the rk3288 VOP need setting the VOP output. */
 	if (dsi0->ops.id == DSI_RK3288) {
+#if 0
+		int val0 = 0, val1 = 0;
+
 		/* D-PHY mode select */
 		if (rk_mipi_get_dsi_num() == 1) {
 			if (lcdc_id == 1)
@@ -1806,6 +1806,7 @@ static void rk32_init_phy_mode(int lcdc_id)
 			writel_relaxed(val0, RK_GRF_VIRT + RK3288_GRF_SOC_CON6);
 			writel_relaxed(val1, RK_GRF_VIRT + RK3288_GRF_SOC_CON14);
 		}
+#endif
 	} else if (dsi0->ops.id == DSI_RK3399) {
 		rockchip_3399_grf_config(lcdc_id);
 	}