PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space
commit7b067ac63aupstream. Some bits in PCI config space are reserved when device is PCIe. Properly define behavior of PCI registers for PCIe emulated bridge and ensure that it would not be possible change these reserved bits. Link: https://lore.kernel.org/r/20211124155944.1290-3-pali@kernel.org Fixes:23a5fba4d9("PCI: Introduce PCI bridge emulated config space common logic") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 21 additions and 0 deletions
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@ -295,6 +295,27 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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kfree(bridge->pci_regs_behavior);
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return -ENOMEM;
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}
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/* These bits are applicable only for PCI and reserved on PCIe */
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bridge->pci_regs_behavior[PCI_CACHE_LINE_SIZE / 4].ro &=
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~GENMASK(15, 8);
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bridge->pci_regs_behavior[PCI_COMMAND / 4].ro &=
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~((PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
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PCI_COMMAND_VGA_PALETTE | PCI_COMMAND_WAIT |
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PCI_COMMAND_FAST_BACK) |
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(PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
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PCI_STATUS_DEVSEL_MASK) << 16);
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bridge->pci_regs_behavior[PCI_PRIMARY_BUS / 4].ro &=
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~GENMASK(31, 24);
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bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro &=
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~((PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
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PCI_STATUS_DEVSEL_MASK) << 16);
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bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].rw &=
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~((PCI_BRIDGE_CTL_MASTER_ABORT |
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BIT(8) | BIT(9) | BIT(11)) << 16);
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bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].ro &=
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~((PCI_BRIDGE_CTL_FAST_BACK) << 16);
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bridge->pci_regs_behavior[PCI_INTERRUPT_LINE / 4].w1c &=
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~(BIT(10) << 16);
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}
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if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
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