2c3fb08b3f
The remaining drivers are mostly platform drivers. Name the dir to reflect it. It makes sense to latter break it into a few other dirs. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
117 lines
3 KiB
C
117 lines
3 KiB
C
/*
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* isph3a.h
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*
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* TI OMAP3 ISP - H3A AF module
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*
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* Copyright (C) 2010 Nokia Corporation
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* Copyright (C) 2009 Texas Instruments, Inc.
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*
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* Contacts: David Cohen <dacohen@gmail.com>
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* Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*/
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#ifndef OMAP3_ISP_H3A_H
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#define OMAP3_ISP_H3A_H
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#include <linux/omap3isp.h>
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/*
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* ----------
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* -H3A AEWB-
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* ----------
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*/
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#define AEWB_PACKET_SIZE 16
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#define AEWB_SATURATION_LIMIT 0x3ff
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/* Flags for changed registers */
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#define PCR_CHNG (1 << 0)
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#define AEWWIN1_CHNG (1 << 1)
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#define AEWINSTART_CHNG (1 << 2)
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#define AEWINBLK_CHNG (1 << 3)
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#define AEWSUBWIN_CHNG (1 << 4)
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#define PRV_WBDGAIN_CHNG (1 << 5)
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#define PRV_WBGAIN_CHNG (1 << 6)
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/* ISPH3A REGISTERS bits */
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#define ISPH3A_PCR_AF_EN (1 << 0)
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#define ISPH3A_PCR_AF_ALAW_EN (1 << 1)
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#define ISPH3A_PCR_AF_MED_EN (1 << 2)
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#define ISPH3A_PCR_AF_BUSY (1 << 15)
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#define ISPH3A_PCR_AEW_EN (1 << 16)
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#define ISPH3A_PCR_AEW_ALAW_EN (1 << 17)
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#define ISPH3A_PCR_AEW_BUSY (1 << 18)
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#define ISPH3A_PCR_AEW_MASK (ISPH3A_PCR_AEW_ALAW_EN | \
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ISPH3A_PCR_AEW_AVE2LMT_MASK)
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/*
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* --------
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* -H3A AF-
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* --------
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*/
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/* Peripheral Revision */
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#define AFPID 0x0
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#define AFCOEF_OFFSET 0x00000004 /* COEF base address */
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/* PCR fields */
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#define AF_BUSYAF (1 << 15)
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#define AF_FVMODE (1 << 14)
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#define AF_RGBPOS (0x7 << 11)
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#define AF_MED_TH (0xFF << 3)
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#define AF_MED_EN (1 << 2)
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#define AF_ALAW_EN (1 << 1)
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#define AF_EN (1 << 0)
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#define AF_PCR_MASK (AF_FVMODE | AF_RGBPOS | AF_MED_TH | \
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AF_MED_EN | AF_ALAW_EN)
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/* AFPAX1 fields */
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#define AF_PAXW (0x7F << 16)
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#define AF_PAXH 0x7F
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/* AFPAX2 fields */
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#define AF_AFINCV (0xF << 13)
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#define AF_PAXVC (0x7F << 6)
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#define AF_PAXHC 0x3F
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/* AFPAXSTART fields */
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#define AF_PAXSH (0xFFF<<16)
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#define AF_PAXSV 0xFFF
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/* COEFFICIENT MASK */
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#define AF_COEF_MASK0 0xFFF
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#define AF_COEF_MASK1 (0xFFF<<16)
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/* BIT SHIFTS */
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#define AF_RGBPOS_SHIFT 11
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#define AF_MED_TH_SHIFT 3
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#define AF_PAXW_SHIFT 16
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#define AF_LINE_INCR_SHIFT 13
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#define AF_VT_COUNT_SHIFT 6
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#define AF_HZ_START_SHIFT 16
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#define AF_COEF_SHIFT 16
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/* Init and cleanup functions */
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int omap3isp_h3a_aewb_init(struct isp_device *isp);
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int omap3isp_h3a_af_init(struct isp_device *isp);
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void omap3isp_h3a_aewb_cleanup(struct isp_device *isp);
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void omap3isp_h3a_af_cleanup(struct isp_device *isp);
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#endif /* OMAP3_ISP_H3A_H */
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