This patch merges all 68000 core cpus into one directory. There is a lot of common code in the 68328, 68EZ328 and 68VZ328 directories. This will also facilitate easy development of support for original stand alone MC68000 CPU machines. Signed-off-by: Luis Alves <ljalvs@gmail.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
		
			
				
	
	
		
			240 lines
		
	
	
	
		
			8.2 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			240 lines
		
	
	
	
		
			8.2 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/*
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 * head.S - Common startup code for 68000 core based CPU's
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 *
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 * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
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 *             68000 core based CPU's. Based on the sources from:
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 *             Coldfire by Greg Ungerer <gerg@snapgear.com>
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 *             68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
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 *                      Kenneth Albanowski <kjahds@kjahds.com>,
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 *                      The Silver Hammer Group, Ltd.
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 *
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 */
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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/*****************************************************************************
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 * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
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 *****************************************************************************/
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#ifdef CONFIG_MEMORY_RESERVE
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#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
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#else
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#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
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#endif
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/*****************************************************************************/
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.global _start
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.global _rambase
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.global _ramvec
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.global _ramstart
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.global _ramend
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#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
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.global bootlogo_bits
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#endif
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/* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
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/* #define DEBUG_HEAD_CODE */
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#undef DEBUG_HEAD_CODE
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.data
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/*****************************************************************************
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 * RAM setup pointers. Used by the kernel to determine RAM location and size.
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 *****************************************************************************/
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_rambase:
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	.long	0
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_ramvec:
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	.long	0
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_ramstart:
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	.long	0
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_ramend:
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	.long	0
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__HEAD
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/*****************************************************************************
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 * Entry point, where all begins!
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 *****************************************************************************/
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_start:
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/* Pilot need this specific signature at the start of ROM */
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#ifdef CONFIG_PILOT
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	.byte	0x4e, 0xfa, 0x00, 0x0a		/* bra opcode (jmp 10 bytes) */
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	.byte	'b', 'o', 'o', 't'
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	.word	10000
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	nop
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	moveq	#0, %d0
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	movew	%d0, 0xfffff618			/* Watchdog off */
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	movel	#0x00011f07, 0xfffff114		/* CS A1 Mask */
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#endif /* CONFIG_PILOT */
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	movew	#0x2700, %sr			/* disable all interrupts */
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/*****************************************************************************
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 * Setup PLL and wait for it to settle (in 68x328 cpu's).
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 * Also, if enabled, init serial port.
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 *****************************************************************************/
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#if defined(CONFIG_M68328) || \
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    defined(CONFIG_M68EZ328) || \
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    defined(CONFIG_M68VZ328)
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/* Serial port setup. Should only be needed if debugging this startup code. */
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#ifdef DEBUG_HEAD_CODE
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	movew	#0x0800, 0xfffff906		/* Ignore CTS */
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	movew	#0x010b, 0xfffff902		/* BAUD to 9600 */
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	movew	#0xe100, 0xfffff900		/* enable */
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#endif /* DEBUG_HEAD */
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#ifdef CONFIG_PILOT
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	movew	#0x2410, 0xfffff200		/* PLLCR */
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#else
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	movew	#0x2400, 0xfffff200		/* PLLCR */
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#endif
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	movew	#0x0123, 0xfffff202		/* PLLFSR */
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	moveq	#0, %d0
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	movew	#16384, %d0			/* PLL settle wait loop */
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_pll_settle:
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	subw	#1, %d0
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	bne	_pll_settle
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#endif /* CONFIG_M68x328 */
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/*****************************************************************************
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 * If running kernel from ROM some specific initialization has to be done.
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 * (Assuming that everything is already init'ed when running from RAM)
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 *****************************************************************************/
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#ifdef CONFIG_ROMKERNEL
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/*****************************************************************************
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 * Init chip registers (uCsimm specific)
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 *****************************************************************************/
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#ifdef CONFIG_UCSIMM
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	moveb	#0x00, 0xfffffb0b	/* Watchdog off */
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	moveb	#0x10, 0xfffff000	/* SCR */
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	moveb	#0x00, 0xfffff40b	/* enable chip select */
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	moveb	#0x00, 0xfffff423	/* enable /DWE */
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	moveb	#0x08, 0xfffffd0d	/* disable hardmap */
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	moveb	#0x07, 0xfffffd0e	/* level 7 interrupt clear */
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	movew	#0x8600, 0xfffff100	/* FLASH at 0x10c00000 */
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	movew	#0x018b, 0xfffff110	/* 2Meg, enable, 0ws */
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	movew	#0x8f00, 0xfffffc00	/* DRAM configuration */
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	movew	#0x9667, 0xfffffc02	/* DRAM control */
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	movew	#0x0000, 0xfffff106	/* DRAM at 0x00000000 */
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	movew	#0x068f, 0xfffff116	/* 8Meg, enable, 0ws */
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	moveb	#0x40, 0xfffff300	/* IVR */
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	movel	#0x007FFFFF, %d0	/* IMR */
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	movel	%d0, 0xfffff304
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	moveb	0xfffff42b, %d0
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	andb	#0xe0, %d0
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	moveb	%d0, 0xfffff42b
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#endif
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/*****************************************************************************
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 * Init LCD controller.
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 * (Assuming that LCD controller is already init'ed when running from RAM)
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 *****************************************************************************/
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#ifdef CONFIG_INIT_LCD
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#ifdef CONFIG_PILOT
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	moveb	#0, 0xfffffA27			/* LCKCON */
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	movel	#_start, 0xfffffA00		/* LSSA */
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	moveb	#0xa, 0xfffffA05		/* LVPW */
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	movew	#0x9f, 0xFFFFFa08		/* LXMAX */
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	movew	#0x9f, 0xFFFFFa0a		/* LYMAX */
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	moveb	#9, 0xfffffa29			/* LBAR */
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	moveb	#0, 0xfffffa25			/* LPXCD */
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	moveb	#0x04, 0xFFFFFa20		/* LPICF */
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	moveb	#0x58, 0xfffffA27		/* LCKCON */
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	moveb	#0x85, 0xfffff429		/* PFDATA */
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	moveb	#0xd8, 0xfffffA27		/* LCKCON */
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	moveb	#0xc5, 0xfffff429		/* PFDATA */
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	moveb	#0xd5, 0xfffff429		/* PFDATA */
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	movel	#bootlogo_bits, 0xFFFFFA00	/* LSSA */
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	moveb	#10, 0xFFFFFA05			/* LVPW */
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	movew	#160, 0xFFFFFA08		/* LXMAX */
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	movew	#160, 0xFFFFFA0A		/* LYMAX */
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#else /* CONFIG_PILOT */
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	movel	#bootlogo_bits, 0xfffffA00	/* LSSA */
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	moveb	#0x28, 0xfffffA05		/* LVPW */
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	movew	#0x280, 0xFFFFFa08		/* LXMAX */
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	movew	#0x1df, 0xFFFFFa0a		/* LYMAX */
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	moveb	#0, 0xfffffa29			/* LBAR */
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	moveb	#0, 0xfffffa25			/* LPXCD */
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	moveb	#0x08, 0xFFFFFa20		/* LPICF */
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	moveb	#0x01, 0xFFFFFA21		/* -ve pol */
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	moveb	#0x81, 0xfffffA27		/* LCKCON */
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	movew	#0xff00, 0xfffff412		/* LCD pins */
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#endif /* CONFIG_PILOT */
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#endif /* CONFIG_INIT_LCD */
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/*****************************************************************************
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 * Kernel is running from FLASH/ROM (XIP)
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 * Copy init text & data to RAM
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 *****************************************************************************/
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	moveal	#_etext, %a0
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	moveal	#_sdata, %a1
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	moveal	#__bss_start, %a2
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_copy_initmem:
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	movel	%a0@+, %a1@+
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	cmpal	%a1, %a2
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	bhi	_copy_initmem
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#endif /* CONFIG_ROMKERNEL */
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/*****************************************************************************
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 * Setup basic memory information for kernel
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 *****************************************************************************/
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	movel	#CONFIG_VECTORBASE,_ramvec	/* set vector base location */
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	movel	#CONFIG_RAMBASE,_rambase	/* set the base of RAM */
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	movel	#RAMEND, _ramend		/* set end ram addr */
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	lea	__bss_stop,%a1
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	movel	%a1,_ramstart
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/*****************************************************************************
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 * If the kernel is in RAM, move romfs to right above bss and
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 * adjust _ramstart to where romfs ends.
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 *
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 * (Do this only if CONFIG_MTD_UCLINUX is true)
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 *****************************************************************************/
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#if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
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    defined(CONFIG_MTD_UCLINUX)
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	lea	__bss_start, %a0		/* get start of bss */
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	lea	__bss_stop, %a1			/* set up destination  */
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	movel	%a0, %a2			/* copy of bss start */
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	movel	8(%a0), %d0			/* get size of ROMFS */
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	addql	#8, %d0				/* allow for rounding */
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	andl	#0xfffffffc, %d0		/* whole words */
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	addl	%d0, %a0			/* copy from end */
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	addl	%d0, %a1			/* copy from end */
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	movel	%a1, _ramstart			/* set start of ram */
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_copy_romfs:
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	movel	-(%a0), -(%a1)			/* copy dword */
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	cmpl	%a0, %a2			/* check if at end */
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	bne	_copy_romfs
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#endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
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/*****************************************************************************
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 * Clear bss region
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 *****************************************************************************/
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	lea	__bss_start, %a0		/* get start of bss */
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	lea	__bss_stop, %a1			/* get end of bss */
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_clear_bss:
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	movel	#0, (%a0)+			/* clear each word */
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	cmpl	%a0, %a1			/* check if at end */
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	bne	_clear_bss
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/*****************************************************************************
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 * Load the current task pointer and stack.
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 *****************************************************************************/
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	lea	init_thread_union,%a0
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	lea	THREAD_SIZE(%a0),%sp
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	jsr	start_kernel			/* start Linux kernel */
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_exit:
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	jmp	_exit				/* should never get here */
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