a8de5ce989
Spelling fixes in arch/ppc/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mackerras <paulus@samba.org>
95 lines
3.1 KiB
C
95 lines
3.1 KiB
C
/*
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* arch/ppc/platforms/prpmc750.h
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*
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* Definitions for Motorola PrPMC750 board support
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*
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* Author: Matt Porter <mporter@mvista.com>
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*
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* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_PRPMC750_H__
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#define __ASM_PRPMC750_H__
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/*
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* Due to limitations imposed by legacy hardware (primarily IDE controllers),
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* the PrPMC750 carrier board operates using a PReP address map.
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*
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* From Processor (physical) -> PCI:
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* PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB)
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* PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB)
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* Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
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*
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* From PCI -> Processor (physical):
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* System Memory: 0x80000000 -> 0x00000000
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*/
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#define PRPMC750_ISA_IO_BASE PREP_ISA_IO_BASE
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#define PRPMC750_ISA_MEM_BASE PREP_ISA_MEM_BASE
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/* PCI Memory space mapping info */
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#define PRPMC750_PCI_MEM_SIZE 0x30000000U
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#define PRPMC750_PROC_PCI_MEM_START PRPMC750_ISA_MEM_BASE
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#define PRPMC750_PROC_PCI_MEM_END (PRPMC750_PROC_PCI_MEM_START + \
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PRPMC750_PCI_MEM_SIZE - 1)
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#define PRPMC750_PCI_MEM_START 0x00000000U
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#define PRPMC750_PCI_MEM_END (PRPMC750_PCI_MEM_START + \
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PRPMC750_PCI_MEM_SIZE - 1)
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/* PCI I/O space mapping info */
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#define PRPMC750_PCI_IO_SIZE 0x10000000U
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#define PRPMC750_PROC_PCI_IO_START PRPMC750_ISA_IO_BASE
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#define PRPMC750_PROC_PCI_IO_END (PRPMC750_PROC_PCI_IO_START + \
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PRPMC750_PCI_IO_SIZE - 1)
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#define PRPMC750_PCI_IO_START 0x00000000U
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#define PRPMC750_PCI_IO_END (PRPMC750_PCI_IO_START + \
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PRPMC750_PCI_IO_SIZE - 1)
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/* System memory mapping info */
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#define PRPMC750_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
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#define PRPMC750_PCI_PHY_MEM_OFFSET (PRPMC750_ISA_MEM_BASE-PRPMC750_PCI_MEM_START)
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/* Register address definitions */
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#define PRPMC750_HAWK_SMC_BASE 0xfef80000U
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#define PRPMC750_HAWK_PPC_REG_BASE 0xfeff0000U
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#define PRPMC750_BASE_BAUD 1843200
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#define PRPMC750_SERIAL_0 0xfef88000
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#define PRPMC750_SERIAL_0_DLL (PRPMC750_SERIAL_0 + (UART_DLL << 4))
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#define PRPMC750_SERIAL_0_DLM (PRPMC750_SERIAL_0 + (UART_DLM << 4))
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#define PRPMC750_SERIAL_0_LCR (PRPMC750_SERIAL_0 + (UART_LCR << 4))
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#define PRPMC750_STATUS_REG 0xfef88080
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#define PRPMC750_BAUDOUT_MASK 0x02
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#define PRPMC750_MONARCH_MASK 0x01
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#define PRPMC750_MODRST_REG 0xfef880a0
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#define PRPMC750_MODRST_MASK 0x01
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#define PRPMC750_PIRQ_REG 0xfef880b0
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#define PRPMC750_SEL1_MASK 0x02
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#define PRPMC750_SEL0_MASK 0x01
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#define PRPMC750_TBEN_REG 0xfef880c0
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#define PRPMC750_TBEN_MASK 0x01
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/* UART Defines. */
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#define RS_TABLE_SIZE 4
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/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
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#define BASE_BAUD (PRPMC750_BASE_BAUD / 16)
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#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
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#define SERIAL_PORT_DFNS \
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{ 0, BASE_BAUD, PRPMC750_SERIAL_0, 1, STD_COM_FLAGS, \
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iomem_base: (unsigned char *)PRPMC750_SERIAL_0, \
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iomem_reg_shift: 4, \
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io_type: SERIAL_IO_MEM } /* ttyS0 */
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#endif /* __ASM_PRPMC750_H__ */
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#endif /* __KERNEL__ */
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