 84f3fb7a2a
			
		
	
	
	84f3fb7a2a
	
	
	
		
			
			The traditional 68000 processors and the newer reduced instruction set ColdFire processors do not support the 32*32->64 multiply or the 64/32->32 divide instructions. This is not a difference based on the presence of a hardware MMU or not. Create a new config symbol to mark that a CPU type doesn't support the longer multiply/divide instructions. Use this then as a basis for using the fast 64bit based divide (in div64.h) and for linking in the extra libgcc functions that may be required (mulsi3, divsi3, etc). Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
		
			
				
	
	
		
			34 lines
		
	
	
	
		
			760 B
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			34 lines
		
	
	
	
		
			760 B
			
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _M68K_DIV64_H
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| #define _M68K_DIV64_H
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| 
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| #ifdef CONFIG_CPU_HAS_NO_MULDIV64
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| #include <asm-generic/div64.h>
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| #else
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| 
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| #include <linux/types.h>
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| 
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| /* n = n / base; return rem; */
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| 
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| #define do_div(n, base) ({					\
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| 	union {							\
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| 		unsigned long n32[2];				\
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| 		unsigned long long n64;				\
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| 	} __n;							\
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| 	unsigned long __rem, __upper;				\
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| 								\
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| 	__n.n64 = (n);						\
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| 	if ((__upper = __n.n32[0])) {				\
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| 		asm ("divul.l %2,%1:%0"				\
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| 			: "=d" (__n.n32[0]), "=d" (__upper)	\
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| 			: "d" (base), "0" (__n.n32[0]));	\
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| 	}							\
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| 	asm ("divu.l %2,%1:%0"					\
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| 		: "=d" (__n.n32[1]), "=d" (__rem)		\
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| 		: "d" (base), "1" (__upper), "0" (__n.n32[1]));	\
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| 	(n) = __n.n64;						\
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| 	__rem;							\
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| })
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| 
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| #endif /* CONFIG_CPU_HAS_NO_MULDIV64 */
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| 
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| #endif /* _M68K_DIV64_H */
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