The software division functions never had unwinding annotations added. Currently, when a division by zero occurs the backtrace shown will stop at Ldiv0 or some completely unrelated function. Add unwinding annotations in hopes of getting a more useful backtrace when a division by zero occurs. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
		
			
				
	
	
		
			363 lines
		
	
	
	
		
			8 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			363 lines
		
	
	
	
		
			8 KiB
			
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/*
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 * linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
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 *
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 * Author: Nicolas Pitre <nico@fluxnic.net>
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 *   - contributed to gcc-3.4 on Sep 30, 2003
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 *   - adapted for the Linux kernel on Oct 2, 2003
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 */
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/* Copyright 1995, 1996, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file into combinations with other programs,
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and to distribute those combinations without any restriction coming
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from the use of this file.  (The General Public License restrictions
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do apply in other respects; for example, they cover modification of
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the file, and distribution when not linked into a combine
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executable.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING.  If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA.  */
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/unwind.h>
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.macro ARM_DIV_BODY dividend, divisor, result, curbit
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#if __LINUX_ARM_ARCH__ >= 5
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	clz	\curbit, \divisor
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	clz	\result, \dividend
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	sub	\result, \curbit, \result
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	mov	\curbit, #1
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	mov	\divisor, \divisor, lsl \result
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	mov	\curbit, \curbit, lsl \result
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	mov	\result, #0
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#else
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	@ Initially shift the divisor left 3 bits if possible,
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	@ set curbit accordingly.  This allows for curbit to be located
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	@ at the left end of each 4 bit nibbles in the division loop
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	@ to save one loop in most cases.
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	tst	\divisor, #0xe0000000
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	moveq	\divisor, \divisor, lsl #3
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	moveq	\curbit, #8
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	movne	\curbit, #1
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	@ Unless the divisor is very big, shift it up in multiples of
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	@ four bits, since this is the amount of unwinding in the main
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	@ division loop.  Continue shifting until the divisor is 
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	@ larger than the dividend.
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1:	cmp	\divisor, #0x10000000
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	cmplo	\divisor, \dividend
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	movlo	\divisor, \divisor, lsl #4
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	movlo	\curbit, \curbit, lsl #4
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	blo	1b
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	@ For very big divisors, we must shift it a bit at a time, or
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	@ we will be in danger of overflowing.
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1:	cmp	\divisor, #0x80000000
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	cmplo	\divisor, \dividend
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	movlo	\divisor, \divisor, lsl #1
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	movlo	\curbit, \curbit, lsl #1
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	blo	1b
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	mov	\result, #0
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#endif
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	@ Division loop
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1:	cmp	\dividend, \divisor
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	subhs	\dividend, \dividend, \divisor
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	orrhs	\result,   \result,   \curbit
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	cmp	\dividend, \divisor,  lsr #1
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	subhs	\dividend, \dividend, \divisor, lsr #1
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	orrhs	\result,   \result,   \curbit,  lsr #1
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	cmp	\dividend, \divisor,  lsr #2
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	subhs	\dividend, \dividend, \divisor, lsr #2
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	orrhs	\result,   \result,   \curbit,  lsr #2
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	cmp	\dividend, \divisor,  lsr #3
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	subhs	\dividend, \dividend, \divisor, lsr #3
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	orrhs	\result,   \result,   \curbit,  lsr #3
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	cmp	\dividend, #0			@ Early termination?
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	movnes	\curbit,   \curbit,  lsr #4	@ No, any more bits to do?
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	movne	\divisor,  \divisor, lsr #4
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	bne	1b
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.endm
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.macro ARM_DIV2_ORDER divisor, order
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#if __LINUX_ARM_ARCH__ >= 5
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	clz	\order, \divisor
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	rsb	\order, \order, #31
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#else
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	cmp	\divisor, #(1 << 16)
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	movhs	\divisor, \divisor, lsr #16
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	movhs	\order, #16
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	movlo	\order, #0
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	cmp	\divisor, #(1 << 8)
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	movhs	\divisor, \divisor, lsr #8
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	addhs	\order, \order, #8
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	cmp	\divisor, #(1 << 4)
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	movhs	\divisor, \divisor, lsr #4
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	addhs	\order, \order, #4
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	cmp	\divisor, #(1 << 2)
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	addhi	\order, \order, #3
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	addls	\order, \order, \divisor, lsr #1
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#endif
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.endm
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.macro ARM_MOD_BODY dividend, divisor, order, spare
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#if __LINUX_ARM_ARCH__ >= 5
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	clz	\order, \divisor
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	clz	\spare, \dividend
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	sub	\order, \order, \spare
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	mov	\divisor, \divisor, lsl \order
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#else
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	mov	\order, #0
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	@ Unless the divisor is very big, shift it up in multiples of
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	@ four bits, since this is the amount of unwinding in the main
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	@ division loop.  Continue shifting until the divisor is 
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	@ larger than the dividend.
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1:	cmp	\divisor, #0x10000000
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	cmplo	\divisor, \dividend
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	movlo	\divisor, \divisor, lsl #4
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	addlo	\order, \order, #4
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	blo	1b
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	@ For very big divisors, we must shift it a bit at a time, or
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	@ we will be in danger of overflowing.
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1:	cmp	\divisor, #0x80000000
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	cmplo	\divisor, \dividend
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	movlo	\divisor, \divisor, lsl #1
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	addlo	\order, \order, #1
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	blo	1b
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#endif
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	@ Perform all needed substractions to keep only the reminder.
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	@ Do comparisons in batch of 4 first.
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	subs	\order, \order, #3		@ yes, 3 is intended here
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	blt	2f
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1:	cmp	\dividend, \divisor
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	subhs	\dividend, \dividend, \divisor
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	cmp	\dividend, \divisor,  lsr #1
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	subhs	\dividend, \dividend, \divisor, lsr #1
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	cmp	\dividend, \divisor,  lsr #2
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	subhs	\dividend, \dividend, \divisor, lsr #2
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	cmp	\dividend, \divisor,  lsr #3
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	subhs	\dividend, \dividend, \divisor, lsr #3
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	cmp	\dividend, #1
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	mov	\divisor, \divisor, lsr #4
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	subges	\order, \order, #4
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	bge	1b
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	tst	\order, #3
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	teqne	\dividend, #0
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	beq	5f
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	@ Either 1, 2 or 3 comparison/substractions are left.
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2:	cmn	\order, #2
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	blt	4f
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	beq	3f
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	cmp	\dividend, \divisor
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	subhs	\dividend, \dividend, \divisor
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	mov	\divisor,  \divisor,  lsr #1
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3:	cmp	\dividend, \divisor
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	subhs	\dividend, \dividend, \divisor
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	mov	\divisor,  \divisor,  lsr #1
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4:	cmp	\dividend, \divisor
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	subhs	\dividend, \dividend, \divisor
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5:
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.endm
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ENTRY(__udivsi3)
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ENTRY(__aeabi_uidiv)
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UNWIND(.fnstart)
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	subs	r2, r1, #1
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	moveq	pc, lr
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	bcc	Ldiv0
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	cmp	r0, r1
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	bls	11f
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	tst	r1, r2
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	beq	12f
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	ARM_DIV_BODY r0, r1, r2, r3
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	mov	r0, r2
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	mov	pc, lr
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11:	moveq	r0, #1
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	movne	r0, #0
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	mov	pc, lr
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12:	ARM_DIV2_ORDER r1, r2
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	mov	r0, r0, lsr r2
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__udivsi3)
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ENDPROC(__aeabi_uidiv)
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ENTRY(__umodsi3)
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UNWIND(.fnstart)
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	subs	r2, r1, #1			@ compare divisor with 1
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	bcc	Ldiv0
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	cmpne	r0, r1				@ compare dividend with divisor
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	moveq   r0, #0
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	tsthi	r1, r2				@ see if divisor is power of 2
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	andeq	r0, r0, r2
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	movls	pc, lr
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	ARM_MOD_BODY r0, r1, r2, r3
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__umodsi3)
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ENTRY(__divsi3)
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ENTRY(__aeabi_idiv)
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UNWIND(.fnstart)
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	cmp	r1, #0
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	eor	ip, r0, r1			@ save the sign of the result.
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	beq	Ldiv0
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	rsbmi	r1, r1, #0			@ loops below use unsigned.
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	subs	r2, r1, #1			@ division by 1 or -1 ?
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	beq	10f
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	movs	r3, r0
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	rsbmi	r3, r0, #0			@ positive dividend value
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	cmp	r3, r1
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	bls	11f
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	tst	r1, r2				@ divisor is power of 2 ?
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	beq	12f
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	ARM_DIV_BODY r3, r1, r0, r2
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	cmp	ip, #0
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	rsbmi	r0, r0, #0
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	mov	pc, lr
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10:	teq	ip, r0				@ same sign ?
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	rsbmi	r0, r0, #0
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	mov	pc, lr
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11:	movlo	r0, #0
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	moveq	r0, ip, asr #31
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	orreq	r0, r0, #1
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	mov	pc, lr
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12:	ARM_DIV2_ORDER r1, r2
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	cmp	ip, #0
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	mov	r0, r3, lsr r2
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	rsbmi	r0, r0, #0
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__divsi3)
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ENDPROC(__aeabi_idiv)
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ENTRY(__modsi3)
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UNWIND(.fnstart)
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	cmp	r1, #0
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	beq	Ldiv0
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	rsbmi	r1, r1, #0			@ loops below use unsigned.
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	movs	ip, r0				@ preserve sign of dividend
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	rsbmi	r0, r0, #0			@ if negative make positive
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	subs	r2, r1, #1			@ compare divisor with 1
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	cmpne	r0, r1				@ compare dividend with divisor
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	moveq	r0, #0
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	tsthi	r1, r2				@ see if divisor is power of 2
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	andeq	r0, r0, r2
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	bls	10f
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	ARM_MOD_BODY r0, r1, r2, r3
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10:	cmp	ip, #0
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	rsbmi	r0, r0, #0
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__modsi3)
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#ifdef CONFIG_AEABI
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ENTRY(__aeabi_uidivmod)
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UNWIND(.fnstart)
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UNWIND(.save {r0, r1, ip, lr}	)
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	stmfd	sp!, {r0, r1, ip, lr}
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	bl	__aeabi_uidiv
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	ldmfd	sp!, {r1, r2, ip, lr}
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	mul	r3, r0, r2
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	sub	r1, r1, r3
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__aeabi_uidivmod)
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ENTRY(__aeabi_idivmod)
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UNWIND(.fnstart)
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UNWIND(.save {r0, r1, ip, lr}	)
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	stmfd	sp!, {r0, r1, ip, lr}
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	bl	__aeabi_idiv
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	ldmfd	sp!, {r1, r2, ip, lr}
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	mul	r3, r0, r2
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	sub	r1, r1, r3
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	mov	pc, lr
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UNWIND(.fnend)
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ENDPROC(__aeabi_idivmod)
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#endif
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Ldiv0:
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UNWIND(.fnstart)
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UNWIND(.pad #4)
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UNWIND(.save {lr})
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	str	lr, [sp, #-8]!
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	bl	__div0
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	mov	r0, #0			@ About as wrong as it could be.
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	ldr	pc, [sp], #8
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UNWIND(.fnend)
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ENDPROC(Ldiv0)
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