 0a3aee0da4
			
		
	
	
	0a3aee0da4
	
	
	
		
			
			Go through x86 code and replace __get_cpu_var and get_cpu_var instances that refer to a scalar and are not used for address determinations. Cc: Yinghai Lu <yinghai@kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Acked-by: Tejun Heo <tj@kernel.org> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
		
			
				
	
	
		
			524 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			524 lines
		
	
	
	
		
			12 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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|  *
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|  * Copyright (C) 2007 Alan Stern
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|  * Copyright (C) 2009 IBM Corporation
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|  * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
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|  *
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|  * Authors: Alan Stern <stern@rowland.harvard.edu>
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|  *          K.Prasad <prasad@linux.vnet.ibm.com>
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|  *          Frederic Weisbecker <fweisbec@gmail.com>
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|  */
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| 
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| /*
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|  * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
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|  * using the CPU's debug registers.
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|  */
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| 
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| #include <linux/perf_event.h>
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| #include <linux/hw_breakpoint.h>
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| #include <linux/irqflags.h>
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| #include <linux/notifier.h>
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| #include <linux/kallsyms.h>
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| #include <linux/kprobes.h>
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| #include <linux/percpu.h>
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| #include <linux/kdebug.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/sched.h>
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| #include <linux/init.h>
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| #include <linux/smp.h>
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| 
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| #include <asm/hw_breakpoint.h>
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| #include <asm/processor.h>
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| #include <asm/debugreg.h>
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| 
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| /* Per cpu debug control register value */
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| DEFINE_PER_CPU(unsigned long, cpu_dr7);
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| EXPORT_PER_CPU_SYMBOL(cpu_dr7);
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| 
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| /* Per cpu debug address registers values */
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| static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
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| 
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| /*
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|  * Stores the breakpoints currently in use on each breakpoint address
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|  * register for each cpus
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|  */
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| static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
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| 
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| 
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| static inline unsigned long
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| __encode_dr7(int drnum, unsigned int len, unsigned int type)
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| {
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| 	unsigned long bp_info;
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| 
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| 	bp_info = (len | type) & 0xf;
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| 	bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
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| 	bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
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| 
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| 	return bp_info;
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| }
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| 
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| /*
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|  * Encode the length, type, Exact, and Enable bits for a particular breakpoint
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|  * as stored in debug register 7.
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|  */
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| unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
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| {
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| 	return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
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| }
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| 
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| /*
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|  * Decode the length and type bits for a particular breakpoint as
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|  * stored in debug register 7.  Return the "enabled" status.
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|  */
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| int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
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| {
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| 	int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
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| 
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| 	*len = (bp_info & 0xc) | 0x40;
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| 	*type = (bp_info & 0x3) | 0x80;
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| 
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| 	return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
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| }
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| 
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| /*
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|  * Install a perf counter breakpoint.
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|  *
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|  * We seek a free debug address register and use it for this
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|  * breakpoint. Eventually we enable it in the debug control register.
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|  *
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|  * Atomic: we hold the counter->ctx->lock and we only handle variables
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|  * and registers local to this cpu.
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|  */
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| int arch_install_hw_breakpoint(struct perf_event *bp)
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| {
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| 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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| 	unsigned long *dr7;
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| 	int i;
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| 
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| 	for (i = 0; i < HBP_NUM; i++) {
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| 		struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
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| 
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| 		if (!*slot) {
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| 			*slot = bp;
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| 			break;
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| 		}
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| 	}
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| 
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| 	if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
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| 		return -EBUSY;
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| 
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| 	set_debugreg(info->address, i);
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| 	__this_cpu_write(cpu_debugreg[i], info->address);
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| 
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| 	dr7 = &__get_cpu_var(cpu_dr7);
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| 	*dr7 |= encode_dr7(i, info->len, info->type);
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| 
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| 	set_debugreg(*dr7, 7);
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * Uninstall the breakpoint contained in the given counter.
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|  *
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|  * First we search the debug address register it uses and then we disable
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|  * it.
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|  *
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|  * Atomic: we hold the counter->ctx->lock and we only handle variables
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|  * and registers local to this cpu.
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|  */
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| void arch_uninstall_hw_breakpoint(struct perf_event *bp)
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| {
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| 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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| 	unsigned long *dr7;
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| 	int i;
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| 
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| 	for (i = 0; i < HBP_NUM; i++) {
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| 		struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
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| 
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| 		if (*slot == bp) {
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| 			*slot = NULL;
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| 			break;
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| 		}
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| 	}
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| 
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| 	if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
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| 		return;
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| 
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| 	dr7 = &__get_cpu_var(cpu_dr7);
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| 	*dr7 &= ~__encode_dr7(i, info->len, info->type);
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| 
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| 	set_debugreg(*dr7, 7);
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| }
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| 
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| static int get_hbp_len(u8 hbp_len)
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| {
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| 	unsigned int len_in_bytes = 0;
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| 
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| 	switch (hbp_len) {
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| 	case X86_BREAKPOINT_LEN_1:
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| 		len_in_bytes = 1;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_2:
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| 		len_in_bytes = 2;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_4:
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| 		len_in_bytes = 4;
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| 		break;
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| #ifdef CONFIG_X86_64
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| 	case X86_BREAKPOINT_LEN_8:
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| 		len_in_bytes = 8;
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| 		break;
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| #endif
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| 	}
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| 	return len_in_bytes;
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| }
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| 
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| /*
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|  * Check for virtual address in kernel space.
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|  */
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| int arch_check_bp_in_kernelspace(struct perf_event *bp)
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| {
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| 	unsigned int len;
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| 	unsigned long va;
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| 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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| 
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| 	va = info->address;
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| 	len = get_hbp_len(info->len);
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| 
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| 	return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
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| }
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| 
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| int arch_bp_generic_fields(int x86_len, int x86_type,
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| 			   int *gen_len, int *gen_type)
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| {
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| 	/* Type */
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| 	switch (x86_type) {
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| 	case X86_BREAKPOINT_EXECUTE:
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| 		if (x86_len != X86_BREAKPOINT_LEN_X)
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| 			return -EINVAL;
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| 
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| 		*gen_type = HW_BREAKPOINT_X;
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| 		*gen_len = sizeof(long);
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| 		return 0;
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| 	case X86_BREAKPOINT_WRITE:
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| 		*gen_type = HW_BREAKPOINT_W;
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| 		break;
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| 	case X86_BREAKPOINT_RW:
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| 		*gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	/* Len */
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| 	switch (x86_len) {
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| 	case X86_BREAKPOINT_LEN_1:
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| 		*gen_len = HW_BREAKPOINT_LEN_1;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_2:
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| 		*gen_len = HW_BREAKPOINT_LEN_2;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_4:
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| 		*gen_len = HW_BREAKPOINT_LEN_4;
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| 		break;
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| #ifdef CONFIG_X86_64
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| 	case X86_BREAKPOINT_LEN_8:
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| 		*gen_len = HW_BREAKPOINT_LEN_8;
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| 		break;
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| #endif
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| 
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| static int arch_build_bp_info(struct perf_event *bp)
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| {
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| 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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| 
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| 	info->address = bp->attr.bp_addr;
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| 
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| 	/* Type */
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| 	switch (bp->attr.bp_type) {
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| 	case HW_BREAKPOINT_W:
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| 		info->type = X86_BREAKPOINT_WRITE;
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| 		break;
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| 	case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
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| 		info->type = X86_BREAKPOINT_RW;
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| 		break;
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| 	case HW_BREAKPOINT_X:
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| 		info->type = X86_BREAKPOINT_EXECUTE;
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| 		/*
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| 		 * x86 inst breakpoints need to have a specific undefined len.
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| 		 * But we still need to check userspace is not trying to setup
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| 		 * an unsupported length, to get a range breakpoint for example.
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| 		 */
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| 		if (bp->attr.bp_len == sizeof(long)) {
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| 			info->len = X86_BREAKPOINT_LEN_X;
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| 			return 0;
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| 		}
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	/* Len */
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| 	switch (bp->attr.bp_len) {
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| 	case HW_BREAKPOINT_LEN_1:
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| 		info->len = X86_BREAKPOINT_LEN_1;
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| 		break;
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| 	case HW_BREAKPOINT_LEN_2:
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| 		info->len = X86_BREAKPOINT_LEN_2;
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| 		break;
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| 	case HW_BREAKPOINT_LEN_4:
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| 		info->len = X86_BREAKPOINT_LEN_4;
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| 		break;
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| #ifdef CONFIG_X86_64
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| 	case HW_BREAKPOINT_LEN_8:
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| 		info->len = X86_BREAKPOINT_LEN_8;
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| 		break;
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| #endif
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| /*
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|  * Validate the arch-specific HW Breakpoint register settings
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|  */
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| int arch_validate_hwbkpt_settings(struct perf_event *bp)
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| {
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| 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
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| 	unsigned int align;
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| 	int ret;
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| 
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| 
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| 	ret = arch_build_bp_info(bp);
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| 	if (ret)
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| 		return ret;
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| 
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| 	ret = -EINVAL;
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| 
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| 	switch (info->len) {
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| 	case X86_BREAKPOINT_LEN_1:
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| 		align = 0;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_2:
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| 		align = 1;
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| 		break;
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| 	case X86_BREAKPOINT_LEN_4:
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| 		align = 3;
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| 		break;
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| #ifdef CONFIG_X86_64
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| 	case X86_BREAKPOINT_LEN_8:
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| 		align = 7;
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| 		break;
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| #endif
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| 	default:
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| 		return ret;
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| 	}
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| 
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| 	/*
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| 	 * Check that the low-order bits of the address are appropriate
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| 	 * for the alignment implied by len.
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| 	 */
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| 	if (info->address & align)
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| 		return -EINVAL;
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * Dump the debug register contents to the user.
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|  * We can't dump our per cpu values because it
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|  * may contain cpu wide breakpoint, something that
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|  * doesn't belong to the current task.
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|  *
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|  * TODO: include non-ptrace user breakpoints (perf)
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|  */
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| void aout_dump_debugregs(struct user *dump)
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| {
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| 	int i;
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| 	int dr7 = 0;
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| 	struct perf_event *bp;
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| 	struct arch_hw_breakpoint *info;
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| 	struct thread_struct *thread = ¤t->thread;
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| 
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| 	for (i = 0; i < HBP_NUM; i++) {
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| 		bp = thread->ptrace_bps[i];
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| 
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| 		if (bp && !bp->attr.disabled) {
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| 			dump->u_debugreg[i] = bp->attr.bp_addr;
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| 			info = counter_arch_bp(bp);
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| 			dr7 |= encode_dr7(i, info->len, info->type);
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| 		} else {
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| 			dump->u_debugreg[i] = 0;
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| 		}
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| 	}
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| 
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| 	dump->u_debugreg[4] = 0;
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| 	dump->u_debugreg[5] = 0;
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| 	dump->u_debugreg[6] = current->thread.debugreg6;
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| 
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| 	dump->u_debugreg[7] = dr7;
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| }
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| EXPORT_SYMBOL_GPL(aout_dump_debugregs);
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| 
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| /*
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|  * Release the user breakpoints used by ptrace
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|  */
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| void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
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| {
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| 	int i;
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| 	struct thread_struct *t = &tsk->thread;
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| 
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| 	for (i = 0; i < HBP_NUM; i++) {
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| 		unregister_hw_breakpoint(t->ptrace_bps[i]);
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| 		t->ptrace_bps[i] = NULL;
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| 	}
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| }
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| 
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| void hw_breakpoint_restore(void)
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| {
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| 	set_debugreg(__this_cpu_read(cpu_debugreg[0]), 0);
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| 	set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
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| 	set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
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| 	set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
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| 	set_debugreg(current->thread.debugreg6, 6);
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| 	set_debugreg(__this_cpu_read(cpu_dr7), 7);
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| }
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| EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
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| 
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| /*
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|  * Handle debug exception notifications.
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|  *
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|  * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
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|  *
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|  * NOTIFY_DONE returned if one of the following conditions is true.
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|  * i) When the causative address is from user-space and the exception
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|  * is a valid one, i.e. not triggered as a result of lazy debug register
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|  * switching
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|  * ii) When there are more bits than trap<n> set in DR6 register (such
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|  * as BD, BS or BT) indicating that more than one debug condition is
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|  * met and requires some more action in do_debug().
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|  *
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|  * NOTIFY_STOP returned for all other cases
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|  *
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|  */
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| static int __kprobes hw_breakpoint_handler(struct die_args *args)
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| {
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| 	int i, cpu, rc = NOTIFY_STOP;
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| 	struct perf_event *bp;
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| 	unsigned long dr7, dr6;
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| 	unsigned long *dr6_p;
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| 
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| 	/* The DR6 value is pointed by args->err */
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| 	dr6_p = (unsigned long *)ERR_PTR(args->err);
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| 	dr6 = *dr6_p;
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| 
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| 	/* If it's a single step, TRAP bits are random */
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| 	if (dr6 & DR_STEP)
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| 		return NOTIFY_DONE;
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| 
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| 	/* Do an early return if no trap bits are set in DR6 */
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| 	if ((dr6 & DR_TRAP_BITS) == 0)
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| 		return NOTIFY_DONE;
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| 
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| 	get_debugreg(dr7, 7);
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| 	/* Disable breakpoints during exception handling */
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| 	set_debugreg(0UL, 7);
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| 	/*
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| 	 * Assert that local interrupts are disabled
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| 	 * Reset the DRn bits in the virtualized register value.
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| 	 * The ptrace trigger routine will add in whatever is needed.
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| 	 */
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| 	current->thread.debugreg6 &= ~DR_TRAP_BITS;
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| 	cpu = get_cpu();
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| 
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| 	/* Handle all the breakpoints that were triggered */
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| 	for (i = 0; i < HBP_NUM; ++i) {
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| 		if (likely(!(dr6 & (DR_TRAP0 << i))))
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| 			continue;
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| 
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| 		/*
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| 		 * The counter may be concurrently released but that can only
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| 		 * occur from a call_rcu() path. We can then safely fetch
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| 		 * the breakpoint, use its callback, touch its counter
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| 		 * while we are in an rcu_read_lock() path.
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| 		 */
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| 		rcu_read_lock();
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| 
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| 		bp = per_cpu(bp_per_reg[i], cpu);
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| 		/*
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| 		 * Reset the 'i'th TRAP bit in dr6 to denote completion of
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| 		 * exception handling
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| 		 */
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| 		(*dr6_p) &= ~(DR_TRAP0 << i);
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| 		/*
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| 		 * bp can be NULL due to lazy debug register switching
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| 		 * or due to concurrent perf counter removing.
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| 		 */
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| 		if (!bp) {
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| 			rcu_read_unlock();
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| 			break;
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| 		}
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| 
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| 		perf_bp_event(bp, args->regs);
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| 
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| 		/*
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| 		 * Set up resume flag to avoid breakpoint recursion when
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| 		 * returning back to origin.
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| 		 */
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| 		if (bp->hw.info.type == X86_BREAKPOINT_EXECUTE)
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| 			args->regs->flags |= X86_EFLAGS_RF;
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| 
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| 		rcu_read_unlock();
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| 	}
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| 	/*
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| 	 * Further processing in do_debug() is needed for a) user-space
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| 	 * breakpoints (to generate signals) and b) when the system has
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| 	 * taken exception due to multiple causes
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| 	 */
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| 	if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
 | |
| 	    (dr6 & (~DR_TRAP_BITS)))
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| 		rc = NOTIFY_DONE;
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| 
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| 	set_debugreg(dr7, 7);
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| 	put_cpu();
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| 
 | |
| 	return rc;
 | |
| }
 | |
| 
 | |
| /*
 | |
|  * Handle debug exception notifications.
 | |
|  */
 | |
| int __kprobes hw_breakpoint_exceptions_notify(
 | |
| 		struct notifier_block *unused, unsigned long val, void *data)
 | |
| {
 | |
| 	if (val != DIE_DEBUG)
 | |
| 		return NOTIFY_DONE;
 | |
| 
 | |
| 	return hw_breakpoint_handler(data);
 | |
| }
 | |
| 
 | |
| void hw_breakpoint_pmu_read(struct perf_event *bp)
 | |
| {
 | |
| 	/* TODO */
 | |
| }
 |