 c1c88e2fa1
			
		
	
	
	c1c88e2fa1
	
	
	
		
			
			The current approach duplicates the spr->bat finding logic and makes it harder to reuse the actually used variables. So let's move everything down to the spr handler. Signed-off-by: Alexander Graf <agraf@suse.de>
		
			
				
	
	
		
			558 lines
		
	
	
	
		
			13 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			558 lines
		
	
	
	
		
			13 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License, version 2, as
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|  * published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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|  *
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|  * Copyright SUSE Linux Products GmbH 2009
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|  *
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|  * Authors: Alexander Graf <agraf@suse.de>
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|  */
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| 
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| #include <asm/kvm_ppc.h>
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| #include <asm/disassemble.h>
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| #include <asm/kvm_book3s.h>
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| #include <asm/reg.h>
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| 
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| #define OP_19_XOP_RFID		18
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| #define OP_19_XOP_RFI		50
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| 
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| #define OP_31_XOP_MFMSR		83
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| #define OP_31_XOP_MTMSR		146
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| #define OP_31_XOP_MTMSRD	178
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| #define OP_31_XOP_MTSR		210
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| #define OP_31_XOP_MTSRIN	242
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| #define OP_31_XOP_TLBIEL	274
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| #define OP_31_XOP_TLBIE		306
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| #define OP_31_XOP_SLBMTE	402
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| #define OP_31_XOP_SLBIE		434
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| #define OP_31_XOP_SLBIA		498
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| #define OP_31_XOP_MFSR		595
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| #define OP_31_XOP_MFSRIN	659
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| #define OP_31_XOP_DCBA		758
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| #define OP_31_XOP_SLBMFEV	851
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| #define OP_31_XOP_EIOIO		854
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| #define OP_31_XOP_SLBMFEE	915
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| 
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| /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
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| #define OP_31_XOP_DCBZ		1010
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| 
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| #define OP_LFS			48
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| #define OP_LFD			50
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| #define OP_STFS			52
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| #define OP_STFD			54
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| 
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| #define SPRN_GQR0		912
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| #define SPRN_GQR1		913
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| #define SPRN_GQR2		914
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| #define SPRN_GQR3		915
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| #define SPRN_GQR4		916
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| #define SPRN_GQR5		917
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| #define SPRN_GQR6		918
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| #define SPRN_GQR7		919
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| 
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| /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
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|  * function pointers, so let's just disable the define. */
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| #undef mfsrin
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| 
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| int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
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|                            unsigned int inst, int *advance)
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| {
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| 	int emulated = EMULATE_DONE;
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| 
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| 	switch (get_op(inst)) {
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| 	case 19:
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| 		switch (get_xop(inst)) {
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| 		case OP_19_XOP_RFID:
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| 		case OP_19_XOP_RFI:
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| 			kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
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| 			kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
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| 			*advance = 0;
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| 			break;
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| 
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| 		default:
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| 			emulated = EMULATE_FAIL;
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| 			break;
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| 		}
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| 		break;
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| 	case 31:
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| 		switch (get_xop(inst)) {
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| 		case OP_31_XOP_MFMSR:
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| 			kvmppc_set_gpr(vcpu, get_rt(inst),
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| 				       vcpu->arch.shared->msr);
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| 			break;
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| 		case OP_31_XOP_MTMSRD:
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| 		{
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| 			ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
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| 			if (inst & 0x10000) {
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| 				vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE);
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| 				vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE);
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| 			} else
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| 				kvmppc_set_msr(vcpu, rs);
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| 			break;
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| 		}
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| 		case OP_31_XOP_MTMSR:
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| 			kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
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| 			break;
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| 		case OP_31_XOP_MFSR:
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| 		{
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| 			int srnum;
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| 
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| 			srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
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| 			if (vcpu->arch.mmu.mfsrin) {
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| 				u32 sr;
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| 				sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
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| 				kvmppc_set_gpr(vcpu, get_rt(inst), sr);
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| 			}
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| 			break;
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| 		}
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| 		case OP_31_XOP_MFSRIN:
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| 		{
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| 			int srnum;
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| 
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| 			srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
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| 			if (vcpu->arch.mmu.mfsrin) {
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| 				u32 sr;
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| 				sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
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| 				kvmppc_set_gpr(vcpu, get_rt(inst), sr);
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| 			}
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| 			break;
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| 		}
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| 		case OP_31_XOP_MTSR:
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| 			vcpu->arch.mmu.mtsrin(vcpu,
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| 				(inst >> 16) & 0xf,
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| 				kvmppc_get_gpr(vcpu, get_rs(inst)));
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| 			break;
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| 		case OP_31_XOP_MTSRIN:
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| 			vcpu->arch.mmu.mtsrin(vcpu,
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| 				(kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
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| 				kvmppc_get_gpr(vcpu, get_rs(inst)));
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| 			break;
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| 		case OP_31_XOP_TLBIE:
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| 		case OP_31_XOP_TLBIEL:
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| 		{
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| 			bool large = (inst & 0x00200000) ? true : false;
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| 			ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
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| 			vcpu->arch.mmu.tlbie(vcpu, addr, large);
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| 			break;
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| 		}
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| 		case OP_31_XOP_EIOIO:
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| 			break;
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| 		case OP_31_XOP_SLBMTE:
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| 			if (!vcpu->arch.mmu.slbmte)
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| 				return EMULATE_FAIL;
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| 
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| 			vcpu->arch.mmu.slbmte(vcpu,
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| 					kvmppc_get_gpr(vcpu, get_rs(inst)),
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| 					kvmppc_get_gpr(vcpu, get_rb(inst)));
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| 			break;
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| 		case OP_31_XOP_SLBIE:
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| 			if (!vcpu->arch.mmu.slbie)
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| 				return EMULATE_FAIL;
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| 
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| 			vcpu->arch.mmu.slbie(vcpu,
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| 					kvmppc_get_gpr(vcpu, get_rb(inst)));
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| 			break;
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| 		case OP_31_XOP_SLBIA:
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| 			if (!vcpu->arch.mmu.slbia)
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| 				return EMULATE_FAIL;
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| 
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| 			vcpu->arch.mmu.slbia(vcpu);
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| 			break;
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| 		case OP_31_XOP_SLBMFEE:
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| 			if (!vcpu->arch.mmu.slbmfee) {
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| 				emulated = EMULATE_FAIL;
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| 			} else {
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| 				ulong t, rb;
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| 
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| 				rb = kvmppc_get_gpr(vcpu, get_rb(inst));
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| 				t = vcpu->arch.mmu.slbmfee(vcpu, rb);
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| 				kvmppc_set_gpr(vcpu, get_rt(inst), t);
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| 			}
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| 			break;
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| 		case OP_31_XOP_SLBMFEV:
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| 			if (!vcpu->arch.mmu.slbmfev) {
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| 				emulated = EMULATE_FAIL;
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| 			} else {
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| 				ulong t, rb;
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| 
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| 				rb = kvmppc_get_gpr(vcpu, get_rb(inst));
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| 				t = vcpu->arch.mmu.slbmfev(vcpu, rb);
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| 				kvmppc_set_gpr(vcpu, get_rt(inst), t);
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| 			}
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| 			break;
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| 		case OP_31_XOP_DCBA:
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| 			/* Gets treated as NOP */
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| 			break;
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| 		case OP_31_XOP_DCBZ:
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| 		{
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| 			ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
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| 			ulong ra = 0;
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| 			ulong addr, vaddr;
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| 			u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
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| 			u32 dsisr;
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| 			int r;
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| 
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| 			if (get_ra(inst))
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| 				ra = kvmppc_get_gpr(vcpu, get_ra(inst));
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| 
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| 			addr = (ra + rb) & ~31ULL;
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| 			if (!(vcpu->arch.shared->msr & MSR_SF))
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| 				addr &= 0xffffffff;
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| 			vaddr = addr;
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| 
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| 			r = kvmppc_st(vcpu, &addr, 32, zeros, true);
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| 			if ((r == -ENOENT) || (r == -EPERM)) {
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| 				*advance = 0;
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| 				vcpu->arch.shared->dar = vaddr;
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| 				to_svcpu(vcpu)->fault_dar = vaddr;
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| 
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| 				dsisr = DSISR_ISSTORE;
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| 				if (r == -ENOENT)
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| 					dsisr |= DSISR_NOHPTE;
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| 				else if (r == -EPERM)
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| 					dsisr |= DSISR_PROTFAULT;
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| 
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| 				vcpu->arch.shared->dsisr = dsisr;
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| 				to_svcpu(vcpu)->fault_dsisr = dsisr;
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| 
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| 				kvmppc_book3s_queue_irqprio(vcpu,
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| 					BOOK3S_INTERRUPT_DATA_STORAGE);
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| 			}
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| 
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| 			break;
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| 		}
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| 		default:
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| 			emulated = EMULATE_FAIL;
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| 		}
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| 		break;
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| 	default:
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| 		emulated = EMULATE_FAIL;
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| 	}
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| 
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| 	if (emulated == EMULATE_FAIL)
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| 		emulated = kvmppc_emulate_paired_single(run, vcpu);
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| 
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| 	return emulated;
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| }
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| 
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| void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
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|                     u32 val)
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| {
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| 	if (upper) {
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| 		/* Upper BAT */
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| 		u32 bl = (val >> 2) & 0x7ff;
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| 		bat->bepi_mask = (~bl << 17);
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| 		bat->bepi = val & 0xfffe0000;
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| 		bat->vs = (val & 2) ? 1 : 0;
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| 		bat->vp = (val & 1) ? 1 : 0;
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| 		bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
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| 	} else {
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| 		/* Lower BAT */
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| 		bat->brpn = val & 0xfffe0000;
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| 		bat->wimg = (val >> 3) & 0xf;
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| 		bat->pp = val & 3;
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| 		bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
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| 	}
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| }
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| 
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| static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
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| {
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| 	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
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| 	struct kvmppc_bat *bat;
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| 
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| 	switch (sprn) {
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| 	case SPRN_IBAT0U ... SPRN_IBAT3L:
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| 		bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
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| 		break;
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| 	case SPRN_IBAT4U ... SPRN_IBAT7L:
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| 		bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
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| 		break;
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| 	case SPRN_DBAT0U ... SPRN_DBAT3L:
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| 		bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
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| 		break;
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| 	case SPRN_DBAT4U ... SPRN_DBAT7L:
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| 		bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
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| 		break;
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| 	default:
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| 		BUG();
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| 	}
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| 
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| 	return bat;
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| }
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| 
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| int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
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| {
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| 	int emulated = EMULATE_DONE;
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| 	ulong spr_val = kvmppc_get_gpr(vcpu, rs);
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| 
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| 	switch (sprn) {
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| 	case SPRN_SDR1:
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| 		to_book3s(vcpu)->sdr1 = spr_val;
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| 		break;
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| 	case SPRN_DSISR:
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| 		vcpu->arch.shared->dsisr = spr_val;
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| 		break;
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| 	case SPRN_DAR:
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| 		vcpu->arch.shared->dar = spr_val;
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| 		break;
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| 	case SPRN_HIOR:
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| 		to_book3s(vcpu)->hior = spr_val;
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| 		break;
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| 	case SPRN_IBAT0U ... SPRN_IBAT3L:
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| 	case SPRN_IBAT4U ... SPRN_IBAT7L:
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| 	case SPRN_DBAT0U ... SPRN_DBAT3L:
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| 	case SPRN_DBAT4U ... SPRN_DBAT7L:
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| 	{
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| 		struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
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| 
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| 		kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
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| 		/* BAT writes happen so rarely that we're ok to flush
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| 		 * everything here */
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| 		kvmppc_mmu_pte_flush(vcpu, 0, 0);
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| 		kvmppc_mmu_flush_segments(vcpu);
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| 		break;
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| 	}
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| 	case SPRN_HID0:
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| 		to_book3s(vcpu)->hid[0] = spr_val;
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| 		break;
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| 	case SPRN_HID1:
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| 		to_book3s(vcpu)->hid[1] = spr_val;
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| 		break;
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| 	case SPRN_HID2:
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| 		to_book3s(vcpu)->hid[2] = spr_val;
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| 		break;
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| 	case SPRN_HID2_GEKKO:
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| 		to_book3s(vcpu)->hid[2] = spr_val;
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| 		/* HID2.PSE controls paired single on gekko */
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| 		switch (vcpu->arch.pvr) {
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| 		case 0x00080200:	/* lonestar 2.0 */
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| 		case 0x00088202:	/* lonestar 2.2 */
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| 		case 0x70000100:	/* gekko 1.0 */
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| 		case 0x00080100:	/* gekko 2.0 */
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| 		case 0x00083203:	/* gekko 2.3a */
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| 		case 0x00083213:	/* gekko 2.3b */
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| 		case 0x00083204:	/* gekko 2.4 */
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| 		case 0x00083214:	/* gekko 2.4e (8SE) - retail HW2 */
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| 		case 0x00087200:	/* broadway */
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| 			if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
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| 				/* Native paired singles */
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| 			} else if (spr_val & (1 << 29)) { /* HID2.PSE */
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| 				vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
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| 				kvmppc_giveup_ext(vcpu, MSR_FP);
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| 			} else {
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| 				vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
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| 			}
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| 			break;
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| 		}
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| 		break;
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| 	case SPRN_HID4:
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| 	case SPRN_HID4_GEKKO:
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| 		to_book3s(vcpu)->hid[4] = spr_val;
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| 		break;
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| 	case SPRN_HID5:
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| 		to_book3s(vcpu)->hid[5] = spr_val;
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| 		/* guest HID5 set can change is_dcbz32 */
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| 		if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
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| 		    (mfmsr() & MSR_HV))
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| 			vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
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| 		break;
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| 	case SPRN_GQR0:
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| 	case SPRN_GQR1:
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| 	case SPRN_GQR2:
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| 	case SPRN_GQR3:
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| 	case SPRN_GQR4:
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| 	case SPRN_GQR5:
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| 	case SPRN_GQR6:
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| 	case SPRN_GQR7:
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| 		to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
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| 		break;
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| 	case SPRN_ICTC:
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| 	case SPRN_THRM1:
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| 	case SPRN_THRM2:
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| 	case SPRN_THRM3:
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| 	case SPRN_CTRLF:
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| 	case SPRN_CTRLT:
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| 	case SPRN_L2CR:
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| 	case SPRN_MMCR0_GEKKO:
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| 	case SPRN_MMCR1_GEKKO:
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| 	case SPRN_PMC1_GEKKO:
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| 	case SPRN_PMC2_GEKKO:
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| 	case SPRN_PMC3_GEKKO:
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| 	case SPRN_PMC4_GEKKO:
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| 	case SPRN_WPAR_GEKKO:
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| 		break;
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| 	default:
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| 		printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
 | |
| #ifndef DEBUG_SPR
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| 		emulated = EMULATE_FAIL;
 | |
| #endif
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| 		break;
 | |
| 	}
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| 
 | |
| 	return emulated;
 | |
| }
 | |
| 
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| int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
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| {
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| 	int emulated = EMULATE_DONE;
 | |
| 
 | |
| 	switch (sprn) {
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| 	case SPRN_IBAT0U ... SPRN_IBAT3L:
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| 	case SPRN_IBAT4U ... SPRN_IBAT7L:
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| 	case SPRN_DBAT0U ... SPRN_DBAT3L:
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| 	case SPRN_DBAT4U ... SPRN_DBAT7L:
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| 	{
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| 		struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
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| 
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| 		if (sprn % 2)
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| 			kvmppc_set_gpr(vcpu, rt, bat->raw >> 32);
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| 		else
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| 			kvmppc_set_gpr(vcpu, rt, bat->raw);
 | |
| 
 | |
| 		break;
 | |
| 	}
 | |
| 	case SPRN_SDR1:
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| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
 | |
| 		break;
 | |
| 	case SPRN_DSISR:
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| 		kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr);
 | |
| 		break;
 | |
| 	case SPRN_DAR:
 | |
| 		kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar);
 | |
| 		break;
 | |
| 	case SPRN_HIOR:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
 | |
| 		break;
 | |
| 	case SPRN_HID0:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
 | |
| 		break;
 | |
| 	case SPRN_HID1:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
 | |
| 		break;
 | |
| 	case SPRN_HID2:
 | |
| 	case SPRN_HID2_GEKKO:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
 | |
| 		break;
 | |
| 	case SPRN_HID4:
 | |
| 	case SPRN_HID4_GEKKO:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
 | |
| 		break;
 | |
| 	case SPRN_HID5:
 | |
| 		kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
 | |
| 		break;
 | |
| 	case SPRN_GQR0:
 | |
| 	case SPRN_GQR1:
 | |
| 	case SPRN_GQR2:
 | |
| 	case SPRN_GQR3:
 | |
| 	case SPRN_GQR4:
 | |
| 	case SPRN_GQR5:
 | |
| 	case SPRN_GQR6:
 | |
| 	case SPRN_GQR7:
 | |
| 		kvmppc_set_gpr(vcpu, rt,
 | |
| 			       to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
 | |
| 		break;
 | |
| 	case SPRN_THRM1:
 | |
| 	case SPRN_THRM2:
 | |
| 	case SPRN_THRM3:
 | |
| 	case SPRN_CTRLF:
 | |
| 	case SPRN_CTRLT:
 | |
| 	case SPRN_L2CR:
 | |
| 	case SPRN_MMCR0_GEKKO:
 | |
| 	case SPRN_MMCR1_GEKKO:
 | |
| 	case SPRN_PMC1_GEKKO:
 | |
| 	case SPRN_PMC2_GEKKO:
 | |
| 	case SPRN_PMC3_GEKKO:
 | |
| 	case SPRN_PMC4_GEKKO:
 | |
| 	case SPRN_WPAR_GEKKO:
 | |
| 		kvmppc_set_gpr(vcpu, rt, 0);
 | |
| 		break;
 | |
| 	default:
 | |
| 		printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
 | |
| #ifndef DEBUG_SPR
 | |
| 		emulated = EMULATE_FAIL;
 | |
| #endif
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	return emulated;
 | |
| }
 | |
| 
 | |
| u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
 | |
| {
 | |
| 	u32 dsisr = 0;
 | |
| 
 | |
| 	/*
 | |
| 	 * This is what the spec says about DSISR bits (not mentioned = 0):
 | |
| 	 *
 | |
| 	 * 12:13		[DS]	Set to bits 30:31
 | |
| 	 * 15:16		[X]	Set to bits 29:30
 | |
| 	 * 17			[X]	Set to bit 25
 | |
| 	 *			[D/DS]	Set to bit 5
 | |
| 	 * 18:21		[X]	Set to bits 21:24
 | |
| 	 *			[D/DS]	Set to bits 1:4
 | |
| 	 * 22:26			Set to bits 6:10 (RT/RS/FRT/FRS)
 | |
| 	 * 27:31			Set to bits 11:15 (RA)
 | |
| 	 */
 | |
| 
 | |
| 	switch (get_op(inst)) {
 | |
| 	/* D-form */
 | |
| 	case OP_LFS:
 | |
| 	case OP_LFD:
 | |
| 	case OP_STFD:
 | |
| 	case OP_STFS:
 | |
| 		dsisr |= (inst >> 12) & 0x4000;	/* bit 17 */
 | |
| 		dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
 | |
| 		break;
 | |
| 	/* X-form */
 | |
| 	case 31:
 | |
| 		dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
 | |
| 		dsisr |= (inst << 8)  & 0x04000; /* bit 17 */
 | |
| 		dsisr |= (inst << 3)  & 0x03c00; /* bits 18:21 */
 | |
| 		break;
 | |
| 	default:
 | |
| 		printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
 | |
| 
 | |
| 	return dsisr;
 | |
| }
 | |
| 
 | |
| ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
 | |
| {
 | |
| 	ulong dar = 0;
 | |
| 	ulong ra;
 | |
| 
 | |
| 	switch (get_op(inst)) {
 | |
| 	case OP_LFS:
 | |
| 	case OP_LFD:
 | |
| 	case OP_STFD:
 | |
| 	case OP_STFS:
 | |
| 		ra = get_ra(inst);
 | |
| 		if (ra)
 | |
| 			dar = kvmppc_get_gpr(vcpu, ra);
 | |
| 		dar += (s32)((s16)inst);
 | |
| 		break;
 | |
| 	case 31:
 | |
| 		ra = get_ra(inst);
 | |
| 		if (ra)
 | |
| 			dar = kvmppc_get_gpr(vcpu, ra);
 | |
| 		dar += kvmppc_get_gpr(vcpu, get_rb(inst));
 | |
| 		break;
 | |
| 	default:
 | |
| 		printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	return dar;
 | |
| }
 |