 96173a6c4e
			
		
	
	
	96173a6c4e
	
	
	
		
			
			- fix PCI interrupt assignment by emulating ioc3 interrupt pin register - use pci_probe_only mode - select correct page size in bridge - remove no longer needed ioc3_sio_init() code [Ralf: Fix for 64kB or larger pagesizes] Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			220 lines
		
	
	
	
		
			5.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			220 lines
		
	
	
	
		
			5.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General
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|  * Public License.  See the file "COPYING" in the main directory of this
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|  * archive for more details.
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|  *
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|  * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
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|  * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
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|  */
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| #include <linux/kernel.h>
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| #include <linux/init.h>
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| #include <linux/sched.h>
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| #include <linux/mm.h>
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| #include <linux/module.h>
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| #include <linux/cpumask.h>
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| #include <asm/cpu.h>
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| #include <asm/io.h>
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| #include <asm/pgtable.h>
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| #include <asm/time.h>
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| #include <asm/sn/types.h>
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| #include <asm/sn/sn0/addrs.h>
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| #include <asm/sn/sn0/hubni.h>
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| #include <asm/sn/sn0/hubio.h>
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| #include <asm/sn/klconfig.h>
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| #include <asm/sn/ioc3.h>
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| #include <asm/mipsregs.h>
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| #include <asm/sn/gda.h>
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| #include <asm/sn/hub.h>
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| #include <asm/sn/intr.h>
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| #include <asm/current.h>
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| #include <asm/processor.h>
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| #include <asm/mmu_context.h>
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| #include <asm/thread_info.h>
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| #include <asm/sn/launch.h>
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| #include <asm/sn/sn_private.h>
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| #include <asm/sn/sn0/ip27.h>
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| #include <asm/sn/mapped_kernel.h>
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| 
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| #define CPU_NONE		(cpuid_t)-1
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| 
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| static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES);
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| nasid_t master_nasid = INVALID_NASID;
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| 
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| cnodeid_t	nasid_to_compact_node[MAX_NASIDS];
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| nasid_t		compact_to_nasid_node[MAX_COMPACT_NODES];
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| cnodeid_t	cpuid_to_compact_node[MAXCPUS];
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| 
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| EXPORT_SYMBOL(nasid_to_compact_node);
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| 
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| struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
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| EXPORT_SYMBOL_GPL(sn_cpu_info);
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| 
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| extern void pcibr_setup(cnodeid_t);
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| 
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| extern void xtalk_probe_node(cnodeid_t nid);
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| 
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| static void __cpuinit per_hub_init(cnodeid_t cnode)
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| {
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| 	struct hub_data *hub = hub_data(cnode);
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| 	nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
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| 	int i;
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| 
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| 	cpu_set(smp_processor_id(), hub->h_cpus);
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| 
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| 	if (test_and_set_bit(cnode, hub_init_mask))
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| 		return;
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| 	/*
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| 	 * Set CRB timeout at 5ms, (< PI timeout of 10ms)
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| 	 */
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| 	REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
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| 	REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
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| 
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| 	hub_rtc_init(cnode);
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| 	xtalk_probe_node(cnode);
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| 
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| #ifdef CONFIG_REPLICATE_EXHANDLERS
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| 	/*
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| 	 * If this is not a headless node initialization,
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| 	 * copy over the caliased exception handlers.
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| 	 */
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| 	if (get_compact_nodeid() == cnode) {
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| 		extern char except_vec2_generic, except_vec3_generic;
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| 		extern void build_tlb_refill_handler(void);
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| 
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| 		memcpy((void *)(CKSEG0 + 0x100), &except_vec2_generic, 0x80);
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| 		memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x80);
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| 		build_tlb_refill_handler();
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| 		memcpy((void *)(CKSEG0 + 0x100), (void *) CKSEG0, 0x80);
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| 		memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x100);
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| 		__flush_cache_all();
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| 	}
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| #endif
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| 
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| 	/*
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| 	 * Some interrupts are reserved by hardware or by software convention.
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| 	 * Mark these as reserved right away so they won't be used accidently
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| 	 * later.
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| 	 */
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| 	for (i = 0; i <= BASE_PCI_IRQ; i++) {
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| 		__set_bit(i, hub->irq_alloc_mask);
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| 		LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i);
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| 	}
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| 
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| 	__set_bit(IP_PEND0_6_63, hub->irq_alloc_mask);
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| 	LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
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| 
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| 	for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
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| 		__set_bit(i, hub->irq_alloc_mask);
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| 		LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i);
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| 	}
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| }
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| 
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| void __cpuinit per_cpu_init(void)
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| {
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| 	int cpu = smp_processor_id();
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| 	int slice = LOCAL_HUB_L(PI_CPU_NUM);
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| 	cnodeid_t cnode = get_compact_nodeid();
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| 	struct hub_data *hub = hub_data(cnode);
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| 	struct slice_data *si = hub->slice + slice;
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| 	int i;
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| 
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| 	if (test_and_set_bit(slice, &hub->slice_map))
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| 		return;
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| 
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| 	clear_c0_status(ST0_IM);
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| 
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| 	per_hub_init(cnode);
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| 
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| 	for (i = 0; i < LEVELS_PER_SLICE; i++)
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| 		si->level_to_irq[i] = -1;
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| 
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| 	/*
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| 	 * We use this so we can find the local hub's data as fast as only
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| 	 * possible.
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| 	 */
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| 	cpu_data[cpu].data = si;
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| 
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| 	cpu_time_init();
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| 	install_ipi();
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| 
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| 	/* Install our NMI handler if symmon hasn't installed one. */
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| 	install_cpu_nmi_handler(cputoslice(cpu));
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| 
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| 	set_c0_status(SRB_DEV0 | SRB_DEV1);
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| }
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| 
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| /*
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|  * get_nasid() returns the physical node id number of the caller.
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|  */
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| nasid_t
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| get_nasid(void)
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| {
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| 	return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
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| 	                 >> NSRI_NODEID_SHFT);
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| }
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| 
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| /*
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|  * Map the physical node id to a virtual node id (virtual node ids are contiguous).
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|  */
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| cnodeid_t get_compact_nodeid(void)
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| {
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| 	return NASID_TO_COMPACT_NODEID(get_nasid());
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| }
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| 
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| static inline void ioc3_eth_init(void)
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| {
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| 	struct ioc3 *ioc3;
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| 	nasid_t nid;
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| 
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| 	nid = get_nasid();
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| 	ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;
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| 
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| 	ioc3->eier = 0;
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| }
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| 
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| extern void ip27_reboot_setup(void);
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| 
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| void __init plat_mem_setup(void)
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| {
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| 	hubreg_t p, e, n_mode;
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| 	nasid_t nid;
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| 
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| 	ip27_reboot_setup();
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| 
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| 	/*
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| 	 * hub_rtc init and cpu clock intr enabled for later calibrate_delay.
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| 	 */
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| 	nid = get_nasid();
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| 	printk("IP27: Running on node %d.\n", nid);
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| 
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| 	p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1;
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| 	e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1;
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| 	printk("Node %d has %s primary CPU%s.\n", nid,
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| 	       p ? "a" : "no",
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| 	       e ? ", CPU is running" : "");
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| 
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| 	p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1;
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| 	e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1;
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| 	printk("Node %d has %s secondary CPU%s.\n", nid,
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| 	       p ? "a" : "no",
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| 	       e ? ", CPU is running" : "");
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| 
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| 	/*
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| 	 * Try to catch kernel missconfigurations and give user an
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| 	 * indication what option to select.
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| 	 */
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| 	n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
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| 	printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
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| #ifdef CONFIG_SGI_SN_N_MODE
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| 	if (!n_mode)
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| 		panic("Kernel compiled for M mode.");
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| #else
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| 	if (n_mode)
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| 		panic("Kernel compiled for N mode.");
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| #endif
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| 
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| 	ioc3_eth_init();
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| 	per_cpu_init();
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| 
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| 	set_io_port_base(IO_BASE);
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| }
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