 5584b4da78
			
		
	
	
	5584b4da78
	
	
	
		
			
			Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60 and for ML605. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
		
			
				
	
	
		
			56 lines
		
	
	
	
		
			1.2 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			56 lines
		
	
	
	
		
			1.2 KiB
			
		
	
	
	
		
			Text
		
	
	
	
	
	
| / {
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| 	compatible = "xtensa,xtfpga";
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| 	#address-cells = <1>;
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| 	#size-cells = <1>;
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| 	interrupt-parent = <&pic>;
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| 
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| 	chosen {
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| 		bootargs = "earlycon=uart8250,mmio32,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug";
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| 	};
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| 
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| 	memory@0 {
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| 		device_type = "memory";
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| 		reg = <0x00000000 0x06000000>;
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| 	};
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| 
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| 	cpus {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		cpu@0 {
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| 			compatible = "xtensa,cpu";
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| 			reg = <0>;
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| 			/* Filled in by platform_setup from FPGA register
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| 			 * clock-frequency = <100000000>;
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| 			 */
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| 		};
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| 	};
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| 
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| 	pic: pic {
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| 		compatible = "xtensa,pic";
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| 		/* one cell: internal irq number,
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| 		 * two cells: second cell == 0: internal irq number
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| 		 *            second cell == 1: external irq number
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| 		 */
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| 		#interrupt-cells = <2>;
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| 		interrupt-controller;
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| 	};
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| 
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| 	serial0: serial@fd050020 {
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| 		device_type = "serial";
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| 		compatible = "ns16550a";
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| 		no-loopback-test;
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| 		reg = <0xfd050020 0x20>;
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| 		reg-shift = <2>;
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| 		interrupts = <0 1>; /* external irq 0 */
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| 		/* Filled in by platform_setup from FPGA register
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| 		 * clock-frequency = <100000000>;
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| 		 */
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| 	};
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| 
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| 	enet0: ethoc@fd030000 {
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| 		compatible = "opencores,ethoc";
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| 		reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
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| 		interrupts = <1 1>; /* external irq 1 */
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| 		local-mac-address = [00 50 c2 13 6f 00];
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| 	};
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| };
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