 0a80939b3e
			
		
	
	
	0a80939b3e
	
	
	
		
			
			-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJPD2aFAAoJENkgDmzRrbjxNzsQAIeYbbrXYLjr6kQzUSngj/eC FzjaTEfYTQIeuQCFJHcHthyc5lXV4sQbo3jOezW+Bp5yuDJL2aWIHesSfWZe7imu zQdM4VshOYdAmUR9Q0AW5zhB8Smbs7/AyABiF2jm4p0ZPOuyMDSlei9sjvE9Vjvt B7g5ht7L6kz0JbDnwwy0u5gs+tEitwpXYId9Y4ysZIBzIbL0qkPX8veOddGTMy0N 8xhWXaKtufpjvxFD2ORLDsw3AkoF1xXSNuFd/5nzCNpbeE7TW931jfkPoqJumuAO 7GLxcU9kKYl+IICobC6wBtsj/RrB7w+cBXMvPGwdBliam1qaRhUcJZi5FLM/Ha5d 2A9QDYNUpoXiO8JbPXrV9Z+Y0+Co8RilsQj7R/rjZh6AbbYCWt9nxzx2Svl/RfTr xfiimHuB2P3rHjOvpCXULwOOuE5c8MzPuWncpdjiD3uGXOY/aY+X1m+if/quJw9D grPlKL0+YiRakEYUeGG4M77KCqyKFZaF7L7UQPbqfZcj8V/9AW3/7U5I/B9RlAjs idsr4fcf5s0N+oKUyTCW1ncpUDQNiwbU2NyJQqeu1ZxaRGj72AgyvsaNeyIPDyK+ f6x95Bi7i8KLjXc9Z1KvJwh2Nxt25gNUiTYVha/9H2NpJGd1cfI15kTOGXrgddVv 1pvuGcJDZwYiwfiXr3FL =HHrh -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://github.com/rustyrussell/linux Autogenerated GPG tag for Rusty D1ADB8F1: 15EE 8D6C AB0E 7F0C F999 BFCB D920 0E6C D1AD B8F1 * tag 'for-linus' of git://github.com/rustyrussell/linux: module_param: check that bool parameters really are bool. intelfbdrv.c: bailearly is an int module_param paride/pcd: fix bool verbose module parameter. module_param: make bool parameters really bool (drivers & misc) module_param: make bool parameters really bool (arch) module_param: make bool parameters really bool (core code) kernel/async: remove redundant declaration. printk: fix unnecessary module_param_name. lirc_parallel: fix module parameter description. module_param: avoid bool abuse, add bint for special cases. module_param: check type correctness for module_param_array modpost: use linker section to generate table. modpost: use a table rather than a giant if/else statement. modules: sysfs - export: taint, coresize, initsize kernel/params: replace DEBUGP with pr_debug module: replace DEBUGP with pr_debug module: struct module_ref should contains long fields module: Fix performance regression on modules with large symbol tables module: Add comments describing how the "strmap" logic works Fix up conflicts in scripts/mod/file2alias.c due to the new linker- generated table approach to adding __mod_*_device_table entries. The ARM sa11x0 mcp bus needed to be converted to that too.
		
			
				
	
	
		
			487 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			487 lines
		
	
	
	
		
			11 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Renesas Solutions Highlander FPGA I2C/SMBus support.
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|  *
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|  * Supported devices: R0P7780LC0011RL, R0P7785LC0011RL
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|  *
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|  * Copyright (C) 2008  Paul Mundt
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|  * Copyright (C) 2008  Renesas Solutions Corp.
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|  * Copyright (C) 2008  Atom Create Engineering Co., Ltd.
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|  *
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|  * This file is subject to the terms and conditions of the GNU General
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|  * Public License version 2. See the file "COPYING" in the main directory
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|  * of this archive for more details.
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|  */
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| #include <linux/module.h>
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| #include <linux/init.h>
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| #include <linux/interrupt.h>
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| #include <linux/i2c.h>
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| #include <linux/platform_device.h>
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| #include <linux/completion.h>
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| #include <linux/io.h>
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| #include <linux/delay.h>
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| #include <linux/slab.h>
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| 
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| #define SMCR		0x00
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| #define SMCR_START	(1 << 0)
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| #define SMCR_IRIC	(1 << 1)
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| #define SMCR_BBSY	(1 << 2)
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| #define SMCR_ACKE	(1 << 3)
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| #define SMCR_RST	(1 << 4)
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| #define SMCR_IEIC	(1 << 6)
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| 
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| #define SMSMADR		0x02
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| 
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| #define SMMR		0x04
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| #define SMMR_MODE0	(1 << 0)
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| #define SMMR_MODE1	(1 << 1)
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| #define SMMR_CAP	(1 << 3)
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| #define SMMR_TMMD	(1 << 4)
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| #define SMMR_SP		(1 << 7)
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| 
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| #define SMSADR		0x06
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| #define SMTRDR		0x46
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| 
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| struct highlander_i2c_dev {
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| 	struct device		*dev;
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| 	void __iomem		*base;
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| 	struct i2c_adapter	adapter;
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| 	struct completion	cmd_complete;
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| 	unsigned long		last_read_time;
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| 	int			irq;
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| 	u8			*buf;
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| 	size_t			buf_len;
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| };
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| 
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| static bool iic_force_poll, iic_force_normal;
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| static int iic_timeout = 1000, iic_read_delay;
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| 
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| static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev *dev)
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| {
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| 	iowrite16(ioread16(dev->base + SMCR) | SMCR_IEIC, dev->base + SMCR);
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| }
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| 
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| static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev *dev)
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| {
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| 	iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR);
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| }
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| 
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| static inline void highlander_i2c_start(struct highlander_i2c_dev *dev)
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| {
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| 	iowrite16(ioread16(dev->base + SMCR) | SMCR_START, dev->base + SMCR);
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| }
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| 
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| static inline void highlander_i2c_done(struct highlander_i2c_dev *dev)
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| {
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| 	iowrite16(ioread16(dev->base + SMCR) | SMCR_IRIC, dev->base + SMCR);
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| }
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| 
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| static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
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| {
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| 	u16 smmr;
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| 
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| 	smmr = ioread16(dev->base + SMMR);
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| 	smmr |= SMMR_TMMD;
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| 
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| 	if (iic_force_normal)
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| 		smmr &= ~SMMR_SP;
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| 	else
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| 		smmr |= SMMR_SP;
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| 
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| 	iowrite16(smmr, dev->base + SMMR);
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| }
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| 
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| static void smbus_write_data(u8 *src, u16 *dst, int len)
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| {
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| 	for (; len > 1; len -= 2) {
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| 		*dst++ = be16_to_cpup((__be16 *)src);
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| 		src += 2;
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| 	}
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| 
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| 	if (len)
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| 		*dst = *src << 8;
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| }
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| 
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| static void smbus_read_data(u16 *src, u8 *dst, int len)
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| {
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| 	for (; len > 1; len -= 2) {
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| 		*(__be16 *)dst = cpu_to_be16p(src++);
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| 		dst += 2;
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| 	}
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| 
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| 	if (len)
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| 		*dst = *src >> 8;
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| }
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| 
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| static void highlander_i2c_command(struct highlander_i2c_dev *dev,
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| 				   u8 command, int len)
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| {
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| 	unsigned int i;
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| 	u16 cmd = (command << 8) | command;
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| 
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| 	for (i = 0; i < len; i += 2) {
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| 		if (len - i == 1)
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| 			cmd = command << 8;
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| 		iowrite16(cmd, dev->base + SMSADR + i);
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| 		dev_dbg(dev->dev, "command data[%x] 0x%04x\n", i/2, cmd);
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| 	}
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| }
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| 
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| static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev *dev)
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| {
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| 	unsigned long timeout;
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| 
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| 	timeout = jiffies + msecs_to_jiffies(iic_timeout);
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| 	while (ioread16(dev->base + SMCR) & SMCR_BBSY) {
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| 		if (time_after(jiffies, timeout)) {
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| 			dev_warn(dev->dev, "timeout waiting for bus ready\n");
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| 			return -ETIMEDOUT;
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| 		}
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| 
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| 		msleep(1);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int highlander_i2c_reset(struct highlander_i2c_dev *dev)
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| {
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| 	iowrite16(ioread16(dev->base + SMCR) | SMCR_RST, dev->base + SMCR);
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| 	return highlander_i2c_wait_for_bbsy(dev);
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| }
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| 
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| static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev *dev)
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| {
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| 	u16 tmp = ioread16(dev->base + SMCR);
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| 
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| 	if ((tmp & (SMCR_IRIC | SMCR_ACKE)) == SMCR_ACKE) {
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| 		dev_warn(dev->dev, "ack abnormality\n");
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| 		return highlander_i2c_reset(dev);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static irqreturn_t highlander_i2c_irq(int irq, void *dev_id)
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| {
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| 	struct highlander_i2c_dev *dev = dev_id;
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| 
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| 	highlander_i2c_done(dev);
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| 	complete(&dev->cmd_complete);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| static void highlander_i2c_poll(struct highlander_i2c_dev *dev)
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| {
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| 	unsigned long timeout;
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| 	u16 smcr;
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| 
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| 	timeout = jiffies + msecs_to_jiffies(iic_timeout);
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| 	for (;;) {
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| 		smcr = ioread16(dev->base + SMCR);
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| 
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| 		/*
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| 		 * Don't bother checking ACKE here, this and the reset
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| 		 * are handled in highlander_i2c_wait_xfer_done() when
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| 		 * waiting for the ACK.
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| 		 */
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| 
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| 		if (smcr & SMCR_IRIC)
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| 			return;
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| 		if (time_after(jiffies, timeout))
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| 			break;
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| 
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| 		cpu_relax();
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| 		cond_resched();
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| 	}
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| 
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| 	dev_err(dev->dev, "polling timed out\n");
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| }
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| 
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| static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev *dev)
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| {
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| 	if (dev->irq)
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| 		wait_for_completion_timeout(&dev->cmd_complete,
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| 					  msecs_to_jiffies(iic_timeout));
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| 	else
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| 		/* busy looping, the IRQ of champions */
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| 		highlander_i2c_poll(dev);
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| 
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| 	return highlander_i2c_wait_for_ack(dev);
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| }
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| 
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| static int highlander_i2c_read(struct highlander_i2c_dev *dev)
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| {
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| 	int i, cnt;
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| 	u16 data[16];
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| 
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| 	if (highlander_i2c_wait_for_bbsy(dev))
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| 		return -EAGAIN;
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| 
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| 	highlander_i2c_start(dev);
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| 
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| 	if (highlander_i2c_wait_xfer_done(dev)) {
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| 		dev_err(dev->dev, "Arbitration loss\n");
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| 		return -EAGAIN;
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| 	}
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| 
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| 	/*
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| 	 * The R0P7780LC0011RL FPGA needs a significant delay between
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| 	 * data read cycles, otherwise the transceiver gets confused and
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| 	 * garbage is returned when the read is subsequently aborted.
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| 	 *
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| 	 * It is not sufficient to wait for BBSY.
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| 	 *
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| 	 * While this generally only applies to the older SH7780-based
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| 	 * Highlanders, the same issue can be observed on SH7785 ones,
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| 	 * albeit less frequently. SH7780-based Highlanders may need
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| 	 * this to be as high as 1000 ms.
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| 	 */
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| 	if (iic_read_delay && time_before(jiffies, dev->last_read_time +
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| 				 msecs_to_jiffies(iic_read_delay)))
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| 		msleep(jiffies_to_msecs((dev->last_read_time +
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| 				msecs_to_jiffies(iic_read_delay)) - jiffies));
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| 
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| 	cnt = (dev->buf_len + 1) >> 1;
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| 	for (i = 0; i < cnt; i++) {
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| 		data[i] = ioread16(dev->base + SMTRDR + (i * sizeof(u16)));
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| 		dev_dbg(dev->dev, "read data[%x] 0x%04x\n", i, data[i]);
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| 	}
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| 
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| 	smbus_read_data(data, dev->buf, dev->buf_len);
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| 
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| 	dev->last_read_time = jiffies;
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| 
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| 	return 0;
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| }
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| 
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| static int highlander_i2c_write(struct highlander_i2c_dev *dev)
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| {
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| 	int i, cnt;
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| 	u16 data[16];
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| 
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| 	smbus_write_data(dev->buf, data, dev->buf_len);
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| 
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| 	cnt = (dev->buf_len + 1) >> 1;
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| 	for (i = 0; i < cnt; i++) {
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| 		iowrite16(data[i], dev->base + SMTRDR + (i * sizeof(u16)));
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| 		dev_dbg(dev->dev, "write data[%x] 0x%04x\n", i, data[i]);
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| 	}
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| 
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| 	if (highlander_i2c_wait_for_bbsy(dev))
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| 		return -EAGAIN;
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| 
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| 	highlander_i2c_start(dev);
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| 
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| 	return highlander_i2c_wait_xfer_done(dev);
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| }
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| 
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| static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
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| 				  unsigned short flags, char read_write,
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| 				  u8 command, int size,
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| 				  union i2c_smbus_data *data)
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| {
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| 	struct highlander_i2c_dev *dev = i2c_get_adapdata(adap);
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| 	u16 tmp;
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| 
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| 	init_completion(&dev->cmd_complete);
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| 
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| 	dev_dbg(dev->dev, "addr %04x, command %02x, read_write %d, size %d\n",
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| 		addr, command, read_write, size);
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| 
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| 	/*
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| 	 * Set up the buffer and transfer size
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| 	 */
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| 	switch (size) {
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| 	case I2C_SMBUS_BYTE_DATA:
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| 		dev->buf = &data->byte;
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| 		dev->buf_len = 1;
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| 		break;
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| 	case I2C_SMBUS_I2C_BLOCK_DATA:
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| 		dev->buf = &data->block[1];
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| 		dev->buf_len = data->block[0];
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| 		break;
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| 	default:
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| 		dev_err(dev->dev, "unsupported command %d\n", size);
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| 		return -EINVAL;
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| 	}
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| 
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| 	/*
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| 	 * Encode the mode setting
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| 	 */
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| 	tmp = ioread16(dev->base + SMMR);
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| 	tmp &= ~(SMMR_MODE0 | SMMR_MODE1);
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| 
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| 	switch (dev->buf_len) {
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| 	case 1:
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| 		/* default */
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| 		break;
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| 	case 8:
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| 		tmp |= SMMR_MODE0;
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| 		break;
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| 	case 16:
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| 		tmp |= SMMR_MODE1;
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| 		break;
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| 	case 32:
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| 		tmp |= (SMMR_MODE0 | SMMR_MODE1);
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| 		break;
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| 	default:
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| 		dev_err(dev->dev, "unsupported xfer size %d\n", dev->buf_len);
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| 		return -EINVAL;
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| 	}
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| 
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| 	iowrite16(tmp, dev->base + SMMR);
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| 
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| 	/* Ensure we're in a sane state */
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| 	highlander_i2c_done(dev);
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| 
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| 	/* Set slave address */
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| 	iowrite16((addr << 1) | read_write, dev->base + SMSMADR);
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| 
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| 	highlander_i2c_command(dev, command, dev->buf_len);
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| 
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| 	if (read_write == I2C_SMBUS_READ)
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| 		return highlander_i2c_read(dev);
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| 	else
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| 		return highlander_i2c_write(dev);
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| }
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| 
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| static u32 highlander_i2c_func(struct i2c_adapter *adapter)
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| {
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| 	return I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK;
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| }
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| 
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| static const struct i2c_algorithm highlander_i2c_algo = {
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| 	.smbus_xfer	= highlander_i2c_smbus_xfer,
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| 	.functionality	= highlander_i2c_func,
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| };
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| 
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| static int __devinit highlander_i2c_probe(struct platform_device *pdev)
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| {
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| 	struct highlander_i2c_dev *dev;
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| 	struct i2c_adapter *adap;
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| 	struct resource *res;
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| 	int ret;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	if (unlikely(!res)) {
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| 		dev_err(&pdev->dev, "no mem resource\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	dev = kzalloc(sizeof(struct highlander_i2c_dev), GFP_KERNEL);
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| 	if (unlikely(!dev))
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| 		return -ENOMEM;
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| 
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| 	dev->base = ioremap_nocache(res->start, resource_size(res));
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| 	if (unlikely(!dev->base)) {
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| 		ret = -ENXIO;
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| 		goto err;
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| 	}
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| 
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| 	dev->dev = &pdev->dev;
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| 	platform_set_drvdata(pdev, dev);
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| 
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| 	dev->irq = platform_get_irq(pdev, 0);
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| 	if (iic_force_poll)
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| 		dev->irq = 0;
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| 
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| 	if (dev->irq) {
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| 		ret = request_irq(dev->irq, highlander_i2c_irq, 0,
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| 				  pdev->name, dev);
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| 		if (unlikely(ret))
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| 			goto err_unmap;
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| 
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| 		highlander_i2c_irq_enable(dev);
 | |
| 	} else {
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| 		dev_notice(&pdev->dev, "no IRQ, using polling mode\n");
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| 		highlander_i2c_irq_disable(dev);
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| 	}
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| 
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| 	dev->last_read_time = jiffies;	/* initial read jiffies */
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| 
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| 	highlander_i2c_setup(dev);
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| 
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| 	adap = &dev->adapter;
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| 	i2c_set_adapdata(adap, dev);
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| 	adap->owner = THIS_MODULE;
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| 	adap->class = I2C_CLASS_HWMON;
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| 	strlcpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name));
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| 	adap->algo = &highlander_i2c_algo;
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| 	adap->dev.parent = &pdev->dev;
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| 	adap->nr = pdev->id;
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| 
 | |
| 	/*
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| 	 * Reset the adapter
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| 	 */
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| 	ret = highlander_i2c_reset(dev);
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| 	if (unlikely(ret)) {
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| 		dev_err(&pdev->dev, "controller didn't come up\n");
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| 		goto err_free_irq;
 | |
| 	}
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| 
 | |
| 	ret = i2c_add_numbered_adapter(adap);
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| 	if (unlikely(ret)) {
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| 		dev_err(&pdev->dev, "failure adding adapter\n");
 | |
| 		goto err_free_irq;
 | |
| 	}
 | |
| 
 | |
| 	return 0;
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| 
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| err_free_irq:
 | |
| 	if (dev->irq)
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| 		free_irq(dev->irq, dev);
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| err_unmap:
 | |
| 	iounmap(dev->base);
 | |
| err:
 | |
| 	kfree(dev);
 | |
| 
 | |
| 	platform_set_drvdata(pdev, NULL);
 | |
| 
 | |
| 	return ret;
 | |
| }
 | |
| 
 | |
| static int __devexit highlander_i2c_remove(struct platform_device *pdev)
 | |
| {
 | |
| 	struct highlander_i2c_dev *dev = platform_get_drvdata(pdev);
 | |
| 
 | |
| 	i2c_del_adapter(&dev->adapter);
 | |
| 
 | |
| 	if (dev->irq)
 | |
| 		free_irq(dev->irq, dev);
 | |
| 
 | |
| 	iounmap(dev->base);
 | |
| 	kfree(dev);
 | |
| 
 | |
| 	platform_set_drvdata(pdev, NULL);
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| static struct platform_driver highlander_i2c_driver = {
 | |
| 	.driver		= {
 | |
| 		.name	= "i2c-highlander",
 | |
| 		.owner	= THIS_MODULE,
 | |
| 	},
 | |
| 
 | |
| 	.probe		= highlander_i2c_probe,
 | |
| 	.remove		= __devexit_p(highlander_i2c_remove),
 | |
| };
 | |
| 
 | |
| module_platform_driver(highlander_i2c_driver);
 | |
| 
 | |
| MODULE_AUTHOR("Paul Mundt");
 | |
| MODULE_DESCRIPTION("Renesas Highlander FPGA I2C/SMBus adapter");
 | |
| MODULE_LICENSE("GPL v2");
 | |
| 
 | |
| module_param(iic_force_poll, bool, 0);
 | |
| module_param(iic_force_normal, bool, 0);
 | |
| module_param(iic_timeout, int, 0);
 | |
| module_param(iic_read_delay, int, 0);
 | |
| 
 | |
| MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
 | |
| MODULE_PARM_DESC(iic_force_normal,
 | |
| 		 "Force normal mode (100 kHz), default is fast mode (400 kHz)");
 | |
| MODULE_PARM_DESC(iic_timeout, "Set timeout value in msecs (default 1000 ms)");
 | |
| MODULE_PARM_DESC(iic_read_delay,
 | |
| 		 "Delay between data read cycles (default 0 ms)");
 |