b6354db5bb
For MIPS R2, use the EI and DI instructions to enable and disable interrupts. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
92 lines
1.8 KiB
C
92 lines
1.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 Ralf Baechle
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*/
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#ifndef _ASM_ASMMACRO_H
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#define _ASM_ASMMACRO_H
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#include <asm/hazards.h>
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#ifdef CONFIG_32BIT
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#include <asm/asmmacro-32.h>
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#endif
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#ifdef CONFIG_64BIT
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#include <asm/asmmacro-64.h>
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#endif
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#ifdef CONFIG_MIPS_MT_SMTC
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#include <asm/mipsmtregs.h>
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#endif
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#ifdef CONFIG_MIPS_MT_SMTC
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.macro local_irq_enable reg=t0
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mfc0 \reg, CP0_TCSTATUS
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ori \reg, \reg, TCSTATUS_IXMT
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xori \reg, \reg, TCSTATUS_IXMT
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mtc0 \reg, CP0_TCSTATUS
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_ehb
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.endm
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.macro local_irq_disable reg=t0
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mfc0 \reg, CP0_TCSTATUS
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ori \reg, \reg, TCSTATUS_IXMT
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mtc0 \reg, CP0_TCSTATUS
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_ehb
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.endm
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#elif defined(CONFIG_CPU_MIPSR2)
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.macro local_irq_enable reg=t0
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ei
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irq_enable_hazard
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.endm
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.macro local_irq_disable reg=t0
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di
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irq_disable_hazard
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.endm
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#else
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.macro local_irq_enable reg=t0
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mfc0 \reg, CP0_STATUS
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ori \reg, \reg, 1
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mtc0 \reg, CP0_STATUS
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irq_enable_hazard
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.endm
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.macro local_irq_disable reg=t0
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mfc0 \reg, CP0_STATUS
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ori \reg, \reg, 1
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xori \reg, \reg, 1
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mtc0 \reg, CP0_STATUS
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irq_disable_hazard
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.endm
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#endif /* CONFIG_MIPS_MT_SMTC */
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/*
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* Temporary until all gas have MT ASE support
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*/
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.macro DMT reg=0
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.word 0x41600bc1 | (\reg << 16)
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.endm
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.macro EMT reg=0
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.word 0x41600be1 | (\reg << 16)
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.endm
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.macro DVPE reg=0
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.word 0x41600001 | (\reg << 16)
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.endm
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.macro EVPE reg=0
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.word 0x41600021 | (\reg << 16)
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.endm
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.macro MFTR rt=0, rd=0, u=0, sel=0
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.word 0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
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.endm
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.macro MTTR rt=0, rd=0, u=0, sel=0
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.word 0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
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.endm
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#endif /* _ASM_ASMMACRO_H */
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