86e32fdce7
mtocrf define is just a wrapper around the real instructions so we can just use real register names here (ie. lower case). Also remove braces in macro so this is possible. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
203 lines
3.6 KiB
ArmAsm
203 lines
3.6 KiB
ArmAsm
/*
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* Copyright (C) 2002 Paul Mackerras, IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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.align 7
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_GLOBAL(memcpy)
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BEGIN_FTR_SECTION
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std r3,48(r1) /* save destination pointer for return value */
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FTR_SECTION_ELSE
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b memcpy_power7
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ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
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PPC_MTOCRF(0x01,r5)
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cmpldi cr1,r5,16
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neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry
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andi. r6,r6,7
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dcbt 0,r4
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blt cr1,.Lshort_copy
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/* Below we want to nop out the bne if we're on a CPU that has the
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CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
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cleared.
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At the time of writing the only CPU that has this combination of bits
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set is Power6. */
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BEGIN_FTR_SECTION
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nop
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FTR_SECTION_ELSE
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bne .Ldst_unaligned
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ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
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CPU_FTR_UNALIGNED_LD_STD)
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.Ldst_aligned:
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addi r3,r3,-16
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BEGIN_FTR_SECTION
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andi. r0,r4,7
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bne .Lsrc_unaligned
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END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
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srdi r7,r5,4
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ld r9,0(r4)
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addi r4,r4,-8
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mtctr r7
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andi. r5,r5,7
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bf cr7*4+0,2f
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addi r3,r3,8
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addi r4,r4,8
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mr r8,r9
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blt cr1,3f
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1: ld r9,8(r4)
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std r8,8(r3)
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2: ldu r8,16(r4)
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stdu r9,16(r3)
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bdnz 1b
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3: std r8,8(r3)
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beq 3f
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addi r3,r3,16
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.Ldo_tail:
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bf cr7*4+1,1f
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lwz r9,8(r4)
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addi r4,r4,4
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stw r9,0(r3)
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addi r3,r3,4
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1: bf cr7*4+2,2f
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lhz r9,8(r4)
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addi r4,r4,2
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sth r9,0(r3)
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addi r3,r3,2
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2: bf cr7*4+3,3f
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lbz r9,8(r4)
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stb r9,0(r3)
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3: ld r3,48(r1) /* return dest pointer */
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blr
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.Lsrc_unaligned:
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srdi r6,r5,3
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addi r5,r5,-16
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subf r4,r0,r4
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srdi r7,r5,4
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sldi r10,r0,3
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cmpdi cr6,r6,3
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andi. r5,r5,7
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mtctr r7
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subfic r11,r10,64
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add r5,r5,r0
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bt cr7*4+0,0f
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ld r9,0(r4) # 3+2n loads, 2+2n stores
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ld r0,8(r4)
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sld r6,r9,r10
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ldu r9,16(r4)
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srd r7,r0,r11
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sld r8,r0,r10
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or r7,r7,r6
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blt cr6,4f
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ld r0,8(r4)
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# s1<< in r8, d0=(s0<<|s1>>) in r7, s3 in r0, s2 in r9, nix in r6 & r12
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b 2f
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0: ld r0,0(r4) # 4+2n loads, 3+2n stores
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ldu r9,8(r4)
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sld r8,r0,r10
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addi r3,r3,-8
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blt cr6,5f
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ld r0,8(r4)
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srd r12,r9,r11
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sld r6,r9,r10
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ldu r9,16(r4)
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or r12,r8,r12
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srd r7,r0,r11
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sld r8,r0,r10
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addi r3,r3,16
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beq cr6,3f
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# d0=(s0<<|s1>>) in r12, s1<< in r6, s2>> in r7, s2<< in r8, s3 in r9
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1: or r7,r7,r6
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ld r0,8(r4)
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std r12,8(r3)
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2: srd r12,r9,r11
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sld r6,r9,r10
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ldu r9,16(r4)
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or r12,r8,r12
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stdu r7,16(r3)
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srd r7,r0,r11
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sld r8,r0,r10
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bdnz 1b
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3: std r12,8(r3)
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or r7,r7,r6
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4: std r7,16(r3)
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5: srd r12,r9,r11
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or r12,r8,r12
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std r12,24(r3)
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beq 4f
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cmpwi cr1,r5,8
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addi r3,r3,32
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sld r9,r9,r10
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ble cr1,6f
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ld r0,8(r4)
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srd r7,r0,r11
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or r9,r7,r9
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6:
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bf cr7*4+1,1f
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rotldi r9,r9,32
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stw r9,0(r3)
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addi r3,r3,4
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1: bf cr7*4+2,2f
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rotldi r9,r9,16
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sth r9,0(r3)
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addi r3,r3,2
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2: bf cr7*4+3,3f
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rotldi r9,r9,8
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stb r9,0(r3)
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3: ld r3,48(r1) /* return dest pointer */
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blr
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.Ldst_unaligned:
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PPC_MTOCRF(0x01,r6) # put #bytes to 8B bdry into cr7
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subf r5,r6,r5
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li r7,0
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cmpldi cr1,r5,16
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bf cr7*4+3,1f
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lbz r0,0(r4)
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stb r0,0(r3)
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addi r7,r7,1
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1: bf cr7*4+2,2f
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lhzx r0,r7,r4
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sthx r0,r7,r3
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addi r7,r7,2
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2: bf cr7*4+1,3f
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lwzx r0,r7,r4
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stwx r0,r7,r3
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3: PPC_MTOCRF(0x01,r5)
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add r4,r6,r4
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add r3,r6,r3
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b .Ldst_aligned
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.Lshort_copy:
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bf cr7*4+0,1f
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lwz r0,0(r4)
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lwz r9,4(r4)
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addi r4,r4,8
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stw r0,0(r3)
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stw r9,4(r3)
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addi r3,r3,8
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1: bf cr7*4+1,2f
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lwz r0,0(r4)
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addi r4,r4,4
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stw r0,0(r3)
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addi r3,r3,4
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2: bf cr7*4+2,3f
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lhz r0,0(r4)
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addi r4,r4,2
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sth r0,0(r3)
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addi r3,r3,2
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3: bf cr7*4+3,4f
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lbz r0,0(r4)
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stb r0,0(r3)
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4: ld r3,48(r1) /* return dest pointer */
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blr
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