Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
		
			
				
	
	
		
			91 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			91 lines
		
	
	
	
		
			2.3 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2001, 2002, MontaVista Software Inc.
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 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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 * Copyright (c) 2003  Maciej W. Rozycki
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 *
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 * include/asm-mips/time.h
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 *     header file for the new style time.c file and time services.
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 *
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 * This program is free software; you can redistribute	it and/or modify it
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 * under  the terms of	the GNU General	 Public License as published by the
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 * Free Software Foundation;  either version 2 of the  License, or (at your
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 * option) any later version.
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 */
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#ifndef _ASM_TIME_H
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#define _ASM_TIME_H
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#include <linux/rtc.h>
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#include <linux/spinlock.h>
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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extern spinlock_t rtc_lock;
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/*
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 * RTC ops.  By default, they point to weak no-op RTC functions.
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 *	rtc_mips_set_time - reverse the above translation and set time to RTC.
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 *	rtc_mips_set_mmss - similar to rtc_set_time, but only min and sec need
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 *			to be set.  Used by RTC sync-up.
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 */
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extern int rtc_mips_set_time(unsigned long);
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extern int rtc_mips_set_mmss(unsigned long);
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/*
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 * board specific routines required by time_init().
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 */
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extern void plat_time_init(void);
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/*
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 * mips_hpt_frequency - must be set if you intend to use an R4k-compatible
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 * counter as a timer interrupt source.
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 */
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extern unsigned int mips_hpt_frequency;
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/*
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 * The performance counter IRQ on MIPS is a close relative to the timer IRQ
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 * so it lives here.
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 */
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extern int (*perf_irq)(void);
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/*
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 * Initialize the calling CPU's compare interrupt as clockevent device
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 */
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extern unsigned int __weak get_c0_compare_int(void);
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extern int r4k_clockevent_init(void);
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extern int smtc_clockevent_init(void);
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extern int gic_clockevent_init(void);
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static inline int mips_clockevent_init(void)
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{
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#ifdef CONFIG_MIPS_MT_SMTC
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	return smtc_clockevent_init();
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#elif defined(CONFIG_CEVT_GIC)
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	return (gic_clockevent_init() | r4k_clockevent_init());
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#elif defined(CONFIG_CEVT_R4K)
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	return r4k_clockevent_init();
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#else
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	return -ENXIO;
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#endif
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}
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/*
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 * Initialize the count register as a clocksource
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 */
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extern int init_r4k_clocksource(void);
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static inline int init_mips_clocksource(void)
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{
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#if defined(CONFIG_CSRC_R4K) && !defined(CONFIG_CSRC_GIC)
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	return init_r4k_clocksource();
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#else
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	return 0;
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#endif
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}
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static inline void clockevent_set_clock(struct clock_event_device *cd,
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					unsigned int clock)
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{
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	clockevents_calc_mult_shift(cd, clock, 4);
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}
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#endif /* _ASM_TIME_H */
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