This patch adds the new driver for CSR SiRF SoCs: SiRFprimaII: unicore ARM Cortex-A9 SiRFatlas6: unicore ARM Cortex-A9 SiRFmarco: dual core ARM Cortex-A9 SMP Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Bin Shi <Bin.Shi@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Ball <cjb@laptop.org>
		
			
				
	
	
		
			193 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			193 lines
		
	
	
	
		
			4.4 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * SDHCI support for SiRF primaII and marco SoCs
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 *
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 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
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 *
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 * Licensed under GPLv2 or later.
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 */
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/mmc/host.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/pinctrl/consumer.h>
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#include "sdhci-pltfm.h"
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struct sdhci_sirf_priv {
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	struct clk *clk;
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	int gpio_cd;
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};
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static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host)
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{
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	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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	struct sdhci_sirf_priv *priv = pltfm_host->priv;
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	return clk_get_rate(priv->clk);
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}
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static struct sdhci_ops sdhci_sirf_ops = {
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	.get_max_clock	= sdhci_sirf_get_max_clk,
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};
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static struct sdhci_pltfm_data sdhci_sirf_pdata = {
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	.ops = &sdhci_sirf_ops,
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	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
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		SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
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		SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
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		SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
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		SDHCI_QUIRK_DELAY_AFTER_POWER,
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};
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static int sdhci_sirf_probe(struct platform_device *pdev)
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{
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	struct sdhci_host *host;
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	struct sdhci_pltfm_host *pltfm_host;
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	struct sdhci_sirf_priv *priv;
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	struct pinctrl *pinctrl;
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	int ret;
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	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
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	if (IS_ERR(pinctrl)) {
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		dev_err(&pdev->dev, "unable to get pinmux");
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		return PTR_ERR(pinctrl);
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	}
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	priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_sirf_priv),
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		GFP_KERNEL);
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	if (!priv) {
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		dev_err(&pdev->dev, "unable to allocate private data");
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		return -ENOMEM;
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	}
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	priv->clk = devm_clk_get(&pdev->dev, NULL);
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	if (IS_ERR(priv->clk)) {
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		dev_err(&pdev->dev, "unable to get clock");
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		return PTR_ERR(priv->clk);
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	}
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	if (pdev->dev.of_node) {
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		priv->gpio_cd = of_get_named_gpio(pdev->dev.of_node,
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			"cd-gpios", 0);
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	} else {
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		priv->gpio_cd = -EINVAL;
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	}
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	host = sdhci_pltfm_init(pdev, &sdhci_sirf_pdata);
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	if (IS_ERR(host)) {
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		ret = PTR_ERR(host);
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		goto err_sdhci_pltfm_init;
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	}
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	pltfm_host = sdhci_priv(host);
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	pltfm_host->priv = priv;
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	sdhci_get_of_property(pdev);
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	clk_prepare_enable(priv->clk);
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	ret = sdhci_add_host(host);
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	if (ret)
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		goto err_sdhci_add;
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	/*
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	 * We must request the IRQ after sdhci_add_host(), as the tasklet only
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	 * gets setup in sdhci_add_host() and we oops.
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	 */
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	if (gpio_is_valid(priv->gpio_cd)) {
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		ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd);
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		if (ret) {
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			dev_err(&pdev->dev, "card detect irq request failed: %d\n",
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				ret);
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			goto err_request_cd;
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		}
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	}
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	return 0;
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err_request_cd:
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	sdhci_remove_host(host, 0);
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err_sdhci_add:
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	clk_disable_unprepare(priv->clk);
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	sdhci_pltfm_free(pdev);
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err_sdhci_pltfm_init:
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	return ret;
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}
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static int sdhci_sirf_remove(struct platform_device *pdev)
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{
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	struct sdhci_host *host = platform_get_drvdata(pdev);
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	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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	struct sdhci_sirf_priv *priv = pltfm_host->priv;
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	sdhci_pltfm_unregister(pdev);
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	if (gpio_is_valid(priv->gpio_cd))
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		mmc_gpio_free_cd(host->mmc);
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	clk_disable_unprepare(priv->clk);
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	return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int sdhci_sirf_suspend(struct device *dev)
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{
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	struct sdhci_host *host = dev_get_drvdata(dev);
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	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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	struct sdhci_sirf_priv *priv = pltfm_host->priv;
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	int ret;
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	ret = sdhci_suspend_host(host);
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	if (ret)
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		return ret;
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	clk_disable(priv->clk);
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	return 0;
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}
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static int sdhci_sirf_resume(struct device *dev)
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{
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	struct sdhci_host *host = dev_get_drvdata(dev);
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	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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	struct sdhci_sirf_priv *priv = pltfm_host->priv;
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	int ret;
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	ret = clk_enable(priv->clk);
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	if (ret) {
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		dev_dbg(dev, "Resume: Error enabling clock\n");
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		return ret;
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	}
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	return sdhci_resume_host(host);
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}
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static SIMPLE_DEV_PM_OPS(sdhci_sirf_pm_ops, sdhci_sirf_suspend, sdhci_sirf_resume);
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#endif
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static const struct of_device_id sdhci_sirf_of_match[] = {
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	{ .compatible = "sirf,prima2-sdhc" },
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	{ }
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};
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MODULE_DEVICE_TABLE(of, sdhci_sirf_of_match);
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static struct platform_driver sdhci_sirf_driver = {
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	.driver		= {
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		.name	= "sdhci-sirf",
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		.owner	= THIS_MODULE,
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		.of_match_table = sdhci_sirf_of_match,
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#ifdef CONFIG_PM_SLEEP
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		.pm	= &sdhci_sirf_pm_ops,
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#endif
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	},
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	.probe		= sdhci_sirf_probe,
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	.remove		= sdhci_sirf_remove,
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};
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module_platform_driver(sdhci_sirf_driver);
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MODULE_DESCRIPTION("SDHCI driver for SiRFprimaII/SiRFmarco");
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MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
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MODULE_LICENSE("GPL v2");
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