ce433f8090
Recent compilers warn about accesses to arrays past the end, which is supported for pt_regs and sigcontext with the intended alias past the end of regs[] to sp, tp, and lr using TREG_SP, TREG_TP, and TREG_LR. Make the intended usage explict by providing an anonymous union of regs[56] on the one hand, and a short __regs[53] on the other followed by the sp, tp, and lr fields, so the aliasing is done explicitly and is visible to the compiler. Reviewed-by: Jeff Epler <jepler@unpythonic.net> Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
98 lines
3.1 KiB
C
98 lines
3.1 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _UAPI_ASM_TILE_PTRACE_H
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#define _UAPI_ASM_TILE_PTRACE_H
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#include <arch/chip.h>
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#include <arch/abi.h>
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/* These must match struct pt_regs, below. */
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#if CHIP_WORD_SIZE() == 32
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#define PTREGS_OFFSET_REG(n) ((n)*4)
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#else
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#define PTREGS_OFFSET_REG(n) ((n)*8)
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#endif
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#define PTREGS_OFFSET_BASE 0
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#define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
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#define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
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#define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
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#define PTREGS_NR_GPRS 56
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#define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
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#define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
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#define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
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#define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
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#define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
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#if CHIP_HAS_CMPEXCH()
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#define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
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#endif
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#define PTREGS_SIZE PTREGS_OFFSET_REG(64)
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#ifndef __ASSEMBLY__
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#ifndef __KERNEL__
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/* Provide appropriate length type to userspace regardless of -m32/-m64. */
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typedef uint_reg_t pt_reg_t;
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#endif
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/*
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* This struct defines the way the registers are stored on the stack during a
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* system call or exception. "struct sigcontext" has the same shape.
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*/
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struct pt_regs {
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union {
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/* Saved main processor registers; 56..63 are special. */
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pt_reg_t regs[56];
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struct {
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pt_reg_t __regs[53];
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pt_reg_t tp; /* aliases regs[TREG_TP] */
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pt_reg_t sp; /* aliases regs[TREG_SP] */
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pt_reg_t lr; /* aliases regs[TREG_LR] */
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};
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};
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/* Saved special registers. */
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pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
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pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
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pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
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pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
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pt_reg_t flags; /* flags (see below) */
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#if !CHIP_HAS_CMPEXCH()
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pt_reg_t pad[3];
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#else
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pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
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pt_reg_t pad[2];
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#endif
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};
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#endif /* __ASSEMBLY__ */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* Support TILE-specific ptrace options, with events starting at 16. */
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#define PTRACE_EVENT_MIGRATE 16
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#define PTRACE_O_TRACEMIGRATE (1 << PTRACE_EVENT_MIGRATE)
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/*
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* Flag bits in pt_regs.flags that are part of the ptrace API.
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* We start our numbering higher up to avoid confusion with the
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* non-ABI kernel-internal values that use the low 16 bits.
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*/
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#define PT_FLAGS_COMPAT 0x10000 /* process is an -m32 compat process */
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#endif /* _UAPI_ASM_TILE_PTRACE_H */
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