e839ca5287
Disintegrate asm/system.h for SH. Signed-off-by: David Howells <dhowells@redhat.com> cc: linux-sh@vger.kernel.org
84 lines
1.9 KiB
C
84 lines
1.9 KiB
C
/*
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* arch/sh/kernel/cpu/irq/imask.c
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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*
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* Simple interrupt handling using IMASK of SR register.
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*
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*/
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/* NOTE: Will not work on level 15 */
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/spinlock.h>
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#include <linux/cache.h>
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#include <linux/irq.h>
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#include <linux/bitmap.h>
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#include <asm/irq.h>
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/* Bitmap of IRQ masked */
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#define IMASK_PRIORITY 15
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static DECLARE_BITMAP(imask_mask, IMASK_PRIORITY);
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static int interrupt_priority;
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static inline void set_interrupt_registers(int ip)
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{
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unsigned long __dummy;
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asm volatile(
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#ifdef CONFIG_CPU_HAS_SR_RB
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"ldc %2, r6_bank\n\t"
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#endif
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"stc sr, %0\n\t"
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"and #0xf0, %0\n\t"
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"shlr2 %0\n\t"
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"cmp/eq #0x3c, %0\n\t"
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"bt/s 1f ! CLI-ed\n\t"
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" stc sr, %0\n\t"
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"and %1, %0\n\t"
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"or %2, %0\n\t"
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"ldc %0, sr\n"
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"1:"
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: "=&z" (__dummy)
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: "r" (~0xf0), "r" (ip << 4)
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: "t");
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}
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static void mask_imask_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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clear_bit(irq, imask_mask);
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if (interrupt_priority < IMASK_PRIORITY - irq)
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interrupt_priority = IMASK_PRIORITY - irq;
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set_interrupt_registers(interrupt_priority);
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}
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static void unmask_imask_irq(struct irq_data *data)
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{
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unsigned int irq = data->irq;
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set_bit(irq, imask_mask);
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interrupt_priority = IMASK_PRIORITY -
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find_first_zero_bit(imask_mask, IMASK_PRIORITY);
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set_interrupt_registers(interrupt_priority);
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}
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static struct irq_chip imask_irq_chip = {
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.name = "SR.IMASK",
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.irq_mask = mask_imask_irq,
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.irq_unmask = unmask_imask_irq,
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.irq_mask_ack = mask_imask_irq,
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};
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void make_imask_irq(unsigned int irq)
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{
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irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq,
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"level");
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}
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