Fix a regression introduced by commit 35f6f45 ("net/mlx4_en: Don't use
irq_affinity_notifier to track changes in IRQ affinity map").
When core is started in legacy EQ's (number of IRQ's < rx rings), cq->irq_desc
was NULL.  This caused a kernel crash under heavy traffic - when having more
than rx NAPI budget completions.
Fixed to have it set for both EQ modes.
Signed-off-by: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
		
	
			
		
			
				
	
	
		
			232 lines
		
	
	
	
		
			6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			232 lines
		
	
	
	
		
			6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
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 *
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 * This software is available to you under a choice of one of two
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 * licenses.  You may choose to be licensed under the terms of the GNU
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 * General Public License (GPL) Version 2, available from the file
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 * COPYING in the main directory of this source tree, or the
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 * OpenIB.org BSD license below:
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 *
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 *     Redistribution and use in source and binary forms, with or
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 *     without modification, are permitted provided that the following
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 *     conditions are met:
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 *
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 *      - Redistributions of source code must retain the above
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 *        copyright notice, this list of conditions and the following
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 *        disclaimer.
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 *
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 *      - Redistributions in binary form must reproduce the above
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 *        copyright notice, this list of conditions and the following
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 *        disclaimer in the documentation and/or other materials
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 *        provided with the distribution.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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 * SOFTWARE.
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 *
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 */
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#include <linux/mlx4/cq.h>
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#include <linux/mlx4/qp.h>
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#include <linux/mlx4/cmd.h>
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#include "mlx4_en.h"
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static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
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{
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	return;
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}
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int mlx4_en_create_cq(struct mlx4_en_priv *priv,
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		      struct mlx4_en_cq **pcq,
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		      int entries, int ring, enum cq_type mode,
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		      int node)
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{
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	struct mlx4_en_dev *mdev = priv->mdev;
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	struct mlx4_en_cq *cq;
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	int err;
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	cq = kzalloc_node(sizeof(*cq), GFP_KERNEL, node);
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	if (!cq) {
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		cq = kzalloc(sizeof(*cq), GFP_KERNEL);
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		if (!cq) {
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			en_err(priv, "Failed to allocate CQ structure\n");
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			return -ENOMEM;
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		}
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	}
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	cq->size = entries;
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	cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
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	cq->ring = ring;
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	cq->is_tx = mode;
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	/* Allocate HW buffers on provided NUMA node.
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	 * dev->numa_node is used in mtt range allocation flow.
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	 */
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	set_dev_node(&mdev->dev->pdev->dev, node);
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	err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
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				cq->buf_size, 2 * PAGE_SIZE);
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	set_dev_node(&mdev->dev->pdev->dev, mdev->dev->numa_node);
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	if (err)
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		goto err_cq;
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	err = mlx4_en_map_buffer(&cq->wqres.buf);
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	if (err)
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		goto err_res;
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	cq->buf = (struct mlx4_cqe *)cq->wqres.buf.direct.buf;
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	*pcq = cq;
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	return 0;
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err_res:
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	mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
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err_cq:
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	kfree(cq);
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	*pcq = NULL;
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	return err;
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}
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int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
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			int cq_idx)
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{
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	struct mlx4_en_dev *mdev = priv->mdev;
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	int err = 0;
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	char name[25];
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	int timestamp_en = 0;
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	struct cpu_rmap *rmap =
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#ifdef CONFIG_RFS_ACCEL
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		priv->dev->rx_cpu_rmap;
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#else
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		NULL;
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#endif
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	cq->dev = mdev->pndev[priv->port];
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	cq->mcq.set_ci_db  = cq->wqres.db.db;
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	cq->mcq.arm_db     = cq->wqres.db.db + 1;
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	*cq->mcq.set_ci_db = 0;
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	*cq->mcq.arm_db    = 0;
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	memset(cq->buf, 0, cq->buf_size);
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	if (cq->is_tx == RX) {
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		if (mdev->dev->caps.comp_pool) {
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			if (!cq->vector) {
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				sprintf(name, "%s-%d", priv->dev->name,
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					cq->ring);
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				/* Set IRQ for specific name (per ring) */
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				if (mlx4_assign_eq(mdev->dev, name, rmap,
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						   &cq->vector)) {
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					cq->vector = (cq->ring + 1 + priv->port)
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					    % mdev->dev->caps.num_comp_vectors;
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					mlx4_warn(mdev, "Failed assigning an EQ to %s, falling back to legacy EQ's\n",
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						  name);
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				}
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			}
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		} else {
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			cq->vector = (cq->ring + 1 + priv->port) %
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				mdev->dev->caps.num_comp_vectors;
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		}
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		cq->irq_desc =
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			irq_to_desc(mlx4_eq_get_irq(mdev->dev,
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						    cq->vector));
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	} else {
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		/* For TX we use the same irq per
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		ring we assigned for the RX    */
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		struct mlx4_en_cq *rx_cq;
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		cq_idx = cq_idx % priv->rx_ring_num;
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		rx_cq = priv->rx_cq[cq_idx];
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		cq->vector = rx_cq->vector;
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	}
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	if (!cq->is_tx)
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		cq->size = priv->rx_ring[cq->ring]->actual_size;
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	if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
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	    (!cq->is_tx && priv->hwtstamp_config.rx_filter))
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		timestamp_en = 1;
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	err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
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			    &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
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			    cq->vector, 0, timestamp_en);
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	if (err)
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		return err;
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	cq->mcq.comp  = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;
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	cq->mcq.event = mlx4_en_cq_event;
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	if (cq->is_tx) {
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		netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_tx_cq,
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			       NAPI_POLL_WEIGHT);
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	} else {
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		struct mlx4_en_rx_ring *ring = priv->rx_ring[cq->ring];
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		err = irq_set_affinity_hint(cq->mcq.irq,
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					    ring->affinity_mask);
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		if (err)
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			mlx4_warn(mdev, "Failed setting affinity hint\n");
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		netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
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		napi_hash_add(&cq->napi);
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	}
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	napi_enable(&cq->napi);
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	return 0;
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}
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void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq)
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{
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	struct mlx4_en_dev *mdev = priv->mdev;
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	struct mlx4_en_cq *cq = *pcq;
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	mlx4_en_unmap_buffer(&cq->wqres.buf);
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	mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
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	if (priv->mdev->dev->caps.comp_pool && cq->vector) {
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		mlx4_release_eq(priv->mdev->dev, cq->vector);
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	}
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	cq->vector = 0;
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	cq->buf_size = 0;
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	cq->buf = NULL;
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	kfree(cq);
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	*pcq = NULL;
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}
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void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
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{
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	napi_disable(&cq->napi);
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	if (!cq->is_tx) {
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		napi_hash_del(&cq->napi);
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		synchronize_rcu();
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		irq_set_affinity_hint(cq->mcq.irq, NULL);
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	}
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	netif_napi_del(&cq->napi);
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	mlx4_cq_free(priv->mdev->dev, &cq->mcq);
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}
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/* Set rx cq moderation parameters */
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int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
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{
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	return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
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			      cq->moder_cnt, cq->moder_time);
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}
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int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
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{
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	mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
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		    &priv->mdev->uar_lock);
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	return 0;
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}
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