cfd8d744fe
VIDeo plug are one of the compositor input sub-devices. VID are dedicated to video inputs like YUV plans. Like GDP, VID are part of Compositor hardware block and use sti_layer structure to provide an abstraction for Compositor calls. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Rob Clark <robdclark@gmail.com>
138 lines
3.5 KiB
C
138 lines
3.5 KiB
C
/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <drm/drmP.h>
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#include "sti_layer.h"
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#include "sti_vid.h"
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#include "sti_vtg.h"
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/* Registers */
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#define VID_CTL 0x00
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#define VID_ALP 0x04
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#define VID_CLF 0x08
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#define VID_VPO 0x0C
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#define VID_VPS 0x10
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#define VID_KEY1 0x28
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#define VID_KEY2 0x2C
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#define VID_MPR0 0x30
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#define VID_MPR1 0x34
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#define VID_MPR2 0x38
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#define VID_MPR3 0x3C
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#define VID_MST 0x68
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#define VID_BC 0x70
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#define VID_TINT 0x74
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#define VID_CSAT 0x78
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/* Registers values */
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#define VID_CTL_IGNORE (BIT(31) | BIT(30))
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#define VID_CTL_PSI_ENABLE (BIT(2) | BIT(1) | BIT(0))
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#define VID_ALP_OPAQUE 0x00000080
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#define VID_BC_DFLT 0x00008000
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#define VID_TINT_DFLT 0x00000000
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#define VID_CSAT_DFLT 0x00000080
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/* YCbCr to RGB BT709:
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* R = Y+1.5391Cr
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* G = Y-0.4590Cr-0.1826Cb
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* B = Y+1.8125Cb */
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#define VID_MPR0_BT709 0x0A800000
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#define VID_MPR1_BT709 0x0AC50000
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#define VID_MPR2_BT709 0x07150545
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#define VID_MPR3_BT709 0x00000AE8
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static int sti_vid_prepare_layer(struct sti_layer *vid, bool first_prepare)
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{
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u32 val;
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/* Unmask */
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val = readl(vid->regs + VID_CTL);
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val &= ~VID_CTL_IGNORE;
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writel(val, vid->regs + VID_CTL);
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return 0;
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}
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static int sti_vid_commit_layer(struct sti_layer *vid)
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{
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struct drm_display_mode *mode = vid->mode;
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u32 ydo, xdo, yds, xds;
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ydo = sti_vtg_get_line_number(*mode, vid->dst_y);
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yds = sti_vtg_get_line_number(*mode, vid->dst_y + vid->dst_h - 1);
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xdo = sti_vtg_get_pixel_number(*mode, vid->dst_x);
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xds = sti_vtg_get_pixel_number(*mode, vid->dst_x + vid->dst_w - 1);
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writel((ydo << 16) | xdo, vid->regs + VID_VPO);
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writel((yds << 16) | xds, vid->regs + VID_VPS);
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return 0;
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}
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static int sti_vid_disable_layer(struct sti_layer *vid)
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{
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u32 val;
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/* Mask */
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val = readl(vid->regs + VID_CTL);
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val |= VID_CTL_IGNORE;
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writel(val, vid->regs + VID_CTL);
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return 0;
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}
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static const uint32_t *sti_vid_get_formats(struct sti_layer *layer)
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{
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return NULL;
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}
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static unsigned int sti_vid_get_nb_formats(struct sti_layer *layer)
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{
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return 0;
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}
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static void sti_vid_init(struct sti_layer *vid)
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{
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/* Enable PSI, Mask layer */
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writel(VID_CTL_PSI_ENABLE | VID_CTL_IGNORE, vid->regs + VID_CTL);
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/* Opaque */
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writel(VID_ALP_OPAQUE, vid->regs + VID_ALP);
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/* Color conversion parameters */
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writel(VID_MPR0_BT709, vid->regs + VID_MPR0);
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writel(VID_MPR1_BT709, vid->regs + VID_MPR1);
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writel(VID_MPR2_BT709, vid->regs + VID_MPR2);
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writel(VID_MPR3_BT709, vid->regs + VID_MPR3);
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/* Brightness, contrast, tint, saturation */
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writel(VID_BC_DFLT, vid->regs + VID_BC);
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writel(VID_TINT_DFLT, vid->regs + VID_TINT);
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writel(VID_CSAT_DFLT, vid->regs + VID_CSAT);
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}
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static const struct sti_layer_funcs vid_ops = {
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.get_formats = sti_vid_get_formats,
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.get_nb_formats = sti_vid_get_nb_formats,
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.init = sti_vid_init,
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.prepare = sti_vid_prepare_layer,
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.commit = sti_vid_commit_layer,
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.disable = sti_vid_disable_layer,
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};
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struct sti_layer *sti_vid_create(struct device *dev)
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{
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struct sti_layer *vid;
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vid = devm_kzalloc(dev, sizeof(*vid), GFP_KERNEL);
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if (!vid) {
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DRM_ERROR("Failed to allocate memory for VID\n");
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return NULL;
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}
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vid->ops = &vid_ops;
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return vid;
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}
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