Pull MIPS updates from Ralf Baechle:
"This is an unusually large pull request for MIPS - in parts because
lots of patches missed the 3.18 deadline but primarily because some
folks opened the flood gates.
- Retire the MIPS-specific phys_t with the generic phys_addr_t.
- Improvments for the backtrace code used by oprofile.
- Better backtraces on SMP systems.
- Cleanups for the Octeon platform code.
- Cleanups and fixes for the Loongson platform code.
- Cleanups and fixes to the firmware library.
- Switch ATH79 platform to use the firmware library.
- Grand overhault to the SEAD3 and Malta interrupt code.
- Move the GIC interrupt code to drivers/irqchip
- Lots of GIC cleanups and updates to the GIC code to use modern IRQ
infrastructures and features of the kernel.
- OF documentation updates for the GIC bindings
- Move GIC clocksource driver to drivers/clocksource
- Merge GIC clocksource driver with clockevent driver.
- Further updates to bring the GIC clocksource driver up to date.
- R3000 TLB code cleanups
- Improvments to the Loongson 3 platform code.
- Convert pr_warning to pr_warn.
- Merge a bunch of small lantiq and ralink fixes that have been
staged/lingering inside the openwrt tree for a while.
- Update archhelp for IP22/IP32
- Fix a number of issues for Loongson 1B.
- New clocksource and clockevent driver for Loongson 1B.
- Further work on clk handling for Loongson 1B.
- Platform work for Broadcom BMIPS.
- Error handling cleanups for TurboChannel.
- Fixes and optimization to the microMIPS support.
- Option to disable the FTLB.
- Dump more relevant information on machine check exception
- Change binfmt to allow arch to examine PT_*PROC headers
- Support for new style FPU register model in O32
- VDSO randomization.
- BCM47xx cleanups
- BCM47xx reimplement the way the kernel accesses NVRAM information.
- Random cleanups
- Add support for ATH25 platforms
- Remove pointless locking code in some PCI platforms.
- Some improvments to EVA support
- Minor Alchemy cleanup"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits)
MIPS: Add MFHC0 and MTHC0 instructions to uasm.
MIPS: Cosmetic cleanups of page table headers.
MIPS: Add CP0 macros for extended EntryLo registers
MIPS: Remove now unused definition of phys_t.
MIPS: Replace use of phys_t with phys_addr_t.
MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT
PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig.
MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery
MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO
MIPS: <asm/types.h> fix indentation.
MAINTAINERS: Add entry for BMIPS multiplatform kernel
MIPS: Enable VDSO randomization
MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
MIPS: Remove declaration of obsolete arch_init_clk_ops()
MIPS: atomic.h: Reformat to fit in 79 columns
MIPS: Apply `.insn' to fixup labels throughout
MIPS: Fix microMIPS LL/SC immediate offsets
MIPS: Kconfig: Only allow 32-bit microMIPS builds
MIPS: signal.c: Fix an invalid cast in ISA mode bit handling
MIPS: mm: Only build one microassembler that is suitable
...
232 lines
5.5 KiB
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232 lines
5.5 KiB
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menu "Clock Source drivers"
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config CLKSRC_OF
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bool
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config CLKSRC_I8253
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bool
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config CLKEVT_I8253
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bool
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config I8253_LOCK
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bool
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config CLKBLD_I8253
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def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
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config CLKSRC_MMIO
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bool
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config DW_APB_TIMER
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bool
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config DW_APB_TIMER_OF
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bool
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select DW_APB_TIMER
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select CLKSRC_OF
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config ARMADA_370_XP_TIMER
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bool
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select CLKSRC_OF
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config MESON6_TIMER
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bool
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select CLKSRC_MMIO
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config ORION_TIMER
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select CLKSRC_OF
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select CLKSRC_MMIO
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bool
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config SUN4I_TIMER
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select CLKSRC_MMIO
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bool
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config SUN5I_HSTIMER
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select CLKSRC_MMIO
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bool
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config VT8500_TIMER
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bool
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config CADENCE_TTC_TIMER
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bool
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config CLKSRC_NOMADIK_MTU
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bool
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depends on (ARCH_NOMADIK || ARCH_U8500)
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select CLKSRC_MMIO
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help
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Support for Multi Timer Unit. MTU provides access
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to multiple interrupt generating programmable
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32-bit free running decrementing counters.
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config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
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bool
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depends on CLKSRC_NOMADIK_MTU
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help
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Use the Multi Timer Unit as the sched_clock.
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config CLKSRC_DBX500_PRCMU
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bool "Clocksource PRCMU Timer"
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depends on UX500_SOC_DB8500
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default y
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help
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Use the always on PRCMU Timer as clocksource
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config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
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bool "Clocksource PRCMU Timer sched_clock"
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depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
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default y
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help
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Use the always on PRCMU Timer as sched_clock
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config CLKSRC_EFM32
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bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
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depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
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select CLKSRC_MMIO
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default ARCH_EFM32
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help
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Support to use the timers of EFM32 SoCs as clock source and clock
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event device.
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config ARM_ARCH_TIMER
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bool
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select CLKSRC_OF if OF
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config ARM_ARCH_TIMER_EVTSTREAM
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bool "Support for ARM architected timer event stream generation"
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default y if ARM_ARCH_TIMER
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depends on ARM_ARCH_TIMER
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help
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This option enables support for event stream generation based on
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the ARM architected timer. It is used for waking up CPUs executing
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the wfe instruction at a frequency represented as a power-of-2
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divisor of the clock rate.
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The main use of the event stream is wfe-based timeouts of userspace
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locking implementations. It might also be useful for imposing timeout
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on wfe to safeguard against any programming errors in case an expected
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event is not generated.
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This must be disabled for hardware validation purposes to detect any
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hardware anomalies of missing events.
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config ARM_GLOBAL_TIMER
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bool
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select CLKSRC_OF if OF
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help
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This options enables support for the ARM global timer unit
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config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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bool
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depends on ARM_GLOBAL_TIMER
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default y
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help
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Use ARM global timer clock source as sched_clock
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config ATMEL_PIT
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select CLKSRC_OF if OF
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def_bool SOC_AT91SAM9 || SOC_SAMA5
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config CLKSRC_METAG_GENERIC
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def_bool y if METAG
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help
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This option enables support for the Meta per-thread timers.
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config CLKSRC_EXYNOS_MCT
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def_bool y if ARCH_EXYNOS
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depends on !ARM64
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help
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Support for Multi Core Timer controller on Exynos SoCs.
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config CLKSRC_SAMSUNG_PWM
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bool
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help
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This is a new clocksource driver for the PWM timer found in
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Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
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for all devicetree enabled platforms. This driver will be
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needed only on systems that do not have the Exynos MCT available.
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config FSL_FTM_TIMER
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bool
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help
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Support for Freescale FlexTimer Module (FTM) timer.
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config VF_PIT_TIMER
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bool
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help
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Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
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config SYS_SUPPORTS_SH_CMT
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bool
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config MTK_TIMER
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select CLKSRC_OF
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select CLKSRC_MMIO
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bool
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config SYS_SUPPORTS_SH_MTU2
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bool
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config SYS_SUPPORTS_SH_TMU
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bool
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config SYS_SUPPORTS_EM_STI
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bool
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config SH_TIMER_CMT
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bool "Renesas CMT timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_CMT
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help
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This enables build of a clocksource and clockevent driver for
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the Compare Match Timer (CMT) hardware available in 16/32/48-bit
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variants on a wide range of Mobile and Automotive SoCs from Renesas.
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config SH_TIMER_MTU2
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bool "Renesas MTU2 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_MTU2
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help
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This enables build of a clockevent driver for the Multi-Function
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Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
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This hardware comes with 16 bit-timer registers.
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config SH_TIMER_TMU
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bool "Renesas TMU timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_TMU
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help
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This enables build of a clocksource and clockevent driver for
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the 32-bit Timer Unit (TMU) hardware available on a wide range
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SoCs from Renesas.
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config EM_TIMER_STI
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bool "Renesas STI timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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default SYS_SUPPORTS_EM_STI
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help
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This enables build of a clocksource and clockevent driver for
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the 48-bit System Timer (STI) hardware available on a SoCs
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such as EMEV2 from former NEC Electronics.
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config CLKSRC_QCOM
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bool
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config CLKSRC_VERSATILE
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bool "ARM Versatile (Express) reference platforms clock source"
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depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
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select CLKSRC_OF
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default y if MFD_VEXPRESS_SYSREG
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help
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This option enables clock source based on free running
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counter available in the "System Registers" block of
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ARM Versatile, RealView and Versatile Express reference
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platforms.
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config CLKSRC_MIPS_GIC
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bool
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depends on MIPS_GIC
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select CLKSRC_OF
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endmenu
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