 e69cc92788
			
		
	
	
	e69cc92788
	
	
	
		
			
			Move arch headers from include/asm-frv/ to arch/frv/include/asm/. Signed-off-by: David Howells <dhowells@redhat.com>
		
			
				
	
	
		
			81 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			81 lines
		
	
	
	
		
			2.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /* cpu-irqs.h: on-CPU peripheral irqs
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|  *
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|  * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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|  * Written by David Howells (dhowells@redhat.com)
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version
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|  * 2 of the License, or (at your option) any later version.
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|  */
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| 
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| #ifndef _ASM_CPU_IRQS_H
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| #define _ASM_CPU_IRQS_H
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| 
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| #ifndef __ASSEMBLY__
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| 
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| /* IRQ to level mappings */
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| #define IRQ_GDBSTUB_LEVEL	15
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| #define IRQ_UART_LEVEL		13
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| 
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| #ifdef CONFIG_GDBSTUB_UART0
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| #define IRQ_UART0_LEVEL		IRQ_GDBSTUB_LEVEL
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| #else
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| #define IRQ_UART0_LEVEL		IRQ_UART_LEVEL
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| #endif
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| 
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| #ifdef CONFIG_GDBSTUB_UART1
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| #define IRQ_UART1_LEVEL		IRQ_GDBSTUB_LEVEL
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| #else
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| #define IRQ_UART1_LEVEL		IRQ_UART_LEVEL
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| #endif
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| 
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| #define IRQ_DMA0_LEVEL		14
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| #define IRQ_DMA1_LEVEL		14
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| #define IRQ_DMA2_LEVEL		14
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| #define IRQ_DMA3_LEVEL		14
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| #define IRQ_DMA4_LEVEL		14
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| #define IRQ_DMA5_LEVEL		14
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| #define IRQ_DMA6_LEVEL		14
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| #define IRQ_DMA7_LEVEL		14
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| 
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| #define IRQ_TIMER0_LEVEL	12
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| #define IRQ_TIMER1_LEVEL	11
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| #define IRQ_TIMER2_LEVEL	10
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| 
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| #define IRQ_XIRQ0_LEVEL		1
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| #define IRQ_XIRQ1_LEVEL		2
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| #define IRQ_XIRQ2_LEVEL		3
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| #define IRQ_XIRQ3_LEVEL		4
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| #define IRQ_XIRQ4_LEVEL		5
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| #define IRQ_XIRQ5_LEVEL		6
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| #define IRQ_XIRQ6_LEVEL		7
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| #define IRQ_XIRQ7_LEVEL		8
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| 
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| /* IRQ IDs presented to drivers */
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| #define IRQ_CPU__UNUSED		IRQ_BASE_CPU
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| #define IRQ_CPU_UART0		(IRQ_BASE_CPU + IRQ_UART0_LEVEL)
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| #define IRQ_CPU_UART1		(IRQ_BASE_CPU + IRQ_UART1_LEVEL)
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| #define IRQ_CPU_TIMER0		(IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
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| #define IRQ_CPU_TIMER1		(IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
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| #define IRQ_CPU_TIMER2		(IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
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| #define IRQ_CPU_DMA0		(IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
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| #define IRQ_CPU_DMA1		(IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
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| #define IRQ_CPU_DMA2		(IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
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| #define IRQ_CPU_DMA3		(IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
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| #define IRQ_CPU_DMA4		(IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
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| #define IRQ_CPU_DMA5		(IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
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| #define IRQ_CPU_DMA6		(IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
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| #define IRQ_CPU_DMA7		(IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
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| #define IRQ_CPU_EXTERNAL0	(IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
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| #define IRQ_CPU_EXTERNAL1	(IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
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| #define IRQ_CPU_EXTERNAL2	(IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
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| #define IRQ_CPU_EXTERNAL3	(IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
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| #define IRQ_CPU_EXTERNAL4	(IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
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| #define IRQ_CPU_EXTERNAL5	(IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
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| #define IRQ_CPU_EXTERNAL6	(IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
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| #define IRQ_CPU_EXTERNAL7	(IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
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| 
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| #endif /* !__ASSEMBLY__ */
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| 
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| #endif /* _ASM_CPU_IRQS_H */
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