0b3eb21b2f
Implement an irq chip to handle interrupts via gpio. The GPIO chip initialization function now takes a bitmask denoting pins that should be configured for their alternate function. changes compared to v1: - fixed bug on edge interrupt configuration - accommodated to function name change - moved definition of VARIANT_NR_IRQS to this patch - renamed __XTENSA_S6000_IRQ_H to _XTENSA_S6000_IRQ_H as requested Signed-off-by: Daniel Glöckner <dg@emlix.com> Signed-off-by: Johannes Weiner <jw@emlix.com> Signed-off-by: Chris Zankel <chris@zankel.net>
9 lines
212 B
C
9 lines
212 B
C
#ifndef _XTENSA_S6000_IRQ_H
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#define _XTENSA_S6000_IRQ_H
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#define NO_IRQ (-1)
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#define VARIANT_NR_IRQS 8 /* GPIO interrupts */
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extern void variant_irq_enable(unsigned int irq);
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#endif /* __XTENSA_S6000_IRQ_H */
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