 66d2cc95d1
			
		
	
	
	66d2cc95d1
	
	
	
		
			
			Adds support for the two PCI busses on MPC83xx and the MPC834x SYS/PIBS reference board. The code initializes PCI inbound/outbound windows, allocates and registers PCI memory/io space. Be aware that setup of the PCI buses on the PIBs board is expected to be done by the firmware. Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
		
			
				
	
	
		
			58 lines
		
	
	
	
		
			1.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			58 lines
		
	
	
	
		
			1.6 KiB
			
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/ppc/platforms/83xx/mpc834x_sys.h
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|  *
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|  * MPC834X SYS common board definitions
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|  *
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|  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
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|  *
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|  * Copyright 2005 Freescale Semiconductor, Inc.
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|  *
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|  * This program is free software; you can redistribute  it and/or modify it
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|  * under  the terms of  the GNU General  Public License as published by the
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|  * Free Software Foundation;  either version 2 of the  License, or (at your
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|  * option) any later version.
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|  *
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|  */
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| 
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| #ifndef __MACH_MPC83XX_SYS_H__
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| #define __MACH_MPC83XX_SYS_H__
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| 
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| #include <linux/config.h>
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| #include <linux/init.h>
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| #include <linux/seq_file.h>
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| #include <syslib/ppc83xx_setup.h>
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| #include <asm/ppcboot.h>
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| 
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| #define VIRT_IMMRBAR		((uint)0xfe000000)
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| 
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| #define BCSR_PHYS_ADDR		((uint)0xf8000000)
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| #define BCSR_SIZE		((uint)(128 * 1024))
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| 
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| #define BCSR_MISC_REG2_OFF	0x07
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| #define BCSR_MISC_REG2_PORESET	0x01
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| 
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| #define BCSR_MISC_REG3_OFF	0x08
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| #define BCSR_MISC_REG3_CNFLOCK	0x80
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| 
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| #define PIRQA	MPC83xx_IRQ_EXT4
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| #define PIRQB	MPC83xx_IRQ_EXT5
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| #define PIRQC	MPC83xx_IRQ_EXT6
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| #define PIRQD	MPC83xx_IRQ_EXT7
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| 
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| #define MPC83xx_PCI1_LOWER_IO	0x00000000
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| #define MPC83xx_PCI1_UPPER_IO	0x00ffffff
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| #define MPC83xx_PCI1_LOWER_MEM	0x80000000
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| #define MPC83xx_PCI1_UPPER_MEM	0x9fffffff
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| #define MPC83xx_PCI1_IO_BASE	0xe2000000
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| #define MPC83xx_PCI1_MEM_OFFSET	0x00000000
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| #define MPC83xx_PCI1_IO_SIZE	0x01000000
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| 
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| #define MPC83xx_PCI2_LOWER_IO	0x00000000
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| #define MPC83xx_PCI2_UPPER_IO	0x00ffffff
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| #define MPC83xx_PCI2_LOWER_MEM	0xa0000000
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| #define MPC83xx_PCI2_UPPER_MEM	0xbfffffff
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| #define MPC83xx_PCI2_IO_BASE	0xe3000000
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| #define MPC83xx_PCI2_MEM_OFFSET	0x00000000
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| #define MPC83xx_PCI2_IO_SIZE	0x01000000
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| 
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| #endif                /* __MACH_MPC83XX_SYS_H__ */
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