a439fe51a1
The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
100 lines
3.2 KiB
C
100 lines
3.2 KiB
C
/*
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* auxio.h: Definitions and code for the Auxiliary I/O registers.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*
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* Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net)
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*/
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#ifndef _SPARC64_AUXIO_H
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#define _SPARC64_AUXIO_H
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/* AUXIO implementations:
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* sbus-based NCR89C105 "Slavio"
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* LED/Floppy (AUX1) register
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* Power (AUX2) register
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*
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* ebus-based auxio on PCIO
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* LED Auxio Register
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* Power Auxio Register
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*
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* Register definitions from NCR _NCR89C105 Chip Specification_
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*
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* SLAVIO AUX1 @ 0x1900000
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* -------------------------------------------------
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* | (R) | (R) | D | (R) | E | M | T | L |
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* -------------------------------------------------
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* (R) - bit 7:6,4 are reserved and should be masked in s/w
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* D - Floppy Density Sense (1=high density) R/O
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* E - Link Test Enable, directly reflected on AT&T 7213 LTE pin
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* M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin
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* T - Terminal Count: sends TC pulse to 82077 floppy controller
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* L - System LED on front panel (0=off, 1=on)
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*/
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#define AUXIO_AUX1_MASK 0xc0 /* Mask bits */
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#define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */
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#define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */
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#define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */
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#define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */
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#define AUXIO_AUX1_LED 0x01 /* System LED */
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/* SLAVIO AUX2 @ 0x1910000
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* -------------------------------------------------
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* | (R) | (R) | D | (R) | (R) | (R) | C | F |
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* -------------------------------------------------
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* (R) - bits 7:6,4:2 are reserved and should be masked in s/w
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* D - Power Failure Detect (1=power fail)
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* C - Clear Power Failure Detect Int (1=clear)
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* F - Power Off (1=power off)
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*/
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#define AUXIO_AUX2_MASK 0xdc /* Mask Bits */
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#define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */
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#define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */
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#define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */
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/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837
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*
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* PCIO LED Auxio @ 0x726000
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* -------------------------------------------------
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* | 31:1 Unused | LED |
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* -------------------------------------------------
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* Bits 31:1 unused
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* LED - System LED on front panel (0=off, 1=on)
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*/
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#define AUXIO_PCIO_LED 0x01 /* System LED */
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/* PCIO Power Auxio @ 0x724000
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* -------------------------------------------------
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* | 31:2 Unused | CPO | SPO |
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* -------------------------------------------------
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* Bits 31:2 unused
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* CPO - Courtesy Power Off (1=off)
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* SPO - System Power Off (1=off)
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*/
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#define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */
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#define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */
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#ifndef __ASSEMBLY__
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extern void __iomem *auxio_register;
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#define AUXIO_LTE_ON 1
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#define AUXIO_LTE_OFF 0
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/* auxio_set_lte - Set Link Test Enable (TPE Link Detect)
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*
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* on - AUXIO_LTE_ON or AUXIO_LTE_OFF
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*/
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extern void auxio_set_lte(int on);
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#define AUXIO_LED_ON 1
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#define AUXIO_LED_OFF 0
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/* auxio_set_led - Set system front panel LED
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*
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* on - AUXIO_LED_ON or AUXIO_LED_OFF
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*/
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extern void auxio_set_led(int on);
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#endif /* ifndef __ASSEMBLY__ */
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#endif /* !(_SPARC64_AUXIO_H) */
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