52dffd7fbf
P1020 is another member of Freescale QorIQ series of processors. It is an e500 based dual core SOC. Being a scaled down version of P2020 it has following differences from P2020: - 533MHz - 800MHz core frequency. - 256Kbyte L2 cache - Ethernet controllers with classification capabilities(new controller). From board perspective P1020RDB is same as P2020RDB. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
173 lines
3.8 KiB
C
173 lines
3.8 KiB
C
/*
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* MPC85xx RDB Board Setup
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/of_platform.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
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#else
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#define DBG(fmt, args...)
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#endif
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void __init mpc85xx_rdb_pic_init(void)
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{
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struct mpic *mpic;
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struct resource r;
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struct device_node *np;
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unsigned long root = of_get_flat_dt_root();
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL) {
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printk(KERN_ERR "Could not find open-pic node\n");
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return;
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}
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if (of_address_to_resource(np, 0, &r)) {
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printk(KERN_ERR "Failed to map mpic register space\n");
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of_node_put(np);
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return;
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}
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if (of_flat_dt_is_compatible(root, "fsl,85XXRDB-CAMP")) {
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
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0, 256, " OpenPIC ");
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} else {
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mpic = mpic_alloc(np, r.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET |
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MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
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MPIC_SINGLE_DEST_CPU,
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0, 256, " OpenPIC ");
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}
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BUG_ON(mpic == NULL);
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of_node_put(np);
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mpic_init(mpic);
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}
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/*
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* Setup the architecture
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*/
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#ifdef CONFIG_SMP
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extern void __init mpc85xx_smp_init(void);
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#endif
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static void __init mpc85xx_rdb_setup_arch(void)
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{
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#ifdef CONFIG_PCI
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struct device_node *np;
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#endif
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if (ppc_md.progress)
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ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
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#ifdef CONFIG_PCI
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for_each_node_by_type(np, "pci") {
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if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
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fsl_add_bridge(np, 0);
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}
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#endif
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#ifdef CONFIG_SMP
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mpc85xx_smp_init();
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#endif
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printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
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}
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static struct of_device_id __initdata mpc85xxrdb_ids[] = {
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{ .type = "soc", },
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{ .compatible = "soc", },
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{ .compatible = "simple-bus", },
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{ .compatible = "gianfar", },
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{},
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};
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static int __init mpc85xxrdb_publish_devices(void)
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{
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return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL);
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}
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machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices);
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machine_device_initcall(p1020_rdb, mpc85xxrdb_publish_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p2020_rdb_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
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return 1;
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return 0;
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}
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static int __init p1020_rdb_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
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return 1;
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return 0;
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}
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define_machine(p2020_rdb) {
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.name = "P2020 RDB",
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.probe = p2020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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define_machine(p1020_rdb) {
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.name = "P1020 RDB",
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.probe = p1020_rdb_probe,
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.setup_arch = mpc85xx_rdb_setup_arch,
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.init_IRQ = mpc85xx_rdb_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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